| /aosp_15_r20/external/llvm/test/CodeGen/AMDGPU/ |
| H A D | smrd.ll | 89 ; SICI: s_buffer_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0x4 ; encoding: [0x04
90 ; VI: s_buffer_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0x10
103 ; SICI: s_buffer_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0xff ; encoding: [0xff
104 ; VI: s_buffer_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0x3fc
118 ; SI: s_buffer_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], s[[OFFSET]] ; encoding: [0x0[[OFFSET]]
119 ; CI: s_buffer_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0x100
120 ; VI: s_buffer_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0x400
133 ; SI: s_buffer_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], [[OFFSET]]
134 ; CI: s_buffer_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0x3ffff
135 ; VI: s_buffer_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0xffffc
[all …]
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| H A D | sgpr-copy.ll | 12 ; CHECK: s_buffer_load_dword [[DST:s[0-9]]], {{s\[[0-9]+:[0-9]+\]}}, 0x0
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| H A D | si-sgpr-spill.ll | 23 ; CHECK-NOT: s_buffer_load_dword m0
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| /aosp_15_r20/external/llvm/test/MC/AMDGPU/ |
| H A D | smrd.s | 87 s_buffer_load_dword s1, s[4:7], 1 label
91 s_buffer_load_dword s1, s[4:7], s4 label
95 s_buffer_load_dword ttmp1, ttmp[4:7], ttmp4 label
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| H A D | reg-syntax-extra.s | 77 s_buffer_load_dword ttmp1, [ttmp4,ttmp5,ttmp6,ttmp7], ttmp4 label
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| /aosp_15_r20/external/mesa3d/src/amd/compiler/tests/ |
| H A D | test_insert_waitcnt.cpp | 432 bld.smem(aco_opcode::s_buffer_load_dword, def_s4, desc_s4, op_s0);
434 bld.smem(aco_opcode::s_buffer_load_dword, def_s5, desc_s4, op_s0);
475 bld.smem(aco_opcode::s_buffer_load_dword, def_s5, desc_s4, op_s0);
477 bld.smem(aco_opcode::s_buffer_load_dword, def_s7, desc_s4, op_s0);
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| H A D | test_hard_clause.cpp | 80 bld.smem(aco_opcode::s_buffer_load_dword, Definition(PhysReg(0), s1), desc_op, Operand::zero()); in create_smem_buffer()
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| H A D | test_assembler.cpp | 426 bld.smem(aco_opcode::s_buffer_load_dword, dst, op_s4, op_s1)->smem().cache = cache_coherent;
430 bld.smem(aco_opcode::s_buffer_load_dword, dst, op_s4, op_s1)->smem().cache =
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| /aosp_15_r20/external/llvm/test/MC/Disassembler/AMDGPU/ |
| H A D | smrd_vi.txt | 39 # VI: s_buffer_load_dword s1, s[4:7], 0x1 ; encoding: [0x42,0x00,0x22,0xc0,0x01,0x00,0x00,0x00]
42 # VI: s_buffer_load_dword s1, s[4:7], s4 ; encoding: [0x42,0x00,0x20,0xc0,0x04,0x00,0x00,0x00]
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| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| H A D | SMInstructions.td | 270 "s_buffer_load_dword", SReg_128, SReg_32_XM0_XEXEC
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| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/AMDGPU/ |
| H A D | SMInstructions.td | 302 "s_buffer_load_dword", SReg_128, SReg_32_XM0_XEXEC
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| /aosp_15_r20/external/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstructions.td | 54 smrd<0x08>, "s_buffer_load_dword", SReg_128, SReg_32_XM0
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| /aosp_15_r20/external/mesa3d/src/amd/compiler/ |
| H A D | aco_instruction_selection.cpp | 4658 op = buffer ? aco_opcode::s_buffer_load_dword : aco_opcode::s_load_dword; in smem_load_callback()
|