| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/M68k/MCTargetDesc/ |
| H A D | M68kAsmBackend.cpp | 142 static unsigned getRelaxedOpcode(const MCInst &Inst) { in getRelaxedOpcode() function
191 unsigned RelaxedOp = getRelaxedOpcode(Inst); in relaxInstruction()
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| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/MCTargetDesc/ |
| H A D | RISCVAsmBackend.cpp | 117 unsigned RISCVAsmBackend::getRelaxedOpcode(unsigned Op) const { in getRelaxedOpcode() function in RISCVAsmBackend
133 return getRelaxedOpcode(Inst.getOpcode()) != Inst.getOpcode(); in mayNeedRelaxation()
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| H A D | RISCVAsmBackend.h | 144 unsigned getRelaxedOpcode(unsigned Op) const;
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| /aosp_15_r20/external/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMAsmBackend.cpp | 174 unsigned ARMAsmBackend::getRelaxedOpcode(unsigned Op) const { in getRelaxedOpcode() function in ARMAsmBackend
197 if (getRelaxedOpcode(Inst.getOpcode()) != Inst.getOpcode()) in mayNeedRelaxation()
264 unsigned RelaxedOp = getRelaxedOpcode(Inst.getOpcode()); in relaxInstruction()
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| H A D | ARMAsmBackend.h | 55 unsigned getRelaxedOpcode(unsigned Op) const;
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| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMAsmBackend.h | 57 unsigned getRelaxedOpcode(unsigned Op, const MCSubtargetInfo &STI) const;
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| H A D | ARMAsmBackend.cpp | 195 unsigned ARMAsmBackend::getRelaxedOpcode(unsigned Op, in getRelaxedOpcode() function in ARMAsmBackend
220 if (getRelaxedOpcode(Inst.getOpcode(), STI) != Inst.getOpcode()) in mayNeedRelaxation()
320 unsigned RelaxedOp = getRelaxedOpcode(Inst.getOpcode(), STI); in relaxInstruction()
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| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMAsmBackend.h | 51 unsigned getRelaxedOpcode(unsigned Op, const MCSubtargetInfo &STI) const;
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| H A D | ARMAsmBackend.cpp | 209 unsigned ARMAsmBackend::getRelaxedOpcode(unsigned Op, in getRelaxedOpcode() function in ARMAsmBackend
234 if (getRelaxedOpcode(Inst.getOpcode(), STI) != Inst.getOpcode()) in mayNeedRelaxation()
333 unsigned RelaxedOp = getRelaxedOpcode(Inst.getOpcode(), STI); in relaxInstruction()
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| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/RISCV/MCTargetDesc/ |
| H A D | RISCVAsmBackend.cpp | 317 unsigned RISCVAsmBackend::getRelaxedOpcode(unsigned Op) const { in getRelaxedOpcode() function in RISCVAsmBackend
333 return getRelaxedOpcode(Inst.getOpcode()) != Inst.getOpcode(); in mayNeedRelaxation()
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| H A D | RISCVAsmBackend.h | 89 unsigned getRelaxedOpcode(unsigned Op) const;
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| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86AsmBackend.cpp | 229 static unsigned getRelaxedOpcode(const MCInst &Inst, bool Is16BitMode) { in getRelaxedOpcode() function
758 unsigned RelaxedOp = getRelaxedOpcode(Inst, Is16BitMode); in relaxInstruction()
777 return getRelaxedOpcode(Inst, Is16BitMode) == Inst.getOpcode(); in isFullyRelaxed()
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| /aosp_15_r20/external/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86AsmBackend.cpp | 269 static unsigned getRelaxedOpcode(const MCInst &Inst, bool is16BitMode) { in getRelaxedOpcode() function
310 unsigned RelaxedOp = getRelaxedOpcode(Inst, is16BitMode); in relaxInstruction()
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| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86AsmBackend.cpp | 278 static unsigned getRelaxedOpcode(const MCInst &Inst, bool is16BitMode) { in getRelaxedOpcode() function
621 unsigned RelaxedOp = getRelaxedOpcode(Inst, is16BitMode); in relaxInstruction()
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