Searched refs:dwc_ddrphy_apb_wr (Results 1 – 3 of 3) sorted by relevance
| /aosp_15_r20/external/trusty/arm-trusted-firmware/plat/imx/imx8m/ddr/ |
| D | dram_retention.c | 97 dwc_ddrphy_apb_wr(0xd0000, 0x0); in dram_enter_retention()
101 dwc_ddrphy_apb_wr(0xd0000, 0x1); in dram_enter_retention()
182 dwc_ddrphy_apb_wr(0xd0000, 0x0); in dram_exit_retention()
186 dwc_ddrphy_apb_wr(0xd0000, 0x1); in dram_exit_retention()
219 dwc_ddrphy_apb_wr(0xd0000, 0x0); in dram_exit_retention()
223 dwc_ddrphy_apb_wr(0xd0000, 0x1); in dram_exit_retention()
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| D | dram.c | 164 dwc_ddrphy_apb_wr(cfg->reg, cfg->val); in dram_phy_init()
171 dwc_ddrphy_apb_wr(cfg->reg, cfg->val); in dram_phy_init()
178 dwc_ddrphy_apb_wr(cfg->reg, cfg->val); in dram_phy_init()
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| /aosp_15_r20/external/trusty/arm-trusted-firmware/plat/imx/imx8m/include/ |
| D | ddrc.h | 334 #define dwc_ddrphy_apb_wr(addr, val) mmio_write_32(IMX_DDRPHY_BASE + 4 * (addr), val) macro
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