Searched refs:ddr_dll_ctl3 (Results 1 – 3 of 3) sorted by relevance
/aosp_15_r20/external/coreboot/src/vendorcode/cavium/bdk/libdram/ |
H A D | lib_octeon_shared.c | 1385 bdk_lmcx_dll_ctl3_t ddr_dll_ctl3; in initialize_ddr_clock() local 1459 ddr_dll_ctl3.u = 0; in initialize_ddr_clock() 1460 ddr_dll_ctl3.s.dclk90_recal_dis = 1; in initialize_ddr_clock() 1461 ddr_dll_ctl3.s.dll90_byte_sel = 1; in initialize_ddr_clock() 1462 DRAM_CSR_WRITE(node, BDK_LMCX_DLL_CTL3(0), ddr_dll_ctl3.u); in initialize_ddr_clock() 1476 ddr_dll_ctl3.s.dclk90_fwd = 1; in initialize_ddr_clock() 1477 DRAM_CSR_WRITE(node, BDK_LMCX_DLL_CTL3(0), ddr_dll_ctl3.u); in initialize_ddr_clock() 1494 ddr_dll_ctl3.u = 0; in initialize_ddr_clock() 1495 ddr_dll_ctl3.s.dclk90_recal_dis = 1; in initialize_ddr_clock() 1496 ddr_dll_ctl3.s.dll90_byte_sel = 7; in initialize_ddr_clock() [all …]
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H A D | dram-init-ddr3.c | 226 bdk_lmcx_dll_ctl3_t ddr_dll_ctl3; in change_wr_deskew_ena() local 230 ddr_dll_ctl3.u = BDK_CSR_READ(node, BDK_LMCX_DLL_CTL3(ddr_interface_num)); in change_wr_deskew_ena() 234 DRAM_CSR_WRITE(node, BDK_LMCX_DLL_CTL3(ddr_interface_num), ddr_dll_ctl3.u); in change_wr_deskew_ena() 427 bdk_lmcx_dll_ctl3_t ddr_dll_ctl3; in load_dac_override() local 430 ddr_dll_ctl3.u = BDK_CSR_READ(node, BDK_LMCX_DLL_CTL3(ddr_interface_num)); in load_dac_override() 435 ddr_dll_ctl3.s.bit_select = 0x9; /* No-op */ in load_dac_override() 436 DRAM_CSR_WRITE(node, BDK_LMCX_DLL_CTL3(ddr_interface_num), ddr_dll_ctl3.u); in load_dac_override() 438 ddr_dll_ctl3.s.bit_select = 0xC; /* Vref bypass setting load */ in load_dac_override() 439 DRAM_CSR_WRITE(node, BDK_LMCX_DLL_CTL3(ddr_interface_num), ddr_dll_ctl3.u); in load_dac_override() 441 ddr_dll_ctl3.s.bit_select = 0xD; /* Vref bypass on. */ in load_dac_override() [all …]
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H A D | dram-internal.h | 99 ddr_dll_ctl3.cn81xx.field = (expr); \ 105 (ddr_dll_ctl3.cn81xx.field)
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