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Searched refs:cppc_perf_limit_min_range (Results 1 – 12 of 12) sorted by relevance

/aosp_15_r20/external/coreboot/src/soc/amd/glinda/
H A Dfsp_m_params.c130 mcfg->cppc_perf_limit_min_range = config->cppc_perf_limit_min_range; in platform_fsp_memory_init_params_cb()
H A Dchip.h83 uint8_t cppc_perf_limit_min_range; member
/aosp_15_r20/external/coreboot/src/soc/amd/phoenix/
H A Dfsp_m_params.c130 mcfg->cppc_perf_limit_min_range = config->cppc_perf_limit_min_range; in platform_fsp_memory_init_params_cb()
H A Dchip.h87 uint8_t cppc_perf_limit_min_range; member
/aosp_15_r20/external/coreboot/src/soc/amd/mendocino/
H A Dfsp_m_params.c129 mcfg->cppc_perf_limit_min_range = config->cppc_perf_limit_min_range; in platform_fsp_memory_init_params_cb()
H A Dchip.h148 uint8_t cppc_perf_limit_min_range; member
/aosp_15_r20/external/coreboot/src/soc/amd/cezanne/
H A Dfsp_m_params.c127 mcfg->cppc_perf_limit_min_range = config->cppc_perf_limit_min_range; in platform_fsp_memory_init_params_cb()
H A Dchip.h73 uint8_t cppc_perf_limit_min_range; member
/aosp_15_r20/external/coreboot/src/vendorcode/amd/fsp/glinda/
H A DFspmUpd.h66 /** Offset 0x0402**/ uint8_t cppc_perf_limit_min_range; member
/aosp_15_r20/external/coreboot/src/vendorcode/amd/fsp/phoenix/
H A DFspmUpd.h66 /** Offset 0x0402**/ uint8_t cppc_perf_limit_min_range; member
/aosp_15_r20/external/coreboot/src/vendorcode/amd/fsp/cezanne/
H A DFspmUpd.h64 /** Offset 0x0402**/ uint8_t cppc_perf_limit_min_range; member
/aosp_15_r20/external/coreboot/src/vendorcode/amd/fsp/mendocino/
H A DFspmUpd.h64 /** Offset 0x0402**/ uint8_t cppc_perf_limit_min_range; member