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Searched refs:burst_len_ddr_clk (Results 1 – 5 of 5) sorted by relevance

/aosp_15_r20/external/trusty/arm-trusted-firmware/plat/intel/soc/agilex/soc/
Dagilex_memory_controller.c176 rd_to_miss, wr_to_miss, burst_len, burst_len_ddr_clk, in configure_ddr_sched_ctrl_regs() local
235 burst_len_ddr_clk = burst_len / 2; in configure_ddr_sched_ctrl_regs()
259 wr_to_miss = ((rd_latency + burst_len_ddr_clk + 2 + tw_rin_clk_cycles) in configure_ddr_sched_ctrl_regs()
/aosp_15_r20/external/arm-trusted-firmware/plat/intel/soc/agilex/soc/
H A Dagilex_memory_controller.c176 rd_to_miss, wr_to_miss, burst_len, burst_len_ddr_clk, in configure_ddr_sched_ctrl_regs() local
235 burst_len_ddr_clk = burst_len / 2; in configure_ddr_sched_ctrl_regs()
259 wr_to_miss = ((rd_latency + burst_len_ddr_clk + 2 + tw_rin_clk_cycles) in configure_ddr_sched_ctrl_regs()
/aosp_15_r20/external/trusty/arm-trusted-firmware/plat/intel/soc/agilex5/soc/
Dagilex5_memory_controller.c177 rd_to_miss, wr_to_miss, burst_len, burst_len_ddr_clk, in configure_ddr_sched_ctrl_regs() local
236 burst_len_ddr_clk = burst_len / 2; in configure_ddr_sched_ctrl_regs()
260 wr_to_miss = ((rd_latency + burst_len_ddr_clk + 2 + tw_rin_clk_cycles) in configure_ddr_sched_ctrl_regs()
/aosp_15_r20/external/trusty/arm-trusted-firmware/plat/intel/soc/stratix10/soc/
Ds10_memory_controller.c205 rd_to_miss, wr_to_miss, burst_len, burst_len_ddr_clk, in configure_ddr_sched_ctrl_regs() local
264 burst_len_ddr_clk = burst_len / 2; in configure_ddr_sched_ctrl_regs()
288 wr_to_miss = ((rd_latency + burst_len_ddr_clk + 2 + tw_rin_clk_cycles) in configure_ddr_sched_ctrl_regs()
/aosp_15_r20/external/arm-trusted-firmware/plat/intel/soc/stratix10/soc/
H A Ds10_memory_controller.c205 rd_to_miss, wr_to_miss, burst_len, burst_len_ddr_clk, in configure_ddr_sched_ctrl_regs() local
264 burst_len_ddr_clk = burst_len / 2; in configure_ddr_sched_ctrl_regs()
288 wr_to_miss = ((rd_latency + burst_len_ddr_clk + 2 + tw_rin_clk_cycles) in configure_ddr_sched_ctrl_regs()