Searched refs:VGPU10_OPERAND_4_COMPONENT_MASK_X (Results 1 – 2 of 2) sorted by relevance
622 #define VGPU10_OPERAND_4_COMPONENT_MASK_X 0x1 macro627 #define VGPU10_OPERAND_4_COMPONENT_MASK_XY (VGPU10_OPERAND_4_COMPONENT_MASK_X | VGPU10_OPERAND_…628 #define VGPU10_OPERAND_4_COMPONENT_MASK_XZ (VGPU10_OPERAND_4_COMPONENT_MASK_X | VGPU10_OPERAND_…629 #define VGPU10_OPERAND_4_COMPONENT_MASK_XW (VGPU10_OPERAND_4_COMPONENT_MASK_X | VGPU10_OPERAND_…
1487 STATIC_ASSERT(TGSI_WRITEMASK_X == VGPU10_OPERAND_4_COMPONENT_MASK_X); in emit_dst_register()4303 writemask |= (VGPU10_OPERAND_4_COMPONENT_MASK_X << i); in output_writemask_for_stream()4376 VGPU10_OPERAND_4_COMPONENT_MASK_X, in emit_gs_output_declarations()4384 VGPU10_OPERAND_4_COMPONENT_MASK_X, in emit_gs_output_declarations()4450 operand0.mask = VGPU10_OPERAND_4_COMPONENT_MASK_X; in emit_tesslevel_declaration()4462 sgnName, VGPU10_OPERAND_4_COMPONENT_MASK_X, in emit_tesslevel_declaration()4717 VGPU10_OPERAND_4_COMPONENT_MASK_X, in emit_system_value_declaration()4731 VGPU10_OPERAND_4_COMPONENT_MASK_X, in emit_system_value_declaration()4746 VGPU10_OPERAND_4_COMPONENT_MASK_X, in emit_system_value_declaration()5121 mask = VGPU10_OPERAND_4_COMPONENT_MASK_X; in emit_fs_input_declarations()[all …]