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Searched refs:MSR_VR_MISC_CONFIG (Results 1 – 6 of 6) sorted by relevance

/aosp_15_r20/external/coreboot/src/soc/intel/xeon_sp/spr/
H A Dcpu.c89 msr = rdmsr(MSR_VR_MISC_CONFIG); in each_cpu_init()
91 wrmsr(MSR_VR_MISC_CONFIG, msr); in each_cpu_init()
/aosp_15_r20/external/coreboot/src/cpu/intel/haswell/
H A Dhaswell_init.c203 msr = rdmsr(MSR_VR_MISC_CONFIG); in initialize_vr_config()
232 wrmsr(MSR_VR_MISC_CONFIG, msr); in initialize_vr_config()
H A Dhaswell.h87 #define MSR_VR_MISC_CONFIG 0x603 macro
/aosp_15_r20/external/coreboot/src/soc/intel/skylake/include/soc/
H A Dmsr.h15 #define MSR_VR_MISC_CONFIG 0x603 macro
/aosp_15_r20/external/coreboot/src/soc/intel/denverton_ns/include/soc/
H A Dmsr.h27 #define MSR_VR_MISC_CONFIG 0x603 macro
/aosp_15_r20/external/coreboot/src/soc/intel/xeon_sp/include/soc/
H A Dmsr.h68 #define MSR_VR_MISC_CONFIG 0x603 macro