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Searched refs:LogicSVEAddressVector (Results 1 – 3 of 3) sorted by relevance

/aosp_15_r20/external/vixl/src/aarch64/
H A Dsimulator-aarch64.cc1823 const LogicSVEAddressVector& addr) { in PrintZStructAccess()
3434 LogicSVEAddressVector addr(xm, &zn, kFormatVnD); in Simulate_ZtD_PgZ_ZnD_Xm()
3475 LogicSVEAddressVector addr(xm, &zn, kFormatVnD); in Simulate_ZtD_Pg_ZnD_Xm()
3491 LogicSVEAddressVector addr(xm, &zn, kFormatVnS); in Simulate_ZtS_PgZ_ZnS_Xm()
3525 LogicSVEAddressVector addr(xm, &zn, kFormatVnS); in Simulate_ZtS_Pg_ZnS_Xm()
11970 LogicSVEAddressVector addr(imm, &ReadVRegister(instr->GetRn()), kFormatVnD); in VisitSVE64BitGatherLoad_VectorPlusImm()
12068 LogicSVEAddressVector addr(ReadXRegister(instr->GetRn()) + offset); in VisitSVEContiguousFirstFaultLoad_ScalarPlusScalar()
12113 LogicSVEAddressVector addr(ReadXRegister(instr->GetRn()) + offset); in VisitSVEContiguousNonFaultLoad_ScalarPlusImm()
12148 LogicSVEAddressVector addr(ReadXRegister(instr->GetRn()) + offset); in VisitSVEContiguousNonTemporalLoad_ScalarPlusImm()
12181 LogicSVEAddressVector addr(ReadXRegister(instr->GetRn()) + offset); in VisitSVEContiguousNonTemporalLoad_ScalarPlusScalar()
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H A Dsimulator-aarch64.h804 class LogicSVEAddressVector {
808 explicit LogicSVEAddressVector(uint64_t base) in LogicSVEAddressVector() function
828 LogicSVEAddressVector(uint64_t base,
2356 const LogicSVEAddressVector& addr);
4580 const LogicSVEAddressVector& addr);
4585 const LogicSVEAddressVector& addr,
4611 const LogicSVEAddressVector& addr,
H A Dlogic-aarch64.cc7221 const LogicSVEAddressVector& addr) { in SVEStructuredStoreHelper()
7283 const LogicSVEAddressVector& addr, in SVEStructuredLoadHelper()
7414 const LogicSVEAddressVector& addr, in SVEFaultTolerantLoadHelper()
7505 LogicSVEAddressVector addr(base, in SVEGatherLoadScalarPlusVectorHelper()
7633 uint64_t LogicSVEAddressVector::GetStructAddress(int lane) const { in GetStructAddress()