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Searched refs:CPU_AXI_QOS_NUM_REGS (Results 1 – 8 of 8) sorted by relevance

/aosp_15_r20/external/arm-trusted-firmware/plat/rockchip/rk3399/drivers/pmu/
H A Dpmu.h98 uint32_t cci_m0_qos[CPU_AXI_QOS_NUM_REGS];
99 uint32_t cci_m1_qos[CPU_AXI_QOS_NUM_REGS];
100 uint32_t dmac0_qos[CPU_AXI_QOS_NUM_REGS];
101 uint32_t dmac1_qos[CPU_AXI_QOS_NUM_REGS];
102 uint32_t dcf_qos[CPU_AXI_QOS_NUM_REGS];
103 uint32_t crypto0_qos[CPU_AXI_QOS_NUM_REGS];
104 uint32_t crypto1_qos[CPU_AXI_QOS_NUM_REGS];
105 uint32_t pmu_cm0_qos[CPU_AXI_QOS_NUM_REGS];
106 uint32_t peri_cm1_qos[CPU_AXI_QOS_NUM_REGS];
107 uint32_t gic_qos[CPU_AXI_QOS_NUM_REGS];
[all …]
/aosp_15_r20/external/trusty/arm-trusted-firmware/plat/rockchip/rk3399/drivers/pmu/
Dpmu.h98 uint32_t cci_m0_qos[CPU_AXI_QOS_NUM_REGS];
99 uint32_t cci_m1_qos[CPU_AXI_QOS_NUM_REGS];
100 uint32_t dmac0_qos[CPU_AXI_QOS_NUM_REGS];
101 uint32_t dmac1_qos[CPU_AXI_QOS_NUM_REGS];
102 uint32_t dcf_qos[CPU_AXI_QOS_NUM_REGS];
103 uint32_t crypto0_qos[CPU_AXI_QOS_NUM_REGS];
104 uint32_t crypto1_qos[CPU_AXI_QOS_NUM_REGS];
105 uint32_t pmu_cm0_qos[CPU_AXI_QOS_NUM_REGS];
106 uint32_t peri_cm1_qos[CPU_AXI_QOS_NUM_REGS];
107 uint32_t gic_qos[CPU_AXI_QOS_NUM_REGS];
[all …]
/aosp_15_r20/external/trusty/arm-trusted-firmware/plat/rockchip/px30/drivers/pmu/
Dpmu.c76 uint32_t cpu_qos[CPU_AXI_QOS_NUM_REGS];
77 uint32_t gpu_qos[CPU_AXI_QOS_NUM_REGS];
78 uint32_t isp_128m_qos[CPU_AXI_QOS_NUM_REGS];
79 uint32_t isp_rd_qos[CPU_AXI_QOS_NUM_REGS];
80 uint32_t isp_wr_qos[CPU_AXI_QOS_NUM_REGS];
81 uint32_t isp_m1_qos[CPU_AXI_QOS_NUM_REGS];
82 uint32_t vip_qos[CPU_AXI_QOS_NUM_REGS];
83 uint32_t rga_rd_qos[CPU_AXI_QOS_NUM_REGS];
84 uint32_t rga_wr_qos[CPU_AXI_QOS_NUM_REGS];
85 uint32_t vop_m0_qos[CPU_AXI_QOS_NUM_REGS];
[all …]
Dpmu.h279 #define CPU_AXI_QOS_NUM_REGS 0x07 macro
/aosp_15_r20/external/arm-trusted-firmware/plat/rockchip/px30/drivers/pmu/
H A Dpmu.c76 uint32_t cpu_qos[CPU_AXI_QOS_NUM_REGS];
77 uint32_t gpu_qos[CPU_AXI_QOS_NUM_REGS];
78 uint32_t isp_128m_qos[CPU_AXI_QOS_NUM_REGS];
79 uint32_t isp_rd_qos[CPU_AXI_QOS_NUM_REGS];
80 uint32_t isp_wr_qos[CPU_AXI_QOS_NUM_REGS];
81 uint32_t isp_m1_qos[CPU_AXI_QOS_NUM_REGS];
82 uint32_t vip_qos[CPU_AXI_QOS_NUM_REGS];
83 uint32_t rga_rd_qos[CPU_AXI_QOS_NUM_REGS];
84 uint32_t rga_wr_qos[CPU_AXI_QOS_NUM_REGS];
85 uint32_t vop_m0_qos[CPU_AXI_QOS_NUM_REGS];
[all …]
H A Dpmu.h279 #define CPU_AXI_QOS_NUM_REGS 0x07 macro
/aosp_15_r20/external/arm-trusted-firmware/plat/rockchip/rk3399/include/shared/
H A Dpmu_regs.h83 #define CPU_AXI_QOS_NUM_REGS 0x07 macro
/aosp_15_r20/external/trusty/arm-trusted-firmware/plat/rockchip/rk3399/include/shared/
Dpmu_regs.h83 #define CPU_AXI_QOS_NUM_REGS 0x07 macro