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Searched refs:CPSR_c (Results 1 – 12 of 12) sorted by relevance

/aosp_15_r20/external/llvm/test/CodeGen/ARM/
H A Dspecial-reg-acore.ll33 ; ACORE: msr CPSR_c, r0
/aosp_15_r20/external/vixl/src/aarch32/
H A Dinstructions-aarch32.cc228 case CPSR_c: in GetName()
H A Dinstructions-aarch32.h845 CPSR_c = 0x01, enumerator
/aosp_15_r20/external/llvm/test/MC/Disassembler/ARM/
H A Darm-tests.txt191 # CHECK: msrmi CPSR_c, #4043309056
H A Dbasic-arm-instructions.txt854 # CHECK: msr CPSR_c, #5
888 # CHECK: msr CPSR_c, r0
H A Dthumb2.txt1124 # CHECK: msr CPSR_c, r7
/aosp_15_r20/external/OpenCSD/decoder/tests/snapshots/TC2/ds5-dumps/
H A Detmv3_0x10.txt786 Instruction 735 S:0xC0036236 0xF3848100 1 MSR CPSR_c,r4 false
799 Instruction 746 S:0xC000CD5C 0xF3838100 3 MSR CPSR_c,r3 false
803 Instruction 750 S:0xC000CD6C 0xF3838100 3 MSR CPSR_c,r3 false
821 Instruction 763 S:0xC000CE50 0xF38A8100 3 MSR CPSR_c,r10 false
825 Instruction 767 S:0xC000CE60 0xF38A8100 3 MSR CPSR_c,r10 false
984 Instruction 921 S:0xC000CD5C 0xF3838100 3 MSR CPSR_c,r3 false
988 Instruction 925 S:0xC000CD6C 0xF3838100 3 MSR CPSR_c,r3 false
1006 Instruction 938 S:0xC000CE50 0xF38A8100 3 MSR CPSR_c,r10 false
1010 Instruction 942 S:0xC000CE60 0xF38A8100 3 MSR CPSR_c,r10 false
2895 Instruction 2741 S:0xC000CDC2 0xF3838100 3 MSR CPSR_c,r3 false
[all …]
H A Detmv3_0x12.txt97 Instruction 92 S:0xC00214A8 0xF3848100 62 MSR CPSR_c,r4 false
136 Instruction 129 S:0xC00214A8 0xF3848100 8 MSR CPSR_c,r4 false
1988 Instruction 1935 S:0xC000CDC2 0xF3838100 3 MSR CPSR_c,r3 false
1992 Instruction 1939 S:0xC000CDD2 0xF3838100 3 MSR CPSR_c,r3 false
H A Detmv3_0x11.txt250 Instruction 242 S:0xC00214A8 0xF3848100 9 MSR CPSR_c,r4 false
289 Instruction 279 S:0xC00214A8 0xF3848100 1 MSR CPSR_c,r4 false
2899 Instruction 2837 S:0xC00214A8 0xF3848100 1 MSR CPSR_c,r4 false
7494 Instruction 7254 S:0xC000CDC2 0xF3838100 3 MSR CPSR_c,r3 false
7498 Instruction 7258 S:0xC000CDD2 0xF3838100 3 MSR CPSR_c,r3 false
7516 Instruction 7271 S:0xC000CE50 0xF38A8100 3 MSR CPSR_c,r10 false
7520 Instruction 7275 S:0xC000CE60 0xF38A8100 3 MSR CPSR_c,r10 false
7577 Instruction 7328 S:0xC0036236 0xF3848100 1 MSR CPSR_c,r4 false
7590 Instruction 7339 S:0xC000CD5C 0xF3838100 3 MSR CPSR_c,r3 false
7594 Instruction 7343 S:0xC000CD6C 0xF3838100 3 MSR CPSR_c,r3 false
[all …]
H A Dptmv1_0x13.txt46 Instruction 33 S:0xC0018DC0 0xF3878100 0 MSR CPSR_c,r7 false
1483 Instruction 1411 S:0xC0055F5C 0xF3848100 0 MSR CPSR_c,r4 false
5289 Instruction 5095 S:0xC000CD5C 0xF3838100 0 MSR CPSR_c,r3 false
5293 Instruction 5099 S:0xC000CD6C 0xF3838100 0 MSR CPSR_c,r3 false
5310 Instruction 5112 S:0xC000CE50 0xF38A8100 0 MSR CPSR_c,r10 false
5314 Instruction 5116 S:0xC000CE60 0xF38A8100 0 MSR CPSR_c,r10 false
6928 Instruction 6700 S:0xC002D8FE 0xF3848100 0 MSR CPSR_c,r4 false
7199 Instruction 6958 S:0xC002D8EC 0xF3848100 0 MSR CPSR_c,r4 false
7409 Instruction 7148 S:0xC0036236 0xF3848100 0 MSR CPSR_c,r4 false
9900 Instruction 9580 S:0xC000CDC2 0xF3838100 0 MSR CPSR_c,r3 false
[all …]
/aosp_15_r20/external/llvm/test/MC/ARM/
H A Dbasic-arm-instructions.s1455 @ CHECK: msr CPSR_c, #5 @ encoding: [0x05,0xf0,0x21,0xe3]
1492 @ CHECK: msr CPSR_c, r0 @ encoding: [0x00,0xf0,0x21,0xe1]
H A Dbasic-thumb2-instructions.s1581 @ CHECK: msr CPSR_c, r7 @ encoding: [0x87,0xf3,0x00,0x81]