1/*
2 * Copyright (c) 2022, Arm Limited. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <arch.h>
8#include <asm_macros.S>
9#include <services/arm_arch_svc.h>
10#include "wa_cve_2022_23960_bhb.S"
11
12	/*
13	 * This macro is used to isolate the vector table for relevant CPUs
14	 * used in the mitigation for CVE_2022_23960.
15	 */
16	.macro wa_cve_2022_23960_bhb_vector_table _bhb_loop_count, _cpu
17
18	.globl	wa_cve_vbar_\_cpu
19
20vector_base wa_cve_vbar_\_cpu
21	/* ---------------------------------------------------------------------
22	 * Current EL with SP_EL0 : 0x0 - 0x200
23	 * ---------------------------------------------------------------------
24	 */
25vector_entry bhb_sync_exception_sp_el0_\_cpu
26	b	sync_exception_sp_el0
27end_vector_entry bhb_sync_exception_sp_el0_\_cpu
28
29vector_entry bhb_irq_sp_el0_\_cpu
30	b	irq_sp_el0
31end_vector_entry bhb_irq_sp_el0_\_cpu
32
33vector_entry bhb_fiq_sp_el0_\_cpu
34	b	fiq_sp_el0
35end_vector_entry bhb_fiq_sp_el0_\_cpu
36
37vector_entry bhb_serror_sp_el0_\_cpu
38	b	serror_sp_el0
39end_vector_entry bhb_serror_sp_el0_\_cpu
40
41	/* ---------------------------------------------------------------------
42	 * Current EL with SP_ELx: 0x200 - 0x400
43	 * ---------------------------------------------------------------------
44	 */
45vector_entry bhb_sync_exception_sp_elx_\_cpu
46	b	sync_exception_sp_elx
47end_vector_entry bhb_sync_exception_sp_elx_\_cpu
48
49vector_entry bhb_irq_sp_elx_\_cpu
50	b	irq_sp_elx
51end_vector_entry bhb_irq_sp_elx_\_cpu
52
53vector_entry bhb_fiq_sp_elx_\_cpu
54	b	fiq_sp_elx
55end_vector_entry bhb_fiq_sp_elx_\_cpu
56
57vector_entry bhb_serror_sp_elx_\_cpu
58	b	serror_sp_elx
59end_vector_entry bhb_serror_sp_elx_\_cpu
60
61	/* ---------------------------------------------------------------------
62	 * Lower EL using AArch64 : 0x400 - 0x600
63	 * ---------------------------------------------------------------------
64	 */
65vector_entry bhb_sync_exception_aarch64_\_cpu
66	apply_cve_2022_23960_bhb_wa \_bhb_loop_count
67	b	sync_exception_aarch64
68end_vector_entry bhb_sync_exception_aarch64_\_cpu
69
70vector_entry bhb_irq_aarch64_\_cpu
71	apply_cve_2022_23960_bhb_wa \_bhb_loop_count
72	b	irq_aarch64
73end_vector_entry bhb_irq_aarch64_\_cpu
74
75vector_entry bhb_fiq_aarch64_\_cpu
76	apply_cve_2022_23960_bhb_wa \_bhb_loop_count
77	b	fiq_aarch64
78end_vector_entry bhb_fiq_aarch64_\_cpu
79
80vector_entry bhb_serror_aarch64_\_cpu
81	apply_cve_2022_23960_bhb_wa \_bhb_loop_count
82	b	serror_aarch64
83end_vector_entry bhb_serror_aarch64_\_cpu
84
85	/* ---------------------------------------------------------------------
86	 * Lower EL using AArch32 : 0x600 - 0x800
87	 * ---------------------------------------------------------------------
88	 */
89vector_entry bhb_sync_exception_aarch32_\_cpu
90	apply_cve_2022_23960_bhb_wa \_bhb_loop_count
91	b	sync_exception_aarch32
92end_vector_entry bhb_sync_exception_aarch32_\_cpu
93
94vector_entry bhb_irq_aarch32_\_cpu
95	apply_cve_2022_23960_bhb_wa \_bhb_loop_count
96	b	irq_aarch32
97end_vector_entry bhb_irq_aarch32_\_cpu
98
99vector_entry bhb_fiq_aarch32_\_cpu
100	apply_cve_2022_23960_bhb_wa \_bhb_loop_count
101	b	fiq_aarch32
102end_vector_entry bhb_fiq_aarch32_\_cpu
103
104vector_entry bhb_serror_aarch32_\_cpu
105	apply_cve_2022_23960_bhb_wa \_bhb_loop_count
106	b	serror_aarch32
107end_vector_entry bhb_serror_aarch32_\_cpu
108	.endm
109