1 /*
2 * Copyright (c) 2015 The WebM project authors. All Rights Reserved.
3 *
4 * Use of this source code is governed by a BSD-style license
5 * that can be found in the LICENSE file in the root of the source
6 * tree. An additional intellectual property rights grant can be found
7 * in the file PATENTS. All contributing project authors may
8 * be found in the AUTHORS file in the root of the source tree.
9 */
10
11 #include <arm_neon.h>
12 #include <assert.h>
13
14 #include "./vp9_rtcd.h"
15 #include "vpx_dsp/arm/mem_neon.h"
16 #include "vpx_dsp/arm/sum_neon.h"
17
vp9_block_error_neon(const tran_low_t * coeff,const tran_low_t * dqcoeff,intptr_t block_size,int64_t * ssz)18 int64_t vp9_block_error_neon(const tran_low_t *coeff, const tran_low_t *dqcoeff,
19 intptr_t block_size, int64_t *ssz) {
20 uint64x2_t err_u64 = vdupq_n_u64(0);
21 int64x2_t ssz_s64 = vdupq_n_s64(0);
22
23 assert(block_size >= 16);
24 assert((block_size % 16) == 0);
25
26 do {
27 uint32x4_t err;
28 int32x4_t ssz0, ssz1;
29
30 const int16x8_t c0 = load_tran_low_to_s16q(coeff);
31 const int16x8_t c1 = load_tran_low_to_s16q(coeff + 8);
32 const int16x8_t d0 = load_tran_low_to_s16q(dqcoeff);
33 const int16x8_t d1 = load_tran_low_to_s16q(dqcoeff + 8);
34
35 const uint16x8_t diff0 = vreinterpretq_u16_s16(vabdq_s16(c0, d0));
36 const uint16x8_t diff1 = vreinterpretq_u16_s16(vabdq_s16(c1, d1));
37
38 // diff is 15-bits, the squares 30, so we can store 4 in 32-bits before
39 // accumulating them in 64-bits.
40 err = vmull_u16(vget_low_u16(diff0), vget_low_u16(diff0));
41 err = vmlal_u16(err, vget_high_u16(diff0), vget_high_u16(diff0));
42 err = vmlal_u16(err, vget_low_u16(diff1), vget_low_u16(diff1));
43 err = vmlal_u16(err, vget_high_u16(diff1), vget_high_u16(diff1));
44 err_u64 = vpadalq_u32(err_u64, err);
45
46 // We can't do the same here as we're operating on signed integers, so we
47 // can store 2 15-bit diff before accumulating into 64-bits.
48 ssz0 = vmull_s16(vget_low_s16(c0), vget_low_s16(c0));
49 ssz0 = vmlal_s16(ssz0, vget_high_s16(c0), vget_high_s16(c0));
50 ssz_s64 = vpadalq_s32(ssz_s64, ssz0);
51
52 ssz1 = vmull_s16(vget_low_s16(c1), vget_low_s16(c1));
53 ssz1 = vmlal_s16(ssz1, vget_high_s16(c1), vget_high_s16(c1));
54 ssz_s64 = vpadalq_s32(ssz_s64, ssz1);
55
56 coeff += 16;
57 dqcoeff += 16;
58 block_size -= 16;
59 } while (block_size != 0);
60
61 *ssz = horizontal_add_int64x2(ssz_s64);
62 return (int64_t)horizontal_add_uint64x2(err_u64);
63 }
64
vp9_block_error_fp_neon(const tran_low_t * coeff,const tran_low_t * dqcoeff,int block_size)65 int64_t vp9_block_error_fp_neon(const tran_low_t *coeff,
66 const tran_low_t *dqcoeff, int block_size) {
67 uint64x2_t err_u64[2] = { vdupq_n_u64(0), vdupq_n_u64(0) };
68
69 assert(block_size >= 16);
70 assert((block_size % 16) == 0);
71
72 do {
73 uint32x4_t err0, err1;
74
75 const int16x8_t c0 = load_tran_low_to_s16q(coeff);
76 const int16x8_t c1 = load_tran_low_to_s16q(coeff + 8);
77 const int16x8_t d0 = load_tran_low_to_s16q(dqcoeff);
78 const int16x8_t d1 = load_tran_low_to_s16q(dqcoeff + 8);
79
80 const uint16x8_t diff0 = vreinterpretq_u16_s16(vabdq_s16(c0, d0));
81 const uint16x8_t diff1 = vreinterpretq_u16_s16(vabdq_s16(c1, d1));
82
83 // diff is 15-bits, the squares 30, so in theory we can store 4 in 32-bits
84 // before accumulating them in 64-bits. However splitting into 2 mull, mlal
85 // pairs is beneficial since it allows us to use both Neon
86 // multiply-accumulate pipes - on CPUs that have them - rather than having
87 // a single chain of 4 instructions executing serially.
88 err0 = vmull_u16(vget_low_u16(diff0), vget_low_u16(diff0));
89 err0 = vmlal_u16(err0, vget_high_u16(diff0), vget_high_u16(diff0));
90 err_u64[0] = vpadalq_u32(err_u64[0], err0);
91
92 err1 = vmull_u16(vget_low_u16(diff1), vget_low_u16(diff1));
93 err1 = vmlal_u16(err1, vget_high_u16(diff1), vget_high_u16(diff1));
94 err_u64[1] = vpadalq_u32(err_u64[1], err1);
95
96 coeff += 16;
97 dqcoeff += 16;
98 block_size -= 16;
99 } while (block_size != 0);
100
101 return horizontal_add_uint64x2(vaddq_u64(err_u64[0], err_u64[1]));
102 }
103