1 /** @file
2   Intel FSP Header File definition from Intel Firmware Support Package External
3   Architecture Specification v2.0 and above.
4 
5   Copyright (c) 2014 - 2021, Intel Corporation. All rights reserved.<BR>
6   SPDX-License-Identifier: BSD-2-Clause-Patent
7 
8 **/
9 
10 #ifndef __FSP_HEADER_FILE_H__
11 #define __FSP_HEADER_FILE_H__
12 
13 #define FSP_HEADER_REVISION_3   3
14 
15 #define FSPE_HEADER_REVISION_1  1
16 #define FSPP_HEADER_REVISION_1  1
17 
18 ///
19 /// Fixed FSP header offset in the FSP image
20 ///
21 #define FSP_INFO_HEADER_OFF    0x94
22 
23 #define OFFSET_IN_FSP_INFO_HEADER(x)  (UINT32)&((FSP_INFO_HEADER *)(UINTN)0)->x
24 
25 #define FSP_INFO_HEADER_SIGNATURE  SIGNATURE_32 ('F', 'S', 'P', 'H')
26 
27 #define FSP_SIG         0x48505346      /* 'FSPH' */
28 
29 #pragma pack(1)
30 
31 ///
32 /// FSP Information Header as described in FSP v2.0 Spec section 5.1.1.
33 ///
34 typedef struct {
35   ///
36   /// Byte 0x00: Signature ('FSPH') for the FSP Information Header.
37   ///
38   UINT32  Signature;
39   ///
40   /// Byte 0x04: Length of the FSP Information Header.
41   ///
42   UINT32  HeaderLength;
43   ///
44   /// Byte 0x08: Reserved.
45   ///
46   UINT8   Reserved1[2];
47   ///
48   /// Byte 0x0A: Indicates compliance with a revision of this specification in the BCD format.
49   ///            For revision v2.3 the value will be 0x23.
50   ///
51   UINT8   SpecVersion;
52   ///
53   /// Byte 0x0B: Revision of the FSP Information Header.
54   ///            The Current value for this field is 0x6.
55   ///
56   UINT8   HeaderRevision;
57   ///
58   /// Byte 0x0C: Revision of the FSP binary.
59   ///            Major.Minor.Revision.Build
60   ///            If FSP HeaderRevision is <= 5, the ImageRevision can be decoded as follows:
61   ///               7 : 0  - Build Number
62   ///              15 : 8  - Revision
63   ///              23 : 16 - Minor Version
64   ///              31 : 24 - Major Version
65   ///            If FSP HeaderRevision is >= 6, ImageRevision specifies the low-order bytes of the build number and revision
66   ///            while ExtendedImageRevision specifies the high-order bytes of the build number and revision.
67   ///               7 : 0  - Low Byte of Build Number
68   ///              15 : 8  - Low Byte of Revision
69   ///              23 : 16 - Minor Version
70   ///              31 : 24 - Major Version
71   ///
72   UINT32  ImageRevision;
73   ///
74   /// Byte 0x10: Signature string that will help match the FSP Binary to a supported HW configuration.
75   ///
76   CHAR8   ImageId[8];
77   ///
78   /// Byte 0x18: Size of the entire FSP binary.
79   ///
80   UINT32  ImageSize;
81   ///
82   /// Byte 0x1C: FSP binary preferred base address.
83   ///
84   UINT32  ImageBase;
85   ///
86   /// Byte 0x20: Attribute for the FSP binary.
87   ///
88   UINT16  ImageAttribute;
89   ///
90   /// Byte 0x22: Attributes of the FSP Component.
91   ///
92   UINT16  ComponentAttribute;
93   ///
94   /// Byte 0x24: Offset of the FSP configuration region.
95   ///
96   UINT32  CfgRegionOffset;
97   ///
98   /// Byte 0x28: Size of the FSP configuration region.
99   ///
100   UINT32  CfgRegionSize;
101   ///
102   /// Byte 0x2C: Reserved2.
103   ///
104   UINT32  Reserved2;
105   ///
106   /// Byte 0x30: The offset for the API to setup a temporary stack till the memory is initialized.
107   ///
108   UINT32  TempRamInitEntryOffset;
109   ///
110   /// Byte 0x34: Reserved3.
111   ///
112   UINT32  Reserved3;
113   ///
114   /// Byte 0x38: The offset for the API to inform the FSP about the different stages in the boot process.
115   ///
116   UINT32  NotifyPhaseEntryOffset;
117   ///
118   /// Byte 0x3C: The offset for the API to initialize the memory.
119   ///
120   UINT32  FspMemoryInitEntryOffset;
121   ///
122   /// Byte 0x40: The offset for the API to tear down temporary RAM.
123   ///
124   UINT32  TempRamExitEntryOffset;
125   ///
126   /// Byte 0x44: The offset for the API to initialize the CPU and chipset.
127   ///
128   UINT32  FspSiliconInitEntryOffset;
129   ///
130   /// Byte 0x48: Offset for the API for the optional Multi-Phase processor and chipset initialization.
131   ///            This value is only valid if FSP HeaderRevision is >= 5.
132   ///            If the value is set to 0x00000000, then this API is not available in this component.
133   ///
134   UINT32  FspMultiPhaseSiInitEntryOffset;
135   ///
136   /// Byte 0x4C: Extended revision of the FSP binary.
137   ///            This value is only valid if FSP HeaderRevision is >= 6.
138   ///            ExtendedImageRevision specifies the high-order byte of the revision and build number in the FSP binary revision.
139   ///               7 : 0 - High Byte of Build Number
140   ///              15 : 8 - High Byte of Revision
141   ///            The FSP binary build number can be decoded as follows:
142   ///            Build Number = (ExtendedImageRevision[7:0] << 8) | ImageRevision[7:0]
143   ///            Revision = (ExtendedImageRevision[15:8] << 8) | ImageRevision[15:8]
144   ///            Minor Version = ImageRevision[23:16]
145   ///            Major Version = ImageRevision[31:24]
146   ///
147   UINT16  ExtendedImageRevision;
148   ///
149   /// Byte 0x4E: Reserved4.
150   ///
151   UINT16  Reserved4;
152 } FSP_INFO_HEADER;
153 
154 ///
155 /// Signature of the FSP Extended Header
156 ///
157 #define FSP_INFO_EXTENDED_HEADER_SIGNATURE  SIGNATURE_32 ('F', 'S', 'P', 'E')
158 
159 ///
160 /// FSP Information Extended Header as described in FSP v2.0 Spec section 5.1.2.
161 ///
162 typedef struct {
163   ///
164   /// Byte 0x00: Signature ('FSPE') for the FSP Extended Information Header.
165   ///
166   UINT32  Signature;
167   ///
168   /// Byte 0x04: Length of the table in bytes, including all additional FSP producer defined data.
169   ///
170   UINT32  Length;
171   ///
172   /// Byte 0x08: FSP producer defined revision of the table.
173   ///
174   UINT8   Revision;
175   ///
176   /// Byte 0x09: Reserved for future use.
177   ///
178   UINT8   Reserved;
179   ///
180   /// Byte 0x0A: FSP producer identification string
181   ///
182   CHAR8   FspProducerId[6];
183   ///
184   /// Byte 0x10: FSP producer implementation revision number. Larger numbers are assumed to be newer revisions.
185   ///
186   UINT32  FspProducerRevision;
187   ///
188   /// Byte 0x14: Size of the FSP producer defined data (n) in bytes.
189   ///
190   UINT32  FspProducerDataSize;
191   ///
192   /// Byte 0x18: FSP producer defined data of size (n) defined by FspProducerDataSize.
193   ///
194 } FSP_INFO_EXTENDED_HEADER;
195 
196 //
197 // A generic table search algorithm for additional tables can be implemented with a
198 // signature search algorithm until a terminator signature 'FSPP' is found.
199 //
200 #define FSP_FSPP_SIGNATURE  SIGNATURE_32 ('F', 'S', 'P', 'P')
201 #define FSP_PATCH_TABLE_SIGNATURE  FSP_FSPP_SIGNATURE
202 
203 ///
204 /// FSP Patch Table as described in FSP v2.0 Spec section 5.1.5.
205 ///
206 typedef struct {
207   ///
208   /// Byte 0x00: FSP Patch Table Signature "FSPP".
209   ///
210   UINT32  Signature;
211   ///
212   /// Byte 0x04: Size including the PatchData.
213   ///
214   UINT16  HeaderLength;
215   ///
216   /// Byte 0x06: Revision is set to 0x01.
217   ///
218   UINT8   HeaderRevision;
219   ///
220   /// Byte 0x07: Reserved for future use.
221   ///
222   UINT8   Reserved;
223   ///
224   /// Byte 0x08: Number of entries to Patch.
225   ///
226   UINT32  PatchEntryNum;
227   ///
228   /// Byte 0x0C: Patch Data.
229   ///
230 //UINT32  PatchData[];
231 } FSP_PATCH_TABLE;
232 
233 #pragma pack()
234 
235 extern EFI_GUID gFspHeaderFileGuid;
236 
237 #endif
238