xref: /nrf52832-nimble/rt-thread/components/net/freemodbus/port/user_mb_app.h (revision 104654410c56c573564690304ae786df310c91fc)
1 #ifndef    USER_APP
2 #define USER_APP
3 /* ----------------------- Modbus includes ----------------------------------*/
4 #include "mb.h"
5 #include "mb_m.h"
6 #include "mbconfig.h"
7 #include "mbframe.h"
8 #include "mbutils.h"
9 
10 /* -----------------------Slave Defines -------------------------------------*/
11 #define S_DISCRETE_INPUT_START        0
12 #define S_DISCRETE_INPUT_NDISCRETES   16
13 #define S_COIL_START                  0
14 #define S_COIL_NCOILS                 64
15 #define S_REG_INPUT_START             0
16 #define S_REG_INPUT_NREGS             100
17 #define S_REG_HOLDING_START           0
18 #define S_REG_HOLDING_NREGS           100
19 /* salve mode: holding register's all address */
20 #define          S_HD_RESERVE                     0
21 /* salve mode: input register's all address */
22 #define          S_IN_RESERVE                     0
23 /* salve mode: coil's all address */
24 #define          S_CO_RESERVE                     0
25 /* salve mode: discrete's all address */
26 #define          S_DI_RESERVE                     0
27 
28 /* -----------------------Master Defines -------------------------------------*/
29 #define M_DISCRETE_INPUT_START        0
30 #define M_DISCRETE_INPUT_NDISCRETES   16
31 #define M_COIL_START                  0
32 #define M_COIL_NCOILS                 64
33 #define M_REG_INPUT_START             0
34 #define M_REG_INPUT_NREGS             100
35 #define M_REG_HOLDING_START           0
36 #define M_REG_HOLDING_NREGS           100
37 /* master mode: holding register's all address */
38 #define          M_HD_RESERVE                     0
39 /* master mode: input register's all address */
40 #define          M_IN_RESERVE                     0
41 /* master mode: coil's all address */
42 #define          M_CO_RESERVE                     0
43 /* master mode: discrete's all address */
44 #define          M_DI_RESERVE                     0
45 
46 #endif
47