1 /* SPDX-License-Identifier: GPL-2.0-only */
2
3 #include <arch/io.h>
4 #include <device/device.h>
5 #include <device/pci_ehci.h>
6 #include <console/usb.h>
7
8 extern void *ehci_bar;
9
pci_ehci_dbg_dev(unsigned hcd_idx)10 pci_devfn_t pci_ehci_dbg_dev(unsigned hcd_idx)
11 {
12 u32 class;
13 pci_devfn_t dev;
14
15 #if CONFIG_HAVE_USBDEBUG_OPTIONS
16 if (hcd_idx==2)
17 dev = PCI_DEV(0, 0x1a, 0);
18 else
19 dev = PCI_DEV(0, 0x1d, 0);
20 #else
21 dev = PCI_DEV(0, 0x1d, 7);
22 #endif
23
24 class = pci_read_config32(dev, PCI_CLASS_REVISION) >> 8;
25 #if CONFIG_HAVE_USBDEBUG_OPTIONS
26 if (class != PCI_EHCI_CLASSCODE) {
27 /* If we enter here before RCBA programming, EHCI function may
28 * appear with the highest function number instead.
29 */
30 dev |= PCI_DEV(0, 0, 7);
31 class = pci_read_config32(dev, PCI_CLASS_REVISION) >> 8;
32 }
33 #endif
34 if (class != PCI_EHCI_CLASSCODE)
35 return 0;
36
37 return dev;
38 }
39
pci_ehci_dbg_set_port(pci_devfn_t dev,unsigned int port)40 void pci_ehci_dbg_set_port(pci_devfn_t dev, unsigned int port)
41 {
42 /* claim USB debug port */
43 const unsigned long dbgctl_addr =
44 ((unsigned long)ehci_bar) + CONFIG_EHCI_DEBUG_OFFSET;
45 write32(dbgctl_addr, read32(dbgctl_addr) | (1 << 30));
46 }
47
pci_ehci_dbg_enable(pci_devfn_t dev,unsigned long base)48 void pci_ehci_dbg_enable(pci_devfn_t dev, unsigned long base)
49 {
50 }
51