1 /*
2 * Copyright (c) 2017-2021 Arm Limited.
3 *
4 * SPDX-License-Identifier: MIT
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to
8 * deal in the Software without restriction, including without limitation the
9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10 * sell copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in all
14 * copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 */
24 #ifndef ARM_COMPUTE_TEST_VALIDATION_UTILS_QUANTIZED_ASYMM_H
25 #define ARM_COMPUTE_TEST_VALIDATION_UTILS_QUANTIZED_ASYMM_H
26
27 #include <cstdint>
28
29 namespace arm_compute
30 {
31 namespace test
32 {
33 namespace validation
34 {
35 namespace
36 {
37 #if __clang__
38 // This has been tested on clang 7.0.2 (__clang_major__ == 7 && __clang_minor__ == 0 && __clang_patchlevel__ == 2)
to_int64(int32_t val)39 inline int64_t to_int64(int32_t val)
40 {
41 return static_cast<int64_t>(val) | ((val < 0) ? (((1ll << 32) - 1) << 32) : 0);
42 }
43 #else // __clang__
44 inline int64_t to_int64(int32_t val)
45 {
46 return static_cast<int64_t>(val);
47 }
48 #endif // __clang__
49 } // namespace
50
51 /** Rounded to nearest division by a power-of-two. */
asymm_rounding_divide_by_pow2(int32_t x,int exponent)52 inline int32_t asymm_rounding_divide_by_pow2(int32_t x, int exponent)
53 {
54 const int32_t mask = (1 << exponent) - 1;
55 const int32_t threshold = (mask >> 1) + (x < 0 ? 1 : 0);
56 return (x >> exponent) + ((x & mask) > threshold ? 1 : 0);
57 }
58
59 /** Multiplication of two integers. The same as ARMv7 Arm® Neon™ VQRDMULH instruction. */
asymm_int_mult(int32_t a,int32_t b)60 inline int32_t asymm_int_mult(int32_t a, int32_t b)
61 {
62 const bool overflow = a == b && a == std::numeric_limits<int32_t>::min();
63 const int64_t a_64 = to_int64(a);
64 const int64_t b_64 = to_int64(b);
65 const int64_t ab_64 = a_64 * b_64;
66 const int32_t nudge = ab_64 >= 0 ? (1 << 30) : (1 - (1 << 30));
67 const int32_t ab_x2_high32 = static_cast<int32_t>((ab_64 + nudge) / (1ll << 31));
68 return overflow ? std::numeric_limits<int32_t>::max() : ab_x2_high32;
69 }
70
71 /** Quantize down the input value in range [min, max]. */
quantize_down_scale_by_fixedpoint(int32_t val,int32_t result_mult_int,int32_t result_shift,int32_t result_offset_after_shift,int32_t min,int32_t max)72 inline int32_t quantize_down_scale_by_fixedpoint(int32_t val, int32_t result_mult_int, int32_t result_shift,
73 int32_t result_offset_after_shift, int32_t min, int32_t max)
74 {
75 int32_t res = 0;
76 if(result_shift < 0)
77 {
78 res = asymm_int_mult(val * (1 << (-result_shift)), result_mult_int);
79 }
80 else
81 {
82 res = asymm_rounding_divide_by_pow2(asymm_int_mult(val, result_mult_int), result_shift);
83 }
84 res += result_offset_after_shift;
85 res = utility::clamp<int32_t>(res, min, max);
86 return res;
87 }
88 } // namespace validation
89 } // namespace test
90 } // namespace arm_compute
91 #endif /* ARM_COMPUTE_TEST_VALIDATION_UTILS_QUANTIZED_ASYMM_H */
92