xref: /aosp_15_r20/external/XNNPACK/test/f16-gavgpool-cw.cc (revision 4bdc94577ba0e567308109d787f7fec7b531ce36) 
1 // Copyright 2019 Google LLC
2 //
3 // This source code is licensed under the BSD-style license found in the
4 // LICENSE file in the root directory of this source tree.
5 
6 #include <gtest/gtest.h>
7 
8 #include <xnnpack/common.h>
9 #include <xnnpack/isa-checks.h>
10 
11 #include <xnnpack/gavgpool.h>
12 #include "gavgpool-cw-microkernel-tester.h"
13 
14 
15 #if XNN_ENABLE_ARM_FP16 && (XNN_ARCH_ARM || XNN_ARCH_ARM64)
TEST(F16_GAVGPOOL_CW__NEONFP16ARITH_X8,elements_eq_8)16   TEST(F16_GAVGPOOL_CW__NEONFP16ARITH_X8, elements_eq_8) {
17     TEST_REQUIRES_ARM_NEON_FP16_ARITH;
18     GAvgPoolCWMicrokernelTester()
19       .elements(8)
20       .channels(4)
21       .Test(xnn_f16_gavgpool_cw_ukernel__neonfp16arith_x8, xnn_init_f16_gavgpool_neonfp16arith_x8_params);
22   }
23 
TEST(F16_GAVGPOOL_CW__NEONFP16ARITH_X8,channels_eq_8)24   TEST(F16_GAVGPOOL_CW__NEONFP16ARITH_X8, channels_eq_8) {
25     TEST_REQUIRES_ARM_NEON_FP16_ARITH;
26     GAvgPoolCWMicrokernelTester()
27       .elements(8)
28       .channels(8)
29       .Test(xnn_f16_gavgpool_cw_ukernel__neonfp16arith_x8, xnn_init_f16_gavgpool_neonfp16arith_x8_params);
30   }
31 
TEST(F16_GAVGPOOL_CW__NEONFP16ARITH_X8,elements_div_8)32   TEST(F16_GAVGPOOL_CW__NEONFP16ARITH_X8, elements_div_8) {
33     TEST_REQUIRES_ARM_NEON_FP16_ARITH;
34     for (size_t elements = 8; elements < 32; elements += 8) {
35       GAvgPoolCWMicrokernelTester()
36         .elements(elements)
37         .channels(4)
38         .Test(xnn_f16_gavgpool_cw_ukernel__neonfp16arith_x8, xnn_init_f16_gavgpool_neonfp16arith_x8_params);
39     }
40   }
41 
TEST(F16_GAVGPOOL_CW__NEONFP16ARITH_X8,elements_lt_8)42   TEST(F16_GAVGPOOL_CW__NEONFP16ARITH_X8, elements_lt_8) {
43     TEST_REQUIRES_ARM_NEON_FP16_ARITH;
44     for (size_t elements = 1; elements < 8; elements++) {
45       GAvgPoolCWMicrokernelTester()
46         .elements(elements)
47         .channels(4)
48         .Test(xnn_f16_gavgpool_cw_ukernel__neonfp16arith_x8, xnn_init_f16_gavgpool_neonfp16arith_x8_params);
49     }
50   }
51 
TEST(F16_GAVGPOOL_CW__NEONFP16ARITH_X8,elements_gt_8)52   TEST(F16_GAVGPOOL_CW__NEONFP16ARITH_X8, elements_gt_8) {
53     TEST_REQUIRES_ARM_NEON_FP16_ARITH;
54     for (size_t elements = 9; elements < 16; elements++) {
55       GAvgPoolCWMicrokernelTester()
56         .elements(elements)
57         .channels(4)
58         .Test(xnn_f16_gavgpool_cw_ukernel__neonfp16arith_x8, xnn_init_f16_gavgpool_neonfp16arith_x8_params);
59     }
60   }
61 
TEST(F16_GAVGPOOL_CW__NEONFP16ARITH_X8,channels_lt_4)62   TEST(F16_GAVGPOOL_CW__NEONFP16ARITH_X8, channels_lt_4) {
63     TEST_REQUIRES_ARM_NEON_FP16_ARITH;
64     for (size_t channels = 1; channels < 4; channels++) {
65       for (size_t elements = 1; elements < 16; elements += 3) {
66         GAvgPoolCWMicrokernelTester()
67           .elements(elements)
68           .channels(channels)
69           .Test(xnn_f16_gavgpool_cw_ukernel__neonfp16arith_x8, xnn_init_f16_gavgpool_neonfp16arith_x8_params);
70       }
71     }
72   }
73 
TEST(F16_GAVGPOOL_CW__NEONFP16ARITH_X8,channels_gt_4)74   TEST(F16_GAVGPOOL_CW__NEONFP16ARITH_X8, channels_gt_4) {
75     TEST_REQUIRES_ARM_NEON_FP16_ARITH;
76     for (size_t channels = 5; channels < 8; channels++) {
77       for (size_t elements = 1; elements < 16; elements += 3) {
78         GAvgPoolCWMicrokernelTester()
79           .elements(elements)
80           .channels(channels)
81           .Test(xnn_f16_gavgpool_cw_ukernel__neonfp16arith_x8, xnn_init_f16_gavgpool_neonfp16arith_x8_params);
82       }
83     }
84   }
85 
TEST(F16_GAVGPOOL_CW__NEONFP16ARITH_X8,channels_div_4)86   TEST(F16_GAVGPOOL_CW__NEONFP16ARITH_X8, channels_div_4) {
87     TEST_REQUIRES_ARM_NEON_FP16_ARITH;
88     for (size_t channels = 8; channels <= 16; channels += 4) {
89       for (size_t elements = 1; elements < 16; elements += 3) {
90         GAvgPoolCWMicrokernelTester()
91           .elements(elements)
92           .channels(channels)
93           .Test(xnn_f16_gavgpool_cw_ukernel__neonfp16arith_x8, xnn_init_f16_gavgpool_neonfp16arith_x8_params);
94       }
95     }
96   }
97 
TEST(F16_GAVGPOOL_CW__NEONFP16ARITH_X8,qmin)98   TEST(F16_GAVGPOOL_CW__NEONFP16ARITH_X8, qmin) {
99     TEST_REQUIRES_ARM_NEON_FP16_ARITH;
100     for (size_t elements = 1; elements < 16; elements += 3) {
101       GAvgPoolCWMicrokernelTester()
102         .elements(elements)
103         .channels(4)
104         .qmin(128)
105         .Test(xnn_f16_gavgpool_cw_ukernel__neonfp16arith_x8, xnn_init_f16_gavgpool_neonfp16arith_x8_params);
106     }
107   }
108 
TEST(F16_GAVGPOOL_CW__NEONFP16ARITH_X8,qmax)109   TEST(F16_GAVGPOOL_CW__NEONFP16ARITH_X8, qmax) {
110     TEST_REQUIRES_ARM_NEON_FP16_ARITH;
111     for (size_t elements = 1; elements < 16; elements += 3) {
112       GAvgPoolCWMicrokernelTester()
113         .elements(elements)
114         .channels(4)
115         .qmax(128)
116         .Test(xnn_f16_gavgpool_cw_ukernel__neonfp16arith_x8, xnn_init_f16_gavgpool_neonfp16arith_x8_params);
117     }
118   }
119 
TEST(F16_GAVGPOOL_CW__NEONFP16ARITH_X4,elements_eq_4)120   TEST(F16_GAVGPOOL_CW__NEONFP16ARITH_X4, elements_eq_4) {
121     TEST_REQUIRES_ARM_NEON_FP16_ARITH;
122     GAvgPoolCWMicrokernelTester()
123       .elements(4)
124       .channels(4)
125       .Test(xnn_f16_gavgpool_cw_ukernel__neonfp16arith_x4, xnn_init_f16_gavgpool_neonfp16arith_x4_params);
126   }
127 
TEST(F16_GAVGPOOL_CW__NEONFP16ARITH_X4,channels_eq_5)128   TEST(F16_GAVGPOOL_CW__NEONFP16ARITH_X4, channels_eq_5) {
129     TEST_REQUIRES_ARM_NEON_FP16_ARITH;
130     GAvgPoolCWMicrokernelTester()
131       .elements(4)
132       .channels(5)
133       .Test(xnn_f16_gavgpool_cw_ukernel__neonfp16arith_x4, xnn_init_f16_gavgpool_neonfp16arith_x4_params);
134   }
135 
TEST(F16_GAVGPOOL_CW__NEONFP16ARITH_X4,channels_eq_8)136   TEST(F16_GAVGPOOL_CW__NEONFP16ARITH_X4, channels_eq_8) {
137     TEST_REQUIRES_ARM_NEON_FP16_ARITH;
138     GAvgPoolCWMicrokernelTester()
139       .elements(4)
140       .channels(8)
141       .Test(xnn_f16_gavgpool_cw_ukernel__neonfp16arith_x4, xnn_init_f16_gavgpool_neonfp16arith_x4_params);
142   }
143 
TEST(F16_GAVGPOOL_CW__NEONFP16ARITH_X4,elements_div_4)144   TEST(F16_GAVGPOOL_CW__NEONFP16ARITH_X4, elements_div_4) {
145     TEST_REQUIRES_ARM_NEON_FP16_ARITH;
146     for (size_t elements = 8; elements < 32; elements += 4) {
147       GAvgPoolCWMicrokernelTester()
148         .elements(elements)
149         .channels(4)
150         .Test(xnn_f16_gavgpool_cw_ukernel__neonfp16arith_x4, xnn_init_f16_gavgpool_neonfp16arith_x4_params);
151     }
152   }
153 
TEST(F16_GAVGPOOL_CW__NEONFP16ARITH_X4,elements_lt_4)154   TEST(F16_GAVGPOOL_CW__NEONFP16ARITH_X4, elements_lt_4) {
155     TEST_REQUIRES_ARM_NEON_FP16_ARITH;
156     for (size_t elements = 1; elements < 4; elements++) {
157       GAvgPoolCWMicrokernelTester()
158         .elements(elements)
159         .channels(4)
160         .Test(xnn_f16_gavgpool_cw_ukernel__neonfp16arith_x4, xnn_init_f16_gavgpool_neonfp16arith_x4_params);
161     }
162   }
163 
TEST(F16_GAVGPOOL_CW__NEONFP16ARITH_X4,elements_gt_4)164   TEST(F16_GAVGPOOL_CW__NEONFP16ARITH_X4, elements_gt_4) {
165     TEST_REQUIRES_ARM_NEON_FP16_ARITH;
166     for (size_t elements = 5; elements < 8; elements++) {
167       GAvgPoolCWMicrokernelTester()
168         .elements(elements)
169         .channels(4)
170         .Test(xnn_f16_gavgpool_cw_ukernel__neonfp16arith_x4, xnn_init_f16_gavgpool_neonfp16arith_x4_params);
171     }
172   }
173 
TEST(F16_GAVGPOOL_CW__NEONFP16ARITH_X4,channels_lt_4)174   TEST(F16_GAVGPOOL_CW__NEONFP16ARITH_X4, channels_lt_4) {
175     TEST_REQUIRES_ARM_NEON_FP16_ARITH;
176     for (size_t channels = 1; channels < 4; channels++) {
177       for (size_t elements = 1; elements < 16; elements += 3) {
178         GAvgPoolCWMicrokernelTester()
179           .elements(elements)
180           .channels(channels)
181           .Test(xnn_f16_gavgpool_cw_ukernel__neonfp16arith_x4, xnn_init_f16_gavgpool_neonfp16arith_x4_params);
182       }
183     }
184   }
185 
TEST(F16_GAVGPOOL_CW__NEONFP16ARITH_X4,channels_gt_4)186   TEST(F16_GAVGPOOL_CW__NEONFP16ARITH_X4, channels_gt_4) {
187     TEST_REQUIRES_ARM_NEON_FP16_ARITH;
188     for (size_t channels = 5; channels < 8; channels++) {
189       for (size_t elements = 1; elements < 16; elements += 3) {
190         GAvgPoolCWMicrokernelTester()
191           .elements(elements)
192           .channels(channels)
193           .Test(xnn_f16_gavgpool_cw_ukernel__neonfp16arith_x4, xnn_init_f16_gavgpool_neonfp16arith_x4_params);
194       }
195     }
196   }
197 
TEST(F16_GAVGPOOL_CW__NEONFP16ARITH_X4,channels_div_4)198   TEST(F16_GAVGPOOL_CW__NEONFP16ARITH_X4, channels_div_4) {
199     TEST_REQUIRES_ARM_NEON_FP16_ARITH;
200     for (size_t channels = 8; channels <= 16; channels += 4) {
201       for (size_t elements = 1; elements < 16; elements += 3) {
202         GAvgPoolCWMicrokernelTester()
203           .elements(elements)
204           .channels(channels)
205           .Test(xnn_f16_gavgpool_cw_ukernel__neonfp16arith_x4, xnn_init_f16_gavgpool_neonfp16arith_x4_params);
206       }
207     }
208   }
209 
TEST(F16_GAVGPOOL_CW__NEONFP16ARITH_X4,qmin)210   TEST(F16_GAVGPOOL_CW__NEONFP16ARITH_X4, qmin) {
211     TEST_REQUIRES_ARM_NEON_FP16_ARITH;
212     for (size_t elements = 1; elements < 16; elements += 3) {
213       GAvgPoolCWMicrokernelTester()
214         .elements(elements)
215         .channels(4)
216         .qmin(128)
217         .Test(xnn_f16_gavgpool_cw_ukernel__neonfp16arith_x4, xnn_init_f16_gavgpool_neonfp16arith_x4_params);
218     }
219   }
220 
TEST(F16_GAVGPOOL_CW__NEONFP16ARITH_X4,qmax)221   TEST(F16_GAVGPOOL_CW__NEONFP16ARITH_X4, qmax) {
222     TEST_REQUIRES_ARM_NEON_FP16_ARITH;
223     for (size_t elements = 1; elements < 16; elements += 3) {
224       GAvgPoolCWMicrokernelTester()
225         .elements(elements)
226         .channels(4)
227         .qmax(128)
228         .Test(xnn_f16_gavgpool_cw_ukernel__neonfp16arith_x4, xnn_init_f16_gavgpool_neonfp16arith_x4_params);
229     }
230   }
231 #endif  // XNN_ENABLE_ARM_FP16 && (XNN_ARCH_ARM || XNN_ARCH_ARM64)
232