xref: /btstack/port/renesas-tb-s1ja-cc256x/template/btstack_example/synergy/ssp/src/driver/r_gpt/hw/hw_gpt_private.h (revision 3b5c872a8c45689e8cc17891f01530f5aa5e911c)
1 /***********************************************************************************************************************
2  * Copyright [2015-2017] Renesas Electronics Corporation and/or its licensors. All Rights Reserved.
3  *
4  * This file is part of Renesas SynergyTM Software Package (SSP)
5  *
6  * The contents of this file (the "contents") are proprietary and confidential to Renesas Electronics Corporation
7  * and/or its licensors ("Renesas") and subject to statutory and contractual protections.
8  *
9  * This file is subject to a Renesas SSP license agreement. Unless otherwise agreed in an SSP license agreement with
10  * Renesas: 1) you may not use, copy, modify, distribute, display, or perform the contents; 2) you may not use any name
11  * or mark of Renesas for advertising or publicity purposes or in connection with your use of the contents; 3) RENESAS
12  * MAKES NO WARRANTY OR REPRESENTATIONS ABOUT THE SUITABILITY OF THE CONTENTS FOR ANY PURPOSE; THE CONTENTS ARE PROVIDED
13  * "AS IS" WITHOUT ANY EXPRESS OR IMPLIED WARRANTY, INCLUDING THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
14  * PARTICULAR PURPOSE, AND NON-INFRINGEMENT; AND 4) RENESAS SHALL NOT BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, OR
15  * CONSEQUENTIAL DAMAGES, INCLUDING DAMAGES RESULTING FROM LOSS OF USE, DATA, OR PROJECTS, WHETHER IN AN ACTION OF
16  * CONTRACT OR TORT, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THE CONTENTS. Third-party contents
17  * included in this file may be subject to different terms.
18  **********************************************************************************************************************/
19 
20 /**********************************************************************************************************************
21  * File Name    : hw_gpt_private.h
22  * Description  : Lower level driver interface to GPT.  Register setting and reading is done here.
23  **********************************************************************************************************************/
24 
25 #ifndef HW_GPT_PRIVATE_H
26 #define HW_GPT_PRIVATE_H
27 
28 /**********************************************************************************************************************
29  * Includes
30  **********************************************************************************************************************/
31 #include "bsp_api.h"
32 #include "r_gpt.h"
33 
34 /* Common macro for SSP header files. There is also a corresponding SSP_FOOTER macro at the end of this file. */
35 SSP_HEADER
36 /*******************************************************************************************************************//**
37  * @addtogroup GPT
38  * @{
39  **********************************************************************************************************************/
40 /**********************************************************************************************************************
41  * Macro Definitions
42  **********************************************************************************************************************/
43 
44 /**********************************************************************************************************************
45  * Typedef definitions
46  **********************************************************************************************************************/
47 /** Interrupt sources */
48 typedef enum e_gpt_int
49 {
50     GPT_INT_A_COMPARE_CAPTURE,
51     GPT_INT_B_COMPARE_CAPTURE,
52     GPT_INT_C_COMPARE,
53     GPT_INT_D_COMPARE,
54     GPT_INT_E_COMPARE,
55     GPT_INT_F_COMPARE,
56     GPT_INT_OVERFLOW,
57     GPT_INT_UNDERFLOW,
58     GPT_INT_AD_START_A,
59     GPT_INT_AD_START_B
60 } gpt_int_t;
61 
62 /** Timer modes */
63 typedef enum e_gpt_mode
64 {
65     GPT_MODE_PERIODIC  = 0,       ///< Timer will restart after delay expires.
66     GPT_MODE_ONE_SHOT  = 1,       ///< Timer will stop after delay expires.
67     GPT_MODE_INVALID_2 = 2,       ///< Setting prohibited.  Do not set this value.
68     GPT_MODE_INVALID_3 = 3,       ///< Setting prohibited.  Do not set this value.
69     GPT_MODE_TW_PWM_1  = 4,       ///< Triangle wave PWM mode 1 (16-bit transfer at crest) (single or double buffer)
70     GPT_MODE_TW_PWM_2  = 5,       ///< Triangle wave PWM mode 2 (16-bit transfer at trough) (single or double buffer)
71     GPT_MODE_TW_PWM_3  = 6,       ///< Triangle wave PWM mode 3 (32-bit transfer at trough) (fixed buffer)
72     GPT_MODE_INVALID_7 = 7,       ///< Setting prohibited.  Do not set this value.
73 } gpt_mode_t;
74 
75 /** Count direction */
76 typedef enum e_gpt_dir
77 {
78     GPT_DIR_COUNT_DOWN = 0,
79     GPT_DIR_COUNT_UP   = 1
80 } gpt_dir_t;
81 
82 /** PCLK divisors */
83 typedef enum e_gpt_pclk_div
84 {
85     GPT_PCLK_DIV_BY_1    = 0,
86     GPT_PCLK_DIV_BY_4    = 1,
87     GPT_PCLK_DIV_BY_16   = 2,
88     GPT_PCLK_DIV_BY_64   = 3,
89     GPT_PCLK_DIV_BY_256  = 4,
90     GPT_PCLK_DIV_BY_1024 = 5
91 } gpt_pclk_div_t;
92 
93 /** Input capture/compare match registers */
94 typedef enum e_gpt_capture_compare
95 {
96     GPT_CAPTURE_COMPARE_MATCH_A,
97     GPT_CAPTURE_COMPARE_MATCH_B,
98     GPT_COMPARE_MATCH_C,
99     GPT_COMPARE_MATCH_D,
100     GPT_COMPARE_MATCH_E,
101     GPT_COMPARE_MATCH_F
102 } gpt_capture_compare_t;
103 
104 /** Input/Output pins */
105 typedef enum e_gpt_gtioc
106 {
107     GPT_GTIOCA = 0,
108     GPT_GTIOCB = 1
109 } gpt_gtioc_t;
110 
111 /** Start/stop status to write to GTCR.CST bit */
112 typedef enum e_gpt_start_status
113 {
114     GPT_STOP  = 0,
115     GPT_START = 1,
116 } gpt_start_status_t;
117 
118 /** Duty cycle mode. */
119 typedef enum e_gpt_duty_cycle_mode
120 {
121     GPT_DUTY_CYCLE_MODE_REGISTER     = 0, ///< Duty cycle depends on compare match
122     GPT_DUTY_CYCLE_MODE_0_PERCENT    = 2, ///< Output low
123     GPT_DUTY_CYCLE_MODE_100_PERCENT  = 3, ///< Output high
124 } gpt_duty_cycle_mode_t;
125 
126 #if defined(__CC_ARM)
127 #pragma push
128 #pragma anon_unions
129 #elif defined(__ICCARM__)
130 #pragma language=extended
131 #elif defined(__GNUC__)
132 /* anonymous unions are enabled by default */
133 #elif defined(__TMS470__)
134 /* anonymous unions are enabled by default */
135 #elif defined(__TASKING__)
136 #pragma warning 586
137 #else // if defined(__CC_ARM)
138 #warning Not supported compiler type
139 #endif // if defined(__CC_ARM)
140 
141 typedef union
142 {
143     __IO uint16_t  GTIOR;                           /*!< (@ 0x40078034) General PWM Timer I/O Register
144                                                      *                        */
145 
146     /*LDRA_INSPECTED 381 S Anonymous structures and unions are allowed in SSP code. */
147     struct
148     {
149         __IO uint16_t  GTIOCM :  2;                 /*!< [0..1] GTIOCM Compare Match Output
150                                                      *                                   */
151         __IO uint16_t  GTIOCE :  2;                 /*!< [2..3] GTIOCE Cycle End Output
152                                                      *                                       */
153         __IO uint16_t  GTIOCI :  1;                 /*!< [4..4] GTIOCI Initial Output
154                                                      *                                         */
155         uint16_t              :  1;
156         __IO uint16_t  OADFLT :  2;                 /*!< [6..7] GTIOCA Pin Output Value Setting at the Count Stop
157                                                      *             */
158         __IO uint16_t  OAE    :  1;                 /*!< [8..8] GTIOCA Pin Output Enable
159                                                      *                                      */
160         __IO uint16_t  OADF   :  2;                 /*!< [9..10] GTIOCA Pin Disable Value Setting
161                                                      *                             */
162         uint16_t              :  2;
163         __IO uint16_t  NFAEN  :  1;                 /*!< [13..13] Noise Filter A Enable
164                                                      *                                       */
165         __IO uint16_t  NFCSA  :  2;                 /*!< [14..15] Noise Filter A Sampling Clock Select
166                                                      *                        */
167     }  GTIOR_b;                                     /*!< [32] BitSize
168                                                      *                                                         */
169 } gtior_t;
170 
171 /* --------------------  End of section using anonymous unions  ------------------- */
172 #if defined(__CC_ARM)
173 #pragma pop
174 #elif defined(__ICCARM__)
175 /* leave anonymous unions enabled */
176 #elif defined(__GNUC__)
177 /* anonymous unions are enabled by default */
178 #elif defined(__TMS470__)
179 /* anonymous unions are enabled by default */
180 #elif defined(__TASKING__)
181 #pragma warning restore
182 #else // if defined(__CC_ARM)
183 #warning Not supported compiler type
184 #endif // if defined(__CC_ARM)
185 
186 /**********************************************************************************************************************
187  * Function Prototypes
188  **********************************************************************************************************************/
189 
190 /**********************************************************************************************************************
191  * Includes
192  **********************************************************************************************************************/
193 /* Select implementation based on BSP here */
194 #include "common/hw_gpt_common.h"
195 
196 /* Common macro for SSP header files. There is also a corresponding SSP_HEADER macro at the top of this file. */
197 SSP_FOOTER
198 
199 #endif /* HW_GPT_PRIVATE_H */
200 /*******************************************************************************************************************//**
201  * @} (end addtogroup GPT)
202  **********************************************************************************************************************/
203