1 /*
2 * Copyright (c) 2021 Arm Limited.
3 *
4 * SPDX-License-Identifier: MIT
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to
8 * deal in the Software without restriction, including without limitation the
9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10 * sell copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22 * IN THE SOFTWARE.
23 */
24
25 #pragma once
26
27 #ifdef __ARM_FEATURE_SVE
28
29
30 namespace {
31
sve_transpose_interleave_8VL_1x4(uint8_t * out,const uint8_t * in,size_t width,size_t in_stride,size_t height)32 void sve_transpose_interleave_8VL_1x4(uint8_t *out, const uint8_t *in, size_t width, size_t in_stride, size_t height)
33 {
34 uint8_t *pad_row = reinterpret_cast<uint8_t *>(alloca(width * sizeof(uint8_t)));
35
36 if (height % 4) {
37 memset(pad_row, 0, width * sizeof(uint8_t));
38 }
39
40 size_t out_stride = 8 * roundup<size_t>(height, 4) * get_vector_length<uint32_t>();
41
42 __asm__ __volatile__(
43 "ptrue p1.b\n"
44 "1:" // Main row loop: Head
45 "mov x25, %x[in]\n"
46 "mov x24, %x[out]\n"
47 "add x23, x25, %x[in_stride]\n"
48 "add x22, x23, %x[in_stride]\n"
49 "add x21, x22, %x[in_stride]\n"
50 "add %x[in], x21, %x[in_stride]\n"
51 "cmp %x[height], #0x3\n"
52 "csel x21, x21, %x[pad_row], GT\n"
53 "csel x22, x22, %x[pad_row], GE\n"
54 "cmp %x[height], #0x1\n"
55 "csel x23, x23, %x[pad_row], GT\n"
56 "sub %x[height], %x[height], #0x4\n"
57 "mov x20, %x[width]\n"
58 "cntb x19, ALL, MUL #8\n"
59 "cmp x20, x19\n"
60 "blt 3f\n"
61 "2:" // Main row loop: Unroll column loop
62 "ld1b { z8.b }, p1/Z, [x25]\n"
63 "sub x20, x20, x19\n"
64 "ld1b { z24.b }, p1/Z, [x25, #1, MUL VL]\n"
65 "cmp x20, x19\n"
66 "ld1b { z27.b }, p1/Z, [x25, #2, MUL VL]\n"
67 "ld1b { z25.b }, p1/Z, [x25, #3, MUL VL]\n"
68 "ld1b { z7.b }, p1/Z, [x25, #4, MUL VL]\n"
69 "ld1b { z3.b }, p1/Z, [x25, #5, MUL VL]\n"
70 "ld1b { z14.b }, p1/Z, [x25, #6, MUL VL]\n"
71 "ld1b { z13.b }, p1/Z, [x25, #7, MUL VL]\n"
72 "addvl x25, x25, #8\n"
73 "ld1b { z16.b }, p1/Z, [x23]\n"
74 "ld1b { z12.b }, p1/Z, [x23, #1, MUL VL]\n"
75 "ld1b { z15.b }, p1/Z, [x23, #2, MUL VL]\n"
76 "ld1b { z11.b }, p1/Z, [x23, #3, MUL VL]\n"
77 "ld1b { z4.b }, p1/Z, [x23, #4, MUL VL]\n"
78 "ld1b { z5.b }, p1/Z, [x23, #5, MUL VL]\n"
79 "ld1b { z26.b }, p1/Z, [x23, #6, MUL VL]\n"
80 "ld1b { z30.b }, p1/Z, [x23, #7, MUL VL]\n"
81 "addvl x23, x23, #8\n"
82 "ld1b { z22.b }, p1/Z, [x22]\n"
83 "zip1 z21.b, z8.b, z22.b\n"
84 "ld1b { z2.b }, p1/Z, [x22, #1, MUL VL]\n"
85 "zip2 z20.b, z8.b, z22.b\n"
86 "ld1b { z18.b }, p1/Z, [x22, #2, MUL VL]\n"
87 "ld1b { z17.b }, p1/Z, [x22, #3, MUL VL]\n"
88 "zip1 z10.b, z24.b, z2.b\n"
89 "ld1b { z22.b }, p1/Z, [x22, #4, MUL VL]\n"
90 "zip2 z9.b, z24.b, z2.b\n"
91 "ld1b { z6.b }, p1/Z, [x22, #5, MUL VL]\n"
92 "zip1 z0.b, z27.b, z18.b\n"
93 "ld1b { z1.b }, p1/Z, [x22, #6, MUL VL]\n"
94 "zip2 z28.b, z27.b, z18.b\n"
95 "ld1b { z23.b }, p1/Z, [x22, #7, MUL VL]\n"
96 "addvl x22, x22, #8\n"
97 "zip1 z31.b, z25.b, z17.b\n"
98 "ld1b { z19.b }, p1/Z, [x21]\n"
99 "zip2 z8.b, z25.b, z17.b\n"
100 "ld1b { z2.b }, p1/Z, [x21, #1, MUL VL]\n"
101 "zip1 z27.b, z7.b, z22.b\n"
102 "ld1b { z29.b }, p1/Z, [x21, #2, MUL VL]\n"
103 "zip2 z7.b, z7.b, z22.b\n"
104 "ld1b { z24.b }, p1/Z, [x21, #3, MUL VL]\n"
105 "zip1 z18.b, z16.b, z19.b\n"
106 "ld1b { z25.b }, p1/Z, [x21, #4, MUL VL]\n"
107 "zip1 z17.b, z21.b, z18.b\n"
108 "ld1b { z22.b }, p1/Z, [x21, #5, MUL VL]\n"
109 "zip2 z18.b, z21.b, z18.b\n"
110 "ld1b { z21.b }, p1/Z, [x21, #6, MUL VL]\n"
111 "zip2 z16.b, z16.b, z19.b\n"
112 "ld1b { z19.b }, p1/Z, [x21, #7, MUL VL]\n"
113 "addvl x21, x21, #8\n"
114 "st1b { z17.b }, p1, [x24]\n"
115 "zip1 z17.b, z20.b, z16.b\n"
116 "zip2 z20.b, z20.b, z16.b\n"
117 "st1b { z18.b }, p1, [x24, #1, MUL VL]\n"
118 "zip1 z16.b, z12.b, z2.b\n"
119 "st1b { z17.b }, p1, [x24, #2, MUL VL]\n"
120 "zip1 z17.b, z10.b, z16.b\n"
121 "st1b { z20.b }, p1, [x24, #3, MUL VL]\n"
122 "zip2 z16.b, z10.b, z16.b\n"
123 "st1b { z17.b }, p1, [x24, #4, MUL VL]\n"
124 "zip2 z17.b, z12.b, z2.b\n"
125 "st1b { z16.b }, p1, [x24, #5, MUL VL]\n"
126 "zip1 z16.b, z9.b, z17.b\n"
127 "st1b { z16.b }, p1, [x24, #6, MUL VL]\n"
128 "zip2 z16.b, z9.b, z17.b\n"
129 "st1b { z16.b }, p1, [x24, #7, MUL VL]\n"
130 "add x24, x24, %x[out_stride]\n"
131 "zip1 z18.b, z15.b, z29.b\n"
132 "zip2 z17.b, z15.b, z29.b\n"
133 "zip1 z16.b, z0.b, z18.b\n"
134 "st1b { z16.b }, p1, [x24]\n"
135 "zip2 z16.b, z0.b, z18.b\n"
136 "st1b { z16.b }, p1, [x24, #1, MUL VL]\n"
137 "zip1 z16.b, z28.b, z17.b\n"
138 "st1b { z16.b }, p1, [x24, #2, MUL VL]\n"
139 "zip2 z16.b, z28.b, z17.b\n"
140 "st1b { z16.b }, p1, [x24, #3, MUL VL]\n"
141 "zip1 z17.b, z11.b, z24.b\n"
142 "zip1 z16.b, z31.b, z17.b\n"
143 "st1b { z16.b }, p1, [x24, #4, MUL VL]\n"
144 "zip2 z16.b, z31.b, z17.b\n"
145 "st1b { z16.b }, p1, [x24, #5, MUL VL]\n"
146 "zip2 z17.b, z11.b, z24.b\n"
147 "zip1 z16.b, z8.b, z17.b\n"
148 "st1b { z16.b }, p1, [x24, #6, MUL VL]\n"
149 "zip2 z16.b, z8.b, z17.b\n"
150 "st1b { z16.b }, p1, [x24, #7, MUL VL]\n"
151 "add x24, x24, %x[out_stride]\n"
152 "zip1 z18.b, z4.b, z25.b\n"
153 "zip2 z17.b, z4.b, z25.b\n"
154 "zip1 z16.b, z27.b, z18.b\n"
155 "st1b { z16.b }, p1, [x24]\n"
156 "zip2 z16.b, z27.b, z18.b\n"
157 "st1b { z16.b }, p1, [x24, #1, MUL VL]\n"
158 "zip1 z16.b, z7.b, z17.b\n"
159 "st1b { z16.b }, p1, [x24, #2, MUL VL]\n"
160 "zip2 z16.b, z7.b, z17.b\n"
161 "st1b { z16.b }, p1, [x24, #3, MUL VL]\n"
162 "zip1 z18.b, z3.b, z6.b\n"
163 "zip1 z17.b, z5.b, z22.b\n"
164 "zip1 z16.b, z18.b, z17.b\n"
165 "st1b { z16.b }, p1, [x24, #4, MUL VL]\n"
166 "zip2 z16.b, z18.b, z17.b\n"
167 "st1b { z16.b }, p1, [x24, #5, MUL VL]\n"
168 "zip2 z18.b, z3.b, z6.b\n"
169 "zip2 z17.b, z5.b, z22.b\n"
170 "zip1 z16.b, z18.b, z17.b\n"
171 "st1b { z16.b }, p1, [x24, #6, MUL VL]\n"
172 "zip2 z16.b, z18.b, z17.b\n"
173 "st1b { z16.b }, p1, [x24, #7, MUL VL]\n"
174 "add x24, x24, %x[out_stride]\n"
175 "zip1 z18.b, z14.b, z1.b\n"
176 "zip1 z17.b, z26.b, z21.b\n"
177 "zip1 z16.b, z18.b, z17.b\n"
178 "st1b { z16.b }, p1, [x24]\n"
179 "zip2 z16.b, z18.b, z17.b\n"
180 "st1b { z16.b }, p1, [x24, #1, MUL VL]\n"
181 "zip2 z18.b, z14.b, z1.b\n"
182 "zip2 z17.b, z26.b, z21.b\n"
183 "zip1 z16.b, z18.b, z17.b\n"
184 "st1b { z16.b }, p1, [x24, #2, MUL VL]\n"
185 "zip2 z16.b, z18.b, z17.b\n"
186 "st1b { z16.b }, p1, [x24, #3, MUL VL]\n"
187 "zip1 z18.b, z13.b, z23.b\n"
188 "zip1 z17.b, z30.b, z19.b\n"
189 "zip1 z16.b, z18.b, z17.b\n"
190 "st1b { z16.b }, p1, [x24, #4, MUL VL]\n"
191 "zip2 z16.b, z18.b, z17.b\n"
192 "st1b { z16.b }, p1, [x24, #5, MUL VL]\n"
193 "zip2 z18.b, z13.b, z23.b\n"
194 "zip2 z17.b, z30.b, z19.b\n"
195 "zip1 z16.b, z18.b, z17.b\n"
196 "st1b { z16.b }, p1, [x24, #6, MUL VL]\n"
197 "zip2 z16.b, z18.b, z17.b\n"
198 "st1b { z16.b }, p1, [x24, #7, MUL VL]\n"
199 "add x24, x24, %x[out_stride]\n"
200 "bge 2b\n"
201 "3:" // Main row loop: Unroll column loop skip
202 "cbz x20, 5f\n"
203 "4:" // Main row loop: Column loop
204 "mov x19, x20\n"
205 "decw x20, ALL, MUL #8\n"
206 "whilelt p0.b, XZR, x19\n"
207 "ld1b { z17.b }, p0/Z, [x25]\n"
208 "ld1b { z25.b }, p0/Z, [x23]\n"
209 "decb x19\n"
210 "ld1b { z16.b }, p0/Z, [x22]\n"
211 "zip1 z18.b, z17.b, z16.b\n"
212 "ld1b { z24.b }, p0/Z, [x21]\n"
213 "whilelt p0.b, XZR, x19\n"
214 "zip2 z23.b, z17.b, z16.b\n"
215 "ld1b { z22.b }, p0/Z, [x25, #1, MUL VL]\n"
216 "addvl x25, x25, #2\n"
217 "zip1 z16.b, z25.b, z24.b\n"
218 "ld1b { z21.b }, p0/Z, [x23, #1, MUL VL]\n"
219 "addvl x23, x23, #2\n"
220 "zip1 z17.b, z18.b, z16.b\n"
221 "ld1b { z20.b }, p0/Z, [x22, #1, MUL VL]\n"
222 "addvl x22, x22, #2\n"
223 "zip2 z18.b, z18.b, z16.b\n"
224 "ld1b { z19.b }, p0/Z, [x21, #1, MUL VL]\n"
225 "addvl x21, x21, #2\n"
226 "zip2 z16.b, z25.b, z24.b\n"
227 "st1b { z17.b }, p1, [x24]\n"
228 "cmp x20, #0x0\n"
229 "zip1 z17.b, z23.b, z16.b\n"
230 "st1b { z18.b }, p1, [x24, #1, MUL VL]\n"
231 "zip2 z16.b, z23.b, z16.b\n"
232 "st1b { z17.b }, p1, [x24, #2, MUL VL]\n"
233 "zip1 z18.b, z22.b, z20.b\n"
234 "st1b { z16.b }, p1, [x24, #3, MUL VL]\n"
235 "zip1 z17.b, z21.b, z19.b\n"
236 "zip1 z16.b, z18.b, z17.b\n"
237 "st1b { z16.b }, p1, [x24, #4, MUL VL]\n"
238 "zip2 z16.b, z18.b, z17.b\n"
239 "st1b { z16.b }, p1, [x24, #5, MUL VL]\n"
240 "zip2 z18.b, z22.b, z20.b\n"
241 "zip2 z17.b, z21.b, z19.b\n"
242 "zip1 z16.b, z18.b, z17.b\n"
243 "st1b { z16.b }, p1, [x24, #6, MUL VL]\n"
244 "zip2 z16.b, z18.b, z17.b\n"
245 "st1b { z16.b }, p1, [x24, #7, MUL VL]\n"
246 "add x24, x24, %x[out_stride]\n"
247 "bgt 4b\n"
248 "5:" // Main row loop: Column loop skip
249 "addvl %x[out], %x[out], #8\n"
250 "cmp %x[height], #0x1\n"
251 "bge 1b\n"
252 : [height] "+&r" (height), [in] "+&r" (in), [out] "+&r" (out)
253 : [in_stride] "r" (in_stride), [out_stride] "r" (out_stride), [pad_row] "r" (pad_row), [width] "r" (width)
254 : "cc", "memory", "p0", "p1", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
255 );
256 }
257
258 } // anonymous namespace
259
260 template<>
Transform(uint8_t * out,const uint8_t * in,int stride,int x0,int xmax,int k0,int kmax)261 void Transform<8, 4, true, VLType::SVE>(
262 uint8_t *out, const uint8_t *in, int stride, int x0, int xmax, int k0, int kmax)
263 {
264 sve_transpose_interleave_8VL_1x4(
265 reinterpret_cast<uint8_t *>(out),
266 reinterpret_cast<const uint8_t *>(in + k0 * stride + x0),
267 (xmax-x0) * sizeof(uint8_t) / 1,
268 stride * sizeof(uint8_t),
269 (kmax-k0)
270 );
271 }
272
273 template<>
Transform(int8_t * out,const int8_t * in,int stride,int x0,int xmax,int k0,int kmax)274 void Transform<8, 4, true, VLType::SVE>(
275 int8_t *out, const int8_t *in, int stride, int x0, int xmax, int k0, int kmax)
276 {
277 sve_transpose_interleave_8VL_1x4(
278 reinterpret_cast<uint8_t *>(out),
279 reinterpret_cast<const uint8_t *>(in + k0 * stride + x0),
280 (xmax-x0) * sizeof(int8_t) / 1,
281 stride * sizeof(int8_t),
282 (kmax-k0)
283 );
284 }
285
286 #endif
287