1 /**
2 ******************************************************************************
3 * @file stm32l4xx_ll_exti.h
4 * @author MCD Application Team
5 * @brief Header file of EXTI LL module.
6 ******************************************************************************
7 * @attention
8 *
9 * <h2><center>© Copyright (c) 2017 STMicroelectronics.
10 * All rights reserved.</center></h2>
11 *
12 * This software component is licensed by ST under BSD 3-Clause license,
13 * the "License"; You may not use this file except in compliance with the
14 * License. You may obtain a copy of the License at:
15 * opensource.org/licenses/BSD-3-Clause
16 *
17 ******************************************************************************
18 */
19
20 /* Define to prevent recursive inclusion -------------------------------------*/
21 #ifndef STM32L4xx_LL_EXTI_H
22 #define STM32L4xx_LL_EXTI_H
23
24 #ifdef __cplusplus
25 extern "C" {
26 #endif
27
28 /* Includes ------------------------------------------------------------------*/
29 #include "stm32l4xx.h"
30
31 /** @addtogroup STM32L4xx_LL_Driver
32 * @{
33 */
34
35 #if defined (EXTI)
36
37 /** @defgroup EXTI_LL EXTI
38 * @{
39 */
40
41 /* Private types -------------------------------------------------------------*/
42 /* Private variables ---------------------------------------------------------*/
43 /* Private constants ---------------------------------------------------------*/
44 /* Private Macros ------------------------------------------------------------*/
45 #if defined(USE_FULL_LL_DRIVER)
46 /** @defgroup EXTI_LL_Private_Macros EXTI Private Macros
47 * @{
48 */
49 /**
50 * @}
51 */
52 #endif /*USE_FULL_LL_DRIVER*/
53 /* Exported types ------------------------------------------------------------*/
54 #if defined(USE_FULL_LL_DRIVER)
55 /** @defgroup EXTI_LL_ES_INIT EXTI Exported Init structure
56 * @{
57 */
58 typedef struct
59 {
60
61 uint32_t Line_0_31; /*!< Specifies the EXTI lines to be enabled or disabled for Lines in range 0 to 31
62 This parameter can be any combination of @ref EXTI_LL_EC_LINE */
63
64 uint32_t Line_32_63; /*!< Specifies the EXTI lines to be enabled or disabled for Lines in range 32 to 63
65 This parameter can be any combination of @ref EXTI_LL_EC_LINE */
66
67 FunctionalState LineCommand; /*!< Specifies the new state of the selected EXTI lines.
68 This parameter can be set either to ENABLE or DISABLE */
69
70 uint8_t Mode; /*!< Specifies the mode for the EXTI lines.
71 This parameter can be a value of @ref EXTI_LL_EC_MODE. */
72
73 uint8_t Trigger; /*!< Specifies the trigger signal active edge for the EXTI lines.
74 This parameter can be a value of @ref EXTI_LL_EC_TRIGGER. */
75 } LL_EXTI_InitTypeDef;
76
77 /**
78 * @}
79 */
80 #endif /*USE_FULL_LL_DRIVER*/
81
82 /* Exported constants --------------------------------------------------------*/
83 /** @defgroup EXTI_LL_Exported_Constants EXTI Exported Constants
84 * @{
85 */
86
87 /** @defgroup EXTI_LL_EC_LINE LINE
88 * @{
89 */
90 #define LL_EXTI_LINE_0 EXTI_IMR1_IM0 /*!< Extended line 0 */
91 #define LL_EXTI_LINE_1 EXTI_IMR1_IM1 /*!< Extended line 1 */
92 #define LL_EXTI_LINE_2 EXTI_IMR1_IM2 /*!< Extended line 2 */
93 #define LL_EXTI_LINE_3 EXTI_IMR1_IM3 /*!< Extended line 3 */
94 #define LL_EXTI_LINE_4 EXTI_IMR1_IM4 /*!< Extended line 4 */
95 #define LL_EXTI_LINE_5 EXTI_IMR1_IM5 /*!< Extended line 5 */
96 #define LL_EXTI_LINE_6 EXTI_IMR1_IM6 /*!< Extended line 6 */
97 #define LL_EXTI_LINE_7 EXTI_IMR1_IM7 /*!< Extended line 7 */
98 #define LL_EXTI_LINE_8 EXTI_IMR1_IM8 /*!< Extended line 8 */
99 #define LL_EXTI_LINE_9 EXTI_IMR1_IM9 /*!< Extended line 9 */
100 #define LL_EXTI_LINE_10 EXTI_IMR1_IM10 /*!< Extended line 10 */
101 #define LL_EXTI_LINE_11 EXTI_IMR1_IM11 /*!< Extended line 11 */
102 #define LL_EXTI_LINE_12 EXTI_IMR1_IM12 /*!< Extended line 12 */
103 #define LL_EXTI_LINE_13 EXTI_IMR1_IM13 /*!< Extended line 13 */
104 #define LL_EXTI_LINE_14 EXTI_IMR1_IM14 /*!< Extended line 14 */
105 #define LL_EXTI_LINE_15 EXTI_IMR1_IM15 /*!< Extended line 15 */
106 #if defined(EXTI_IMR1_IM16)
107 #define LL_EXTI_LINE_16 EXTI_IMR1_IM16 /*!< Extended line 16 */
108 #endif
109 #define LL_EXTI_LINE_17 EXTI_IMR1_IM17 /*!< Extended line 17 */
110 #if defined(EXTI_IMR1_IM18)
111 #define LL_EXTI_LINE_18 EXTI_IMR1_IM18 /*!< Extended line 18 */
112 #endif
113 #define LL_EXTI_LINE_19 EXTI_IMR1_IM19 /*!< Extended line 19 */
114 #if defined(EXTI_IMR1_IM20)
115 #define LL_EXTI_LINE_20 EXTI_IMR1_IM20 /*!< Extended line 20 */
116 #endif
117 #if defined(EXTI_IMR1_IM21)
118 #define LL_EXTI_LINE_21 EXTI_IMR1_IM21 /*!< Extended line 21 */
119 #endif
120 #if defined(EXTI_IMR1_IM22)
121 #define LL_EXTI_LINE_22 EXTI_IMR1_IM22 /*!< Extended line 22 */
122 #endif
123 #define LL_EXTI_LINE_23 EXTI_IMR1_IM23 /*!< Extended line 23 */
124 #if defined(EXTI_IMR1_IM24)
125 #define LL_EXTI_LINE_24 EXTI_IMR1_IM24 /*!< Extended line 24 */
126 #endif
127 #if defined(EXTI_IMR1_IM25)
128 #define LL_EXTI_LINE_25 EXTI_IMR1_IM25 /*!< Extended line 25 */
129 #endif
130 #if defined(EXTI_IMR1_IM26)
131 #define LL_EXTI_LINE_26 EXTI_IMR1_IM26 /*!< Extended line 26 */
132 #endif
133 #if defined(EXTI_IMR1_IM27)
134 #define LL_EXTI_LINE_27 EXTI_IMR1_IM27 /*!< Extended line 27 */
135 #endif
136 #if defined(EXTI_IMR1_IM28)
137 #define LL_EXTI_LINE_28 EXTI_IMR1_IM28 /*!< Extended line 28 */
138 #endif
139 #if defined(EXTI_IMR1_IM29)
140 #define LL_EXTI_LINE_29 EXTI_IMR1_IM29 /*!< Extended line 29 */
141 #endif
142 #if defined(EXTI_IMR1_IM30)
143 #define LL_EXTI_LINE_30 EXTI_IMR1_IM30 /*!< Extended line 30 */
144 #endif
145 #if defined(EXTI_IMR1_IM31)
146 #define LL_EXTI_LINE_31 EXTI_IMR1_IM31 /*!< Extended line 31 */
147 #endif
148 #define LL_EXTI_LINE_ALL_0_31 EXTI_IMR1_IM /*!< All Extended line not reserved*/
149
150 #define LL_EXTI_LINE_32 EXTI_IMR2_IM32 /*!< Extended line 32 */
151 #if defined(EXTI_IMR2_IM33)
152 #define LL_EXTI_LINE_33 EXTI_IMR2_IM33 /*!< Extended line 33 */
153 #endif
154 #if defined(EXTI_IMR2_IM34)
155 #define LL_EXTI_LINE_34 EXTI_IMR2_IM34 /*!< Extended line 34 */
156 #endif
157 #if defined(EXTI_IMR2_IM35)
158 #define LL_EXTI_LINE_35 EXTI_IMR2_IM35 /*!< Extended line 35 */
159 #endif
160 #if defined(EXTI_IMR2_IM36)
161 #define LL_EXTI_LINE_36 EXTI_IMR2_IM36 /*!< Extended line 36 */
162 #endif
163 #if defined(EXTI_IMR2_IM37)
164 #define LL_EXTI_LINE_37 EXTI_IMR2_IM37 /*!< Extended line 37 */
165 #endif
166 #if defined(EXTI_IMR2_IM38)
167 #define LL_EXTI_LINE_38 EXTI_IMR2_IM38 /*!< Extended line 38 */
168 #endif
169 #if defined(EXTI_IMR2_IM39)
170 #define LL_EXTI_LINE_39 EXTI_IMR2_IM39 /*!< Extended line 39 */
171 #endif
172 #if defined(EXTI_IMR2_IM40)
173 #define LL_EXTI_LINE_40 EXTI_IMR2_IM40 /*!< Extended line 40 */
174 #endif
175 #define LL_EXTI_LINE_ALL_32_63 EXTI_IMR2_IM /*!< All Extended line not reserved*/
176
177
178 #define LL_EXTI_LINE_ALL (0xFFFFFFFFU) /*!< All Extended line */
179
180 #if defined(USE_FULL_LL_DRIVER)
181 #define LL_EXTI_LINE_NONE (0x00000000U) /*!< None Extended line */
182 #endif /*USE_FULL_LL_DRIVER*/
183
184 /**
185 * @}
186 */
187
188
189 #if defined(USE_FULL_LL_DRIVER)
190
191 /** @defgroup EXTI_LL_EC_MODE Mode
192 * @{
193 */
194 #define LL_EXTI_MODE_IT ((uint8_t)0x00U) /*!< Interrupt Mode */
195 #define LL_EXTI_MODE_EVENT ((uint8_t)0x01U) /*!< Event Mode */
196 #define LL_EXTI_MODE_IT_EVENT ((uint8_t)0x02U) /*!< Interrupt & Event Mode */
197 /**
198 * @}
199 */
200
201 /** @defgroup EXTI_LL_EC_TRIGGER Edge Trigger
202 * @{
203 */
204 #define LL_EXTI_TRIGGER_NONE ((uint8_t)0x00U) /*!< No Trigger Mode */
205 #define LL_EXTI_TRIGGER_RISING ((uint8_t)0x01U) /*!< Trigger Rising Mode */
206 #define LL_EXTI_TRIGGER_FALLING ((uint8_t)0x02U) /*!< Trigger Falling Mode */
207 #define LL_EXTI_TRIGGER_RISING_FALLING ((uint8_t)0x03U) /*!< Trigger Rising & Falling Mode */
208
209 /**
210 * @}
211 */
212
213
214 #endif /*USE_FULL_LL_DRIVER*/
215
216
217 /**
218 * @}
219 */
220
221 /* Exported macro ------------------------------------------------------------*/
222 /** @defgroup EXTI_LL_Exported_Macros EXTI Exported Macros
223 * @{
224 */
225
226 /** @defgroup EXTI_LL_EM_WRITE_READ Common Write and read registers Macros
227 * @{
228 */
229
230 /**
231 * @brief Write a value in EXTI register
232 * @param __REG__ Register to be written
233 * @param __VALUE__ Value to be written in the register
234 * @retval None
235 */
236 #define LL_EXTI_WriteReg(__REG__, __VALUE__) WRITE_REG(EXTI->__REG__, (__VALUE__))
237
238 /**
239 * @brief Read a value in EXTI register
240 * @param __REG__ Register to be read
241 * @retval Register value
242 */
243 #define LL_EXTI_ReadReg(__REG__) READ_REG(EXTI->__REG__)
244 /**
245 * @}
246 */
247
248
249 /**
250 * @}
251 */
252
253
254
255 /* Exported functions --------------------------------------------------------*/
256 /** @defgroup EXTI_LL_Exported_Functions EXTI Exported Functions
257 * @{
258 */
259 /** @defgroup EXTI_LL_EF_IT_Management IT_Management
260 * @{
261 */
262
263 /**
264 * @brief Enable ExtiLine Interrupt request for Lines in range 0 to 31
265 * @note The reset value for the direct or internal lines (see RM)
266 * is set to 1 in order to enable the interrupt by default.
267 * Bits are set automatically at Power on.
268 * @rmtoll IMR1 IMx LL_EXTI_EnableIT_0_31
269 * @param ExtiLine This parameter can be one of the following values:
270 * @arg @ref LL_EXTI_LINE_0
271 * @arg @ref LL_EXTI_LINE_1
272 * @arg @ref LL_EXTI_LINE_2
273 * @arg @ref LL_EXTI_LINE_3
274 * @arg @ref LL_EXTI_LINE_4
275 * @arg @ref LL_EXTI_LINE_5
276 * @arg @ref LL_EXTI_LINE_6
277 * @arg @ref LL_EXTI_LINE_7
278 * @arg @ref LL_EXTI_LINE_8
279 * @arg @ref LL_EXTI_LINE_9
280 * @arg @ref LL_EXTI_LINE_10
281 * @arg @ref LL_EXTI_LINE_11
282 * @arg @ref LL_EXTI_LINE_12
283 * @arg @ref LL_EXTI_LINE_13
284 * @arg @ref LL_EXTI_LINE_14
285 * @arg @ref LL_EXTI_LINE_15
286 * @arg @ref LL_EXTI_LINE_16
287 * @arg @ref LL_EXTI_LINE_17
288 * @arg @ref LL_EXTI_LINE_18
289 * @arg @ref LL_EXTI_LINE_19
290 * @arg @ref LL_EXTI_LINE_20
291 * @arg @ref LL_EXTI_LINE_21
292 * @arg @ref LL_EXTI_LINE_22
293 * @arg @ref LL_EXTI_LINE_23
294 * @arg @ref LL_EXTI_LINE_24
295 * @arg @ref LL_EXTI_LINE_25
296 * @arg @ref LL_EXTI_LINE_26
297 * @arg @ref LL_EXTI_LINE_27
298 * @arg @ref LL_EXTI_LINE_28
299 * @arg @ref LL_EXTI_LINE_29
300 * @arg @ref LL_EXTI_LINE_30
301 * @arg @ref LL_EXTI_LINE_31
302 * @arg @ref LL_EXTI_LINE_ALL_0_31
303 * @note Please check each device line mapping for EXTI Line availability
304 * @retval None
305 */
LL_EXTI_EnableIT_0_31(uint32_t ExtiLine)306 __STATIC_INLINE void LL_EXTI_EnableIT_0_31(uint32_t ExtiLine)
307 {
308 SET_BIT(EXTI->IMR1, ExtiLine);
309 }
310 /**
311 * @brief Enable ExtiLine Interrupt request for Lines in range 32 to 63
312 * @note The reset value for the direct lines (lines from 32 to 34, line
313 * 39) is set to 1 in order to enable the interrupt by default.
314 * Bits are set automatically at Power on.
315 * @rmtoll IMR2 IMx LL_EXTI_EnableIT_32_63
316 * @param ExtiLine This parameter can be one of the following values:
317 * @arg @ref LL_EXTI_LINE_32
318 * @arg @ref LL_EXTI_LINE_33
319 * @arg @ref LL_EXTI_LINE_34(*)
320 * @arg @ref LL_EXTI_LINE_35
321 * @arg @ref LL_EXTI_LINE_36
322 * @arg @ref LL_EXTI_LINE_37
323 * @arg @ref LL_EXTI_LINE_38
324 * @arg @ref LL_EXTI_LINE_39(*)
325 * @arg @ref LL_EXTI_LINE_40(*)
326 * @arg @ref LL_EXTI_LINE_ALL_32_63
327 * @note (*): Available in some devices
328 * @retval None
329 */
LL_EXTI_EnableIT_32_63(uint32_t ExtiLine)330 __STATIC_INLINE void LL_EXTI_EnableIT_32_63(uint32_t ExtiLine)
331 {
332 SET_BIT(EXTI->IMR2, ExtiLine);
333 }
334
335 /**
336 * @brief Disable ExtiLine Interrupt request for Lines in range 0 to 31
337 * @note The reset value for the direct or internal lines (see RM)
338 * is set to 1 in order to enable the interrupt by default.
339 * Bits are set automatically at Power on.
340 * @rmtoll IMR1 IMx LL_EXTI_DisableIT_0_31
341 * @param ExtiLine This parameter can be one of the following values:
342 * @arg @ref LL_EXTI_LINE_0
343 * @arg @ref LL_EXTI_LINE_1
344 * @arg @ref LL_EXTI_LINE_2
345 * @arg @ref LL_EXTI_LINE_3
346 * @arg @ref LL_EXTI_LINE_4
347 * @arg @ref LL_EXTI_LINE_5
348 * @arg @ref LL_EXTI_LINE_6
349 * @arg @ref LL_EXTI_LINE_7
350 * @arg @ref LL_EXTI_LINE_8
351 * @arg @ref LL_EXTI_LINE_9
352 * @arg @ref LL_EXTI_LINE_10
353 * @arg @ref LL_EXTI_LINE_11
354 * @arg @ref LL_EXTI_LINE_12
355 * @arg @ref LL_EXTI_LINE_13
356 * @arg @ref LL_EXTI_LINE_14
357 * @arg @ref LL_EXTI_LINE_15
358 * @arg @ref LL_EXTI_LINE_16
359 * @arg @ref LL_EXTI_LINE_17
360 * @arg @ref LL_EXTI_LINE_18
361 * @arg @ref LL_EXTI_LINE_19
362 * @arg @ref LL_EXTI_LINE_20
363 * @arg @ref LL_EXTI_LINE_21
364 * @arg @ref LL_EXTI_LINE_22
365 * @arg @ref LL_EXTI_LINE_23
366 * @arg @ref LL_EXTI_LINE_24
367 * @arg @ref LL_EXTI_LINE_25
368 * @arg @ref LL_EXTI_LINE_26
369 * @arg @ref LL_EXTI_LINE_27
370 * @arg @ref LL_EXTI_LINE_28
371 * @arg @ref LL_EXTI_LINE_29
372 * @arg @ref LL_EXTI_LINE_30
373 * @arg @ref LL_EXTI_LINE_31
374 * @arg @ref LL_EXTI_LINE_ALL_0_31
375 * @note Please check each device line mapping for EXTI Line availability
376 * @retval None
377 */
LL_EXTI_DisableIT_0_31(uint32_t ExtiLine)378 __STATIC_INLINE void LL_EXTI_DisableIT_0_31(uint32_t ExtiLine)
379 {
380 CLEAR_BIT(EXTI->IMR1, ExtiLine);
381 }
382
383 /**
384 * @brief Disable ExtiLine Interrupt request for Lines in range 32 to 63
385 * @note The reset value for the direct lines (lines from 32 to 34, line
386 * 39) is set to 1 in order to enable the interrupt by default.
387 * Bits are set automatically at Power on.
388 * @rmtoll IMR2 IMx LL_EXTI_DisableIT_32_63
389 * @param ExtiLine This parameter can be one of the following values:
390 * @arg @ref LL_EXTI_LINE_32
391 * @arg @ref LL_EXTI_LINE_33
392 * @arg @ref LL_EXTI_LINE_34(*)
393 * @arg @ref LL_EXTI_LINE_35
394 * @arg @ref LL_EXTI_LINE_36
395 * @arg @ref LL_EXTI_LINE_37
396 * @arg @ref LL_EXTI_LINE_38
397 * @arg @ref LL_EXTI_LINE_39(*)
398 * @arg @ref LL_EXTI_LINE_40(*)
399 * @arg @ref LL_EXTI_LINE_ALL_32_63
400 * @note (*): Available in some devices
401 * @retval None
402 */
LL_EXTI_DisableIT_32_63(uint32_t ExtiLine)403 __STATIC_INLINE void LL_EXTI_DisableIT_32_63(uint32_t ExtiLine)
404 {
405 CLEAR_BIT(EXTI->IMR2, ExtiLine);
406 }
407
408 /**
409 * @brief Indicate if ExtiLine Interrupt request is enabled for Lines in range 0 to 31
410 * @note The reset value for the direct or internal lines (see RM)
411 * is set to 1 in order to enable the interrupt by default.
412 * Bits are set automatically at Power on.
413 * @rmtoll IMR1 IMx LL_EXTI_IsEnabledIT_0_31
414 * @param ExtiLine This parameter can be one of the following values:
415 * @arg @ref LL_EXTI_LINE_0
416 * @arg @ref LL_EXTI_LINE_1
417 * @arg @ref LL_EXTI_LINE_2
418 * @arg @ref LL_EXTI_LINE_3
419 * @arg @ref LL_EXTI_LINE_4
420 * @arg @ref LL_EXTI_LINE_5
421 * @arg @ref LL_EXTI_LINE_6
422 * @arg @ref LL_EXTI_LINE_7
423 * @arg @ref LL_EXTI_LINE_8
424 * @arg @ref LL_EXTI_LINE_9
425 * @arg @ref LL_EXTI_LINE_10
426 * @arg @ref LL_EXTI_LINE_11
427 * @arg @ref LL_EXTI_LINE_12
428 * @arg @ref LL_EXTI_LINE_13
429 * @arg @ref LL_EXTI_LINE_14
430 * @arg @ref LL_EXTI_LINE_15
431 * @arg @ref LL_EXTI_LINE_16
432 * @arg @ref LL_EXTI_LINE_17
433 * @arg @ref LL_EXTI_LINE_18
434 * @arg @ref LL_EXTI_LINE_19
435 * @arg @ref LL_EXTI_LINE_20
436 * @arg @ref LL_EXTI_LINE_21
437 * @arg @ref LL_EXTI_LINE_22
438 * @arg @ref LL_EXTI_LINE_23
439 * @arg @ref LL_EXTI_LINE_24
440 * @arg @ref LL_EXTI_LINE_25
441 * @arg @ref LL_EXTI_LINE_26
442 * @arg @ref LL_EXTI_LINE_27
443 * @arg @ref LL_EXTI_LINE_28
444 * @arg @ref LL_EXTI_LINE_29
445 * @arg @ref LL_EXTI_LINE_30
446 * @arg @ref LL_EXTI_LINE_31
447 * @arg @ref LL_EXTI_LINE_ALL_0_31
448 * @note Please check each device line mapping for EXTI Line availability
449 * @retval State of bit (1 or 0).
450 */
LL_EXTI_IsEnabledIT_0_31(uint32_t ExtiLine)451 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledIT_0_31(uint32_t ExtiLine)
452 {
453 return ((READ_BIT(EXTI->IMR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
454 }
455
456 /**
457 * @brief Indicate if ExtiLine Interrupt request is enabled for Lines in range 32 to 63
458 * @note The reset value for the direct lines (lines from 32 to 34, line
459 * 39) is set to 1 in order to enable the interrupt by default.
460 * Bits are set automatically at Power on.
461 * @rmtoll IMR2 IMx LL_EXTI_IsEnabledIT_32_63
462 * @param ExtiLine This parameter can be one of the following values:
463 * @arg @ref LL_EXTI_LINE_32
464 * @arg @ref LL_EXTI_LINE_33
465 * @arg @ref LL_EXTI_LINE_34(*)
466 * @arg @ref LL_EXTI_LINE_35
467 * @arg @ref LL_EXTI_LINE_36
468 * @arg @ref LL_EXTI_LINE_37
469 * @arg @ref LL_EXTI_LINE_38
470 * @arg @ref LL_EXTI_LINE_39(*)
471 * @arg @ref LL_EXTI_LINE_40(*)
472 * @arg @ref LL_EXTI_LINE_ALL_32_63
473 * @note (*): Available in some devices
474 * @retval State of bit (1 or 0).
475 */
LL_EXTI_IsEnabledIT_32_63(uint32_t ExtiLine)476 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledIT_32_63(uint32_t ExtiLine)
477 {
478 return ((READ_BIT(EXTI->IMR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
479 }
480
481 /**
482 * @}
483 */
484
485 /** @defgroup EXTI_LL_EF_Event_Management Event_Management
486 * @{
487 */
488
489 /**
490 * @brief Enable ExtiLine Event request for Lines in range 0 to 31
491 * @rmtoll EMR1 EMx LL_EXTI_EnableEvent_0_31
492 * @param ExtiLine This parameter can be one of the following values:
493 * @arg @ref LL_EXTI_LINE_0
494 * @arg @ref LL_EXTI_LINE_1
495 * @arg @ref LL_EXTI_LINE_2
496 * @arg @ref LL_EXTI_LINE_3
497 * @arg @ref LL_EXTI_LINE_4
498 * @arg @ref LL_EXTI_LINE_5
499 * @arg @ref LL_EXTI_LINE_6
500 * @arg @ref LL_EXTI_LINE_7
501 * @arg @ref LL_EXTI_LINE_8
502 * @arg @ref LL_EXTI_LINE_9
503 * @arg @ref LL_EXTI_LINE_10
504 * @arg @ref LL_EXTI_LINE_11
505 * @arg @ref LL_EXTI_LINE_12
506 * @arg @ref LL_EXTI_LINE_13
507 * @arg @ref LL_EXTI_LINE_14
508 * @arg @ref LL_EXTI_LINE_15
509 * @arg @ref LL_EXTI_LINE_16
510 * @arg @ref LL_EXTI_LINE_17
511 * @arg @ref LL_EXTI_LINE_18
512 * @arg @ref LL_EXTI_LINE_19
513 * @arg @ref LL_EXTI_LINE_20
514 * @arg @ref LL_EXTI_LINE_21
515 * @arg @ref LL_EXTI_LINE_22
516 * @arg @ref LL_EXTI_LINE_23
517 * @arg @ref LL_EXTI_LINE_24
518 * @arg @ref LL_EXTI_LINE_25
519 * @arg @ref LL_EXTI_LINE_26
520 * @arg @ref LL_EXTI_LINE_27
521 * @arg @ref LL_EXTI_LINE_28
522 * @arg @ref LL_EXTI_LINE_29
523 * @arg @ref LL_EXTI_LINE_30
524 * @arg @ref LL_EXTI_LINE_31
525 * @arg @ref LL_EXTI_LINE_ALL_0_31
526 * @note Please check each device line mapping for EXTI Line availability
527 * @retval None
528 */
LL_EXTI_EnableEvent_0_31(uint32_t ExtiLine)529 __STATIC_INLINE void LL_EXTI_EnableEvent_0_31(uint32_t ExtiLine)
530 {
531 SET_BIT(EXTI->EMR1, ExtiLine);
532
533 }
534
535 /**
536 * @brief Enable ExtiLine Event request for Lines in range 32 to 63
537 * @rmtoll EMR2 EMx LL_EXTI_EnableEvent_32_63
538 * @param ExtiLine This parameter can be a combination of the following values:
539 * @arg @ref LL_EXTI_LINE_32
540 * @arg @ref LL_EXTI_LINE_33
541 * @arg @ref LL_EXTI_LINE_34(*)
542 * @arg @ref LL_EXTI_LINE_35
543 * @arg @ref LL_EXTI_LINE_36
544 * @arg @ref LL_EXTI_LINE_37
545 * @arg @ref LL_EXTI_LINE_38
546 * @arg @ref LL_EXTI_LINE_39(*)
547 * @arg @ref LL_EXTI_LINE_40(*)
548 * @arg @ref LL_EXTI_LINE_ALL_32_63
549 * @note (*): Available in some devices
550 * @retval None
551 */
LL_EXTI_EnableEvent_32_63(uint32_t ExtiLine)552 __STATIC_INLINE void LL_EXTI_EnableEvent_32_63(uint32_t ExtiLine)
553 {
554 SET_BIT(EXTI->EMR2, ExtiLine);
555 }
556
557 /**
558 * @brief Disable ExtiLine Event request for Lines in range 0 to 31
559 * @rmtoll EMR1 EMx LL_EXTI_DisableEvent_0_31
560 * @param ExtiLine This parameter can be one of the following values:
561 * @arg @ref LL_EXTI_LINE_0
562 * @arg @ref LL_EXTI_LINE_1
563 * @arg @ref LL_EXTI_LINE_2
564 * @arg @ref LL_EXTI_LINE_3
565 * @arg @ref LL_EXTI_LINE_4
566 * @arg @ref LL_EXTI_LINE_5
567 * @arg @ref LL_EXTI_LINE_6
568 * @arg @ref LL_EXTI_LINE_7
569 * @arg @ref LL_EXTI_LINE_8
570 * @arg @ref LL_EXTI_LINE_9
571 * @arg @ref LL_EXTI_LINE_10
572 * @arg @ref LL_EXTI_LINE_11
573 * @arg @ref LL_EXTI_LINE_12
574 * @arg @ref LL_EXTI_LINE_13
575 * @arg @ref LL_EXTI_LINE_14
576 * @arg @ref LL_EXTI_LINE_15
577 * @arg @ref LL_EXTI_LINE_16
578 * @arg @ref LL_EXTI_LINE_17
579 * @arg @ref LL_EXTI_LINE_18
580 * @arg @ref LL_EXTI_LINE_19
581 * @arg @ref LL_EXTI_LINE_20
582 * @arg @ref LL_EXTI_LINE_21
583 * @arg @ref LL_EXTI_LINE_22
584 * @arg @ref LL_EXTI_LINE_23
585 * @arg @ref LL_EXTI_LINE_24
586 * @arg @ref LL_EXTI_LINE_25
587 * @arg @ref LL_EXTI_LINE_26
588 * @arg @ref LL_EXTI_LINE_27
589 * @arg @ref LL_EXTI_LINE_28
590 * @arg @ref LL_EXTI_LINE_29
591 * @arg @ref LL_EXTI_LINE_30
592 * @arg @ref LL_EXTI_LINE_31
593 * @arg @ref LL_EXTI_LINE_ALL_0_31
594 * @note Please check each device line mapping for EXTI Line availability
595 * @retval None
596 */
LL_EXTI_DisableEvent_0_31(uint32_t ExtiLine)597 __STATIC_INLINE void LL_EXTI_DisableEvent_0_31(uint32_t ExtiLine)
598 {
599 CLEAR_BIT(EXTI->EMR1, ExtiLine);
600 }
601
602 /**
603 * @brief Disable ExtiLine Event request for Lines in range 32 to 63
604 * @rmtoll EMR2 EMx LL_EXTI_DisableEvent_32_63
605 * @param ExtiLine This parameter can be a combination of the following values:
606 * @arg @ref LL_EXTI_LINE_32
607 * @arg @ref LL_EXTI_LINE_33
608 * @arg @ref LL_EXTI_LINE_34(*)
609 * @arg @ref LL_EXTI_LINE_35
610 * @arg @ref LL_EXTI_LINE_36
611 * @arg @ref LL_EXTI_LINE_37
612 * @arg @ref LL_EXTI_LINE_38
613 * @arg @ref LL_EXTI_LINE_39(*)
614 * @arg @ref LL_EXTI_LINE_40(*)
615 * @arg @ref LL_EXTI_LINE_ALL_32_63
616 * @note (*): Available in some devices
617 * @retval None
618 */
LL_EXTI_DisableEvent_32_63(uint32_t ExtiLine)619 __STATIC_INLINE void LL_EXTI_DisableEvent_32_63(uint32_t ExtiLine)
620 {
621 CLEAR_BIT(EXTI->EMR2, ExtiLine);
622 }
623
624 /**
625 * @brief Indicate if ExtiLine Event request is enabled for Lines in range 0 to 31
626 * @rmtoll EMR1 EMx LL_EXTI_IsEnabledEvent_0_31
627 * @param ExtiLine This parameter can be one of the following values:
628 * @arg @ref LL_EXTI_LINE_0
629 * @arg @ref LL_EXTI_LINE_1
630 * @arg @ref LL_EXTI_LINE_2
631 * @arg @ref LL_EXTI_LINE_3
632 * @arg @ref LL_EXTI_LINE_4
633 * @arg @ref LL_EXTI_LINE_5
634 * @arg @ref LL_EXTI_LINE_6
635 * @arg @ref LL_EXTI_LINE_7
636 * @arg @ref LL_EXTI_LINE_8
637 * @arg @ref LL_EXTI_LINE_9
638 * @arg @ref LL_EXTI_LINE_10
639 * @arg @ref LL_EXTI_LINE_11
640 * @arg @ref LL_EXTI_LINE_12
641 * @arg @ref LL_EXTI_LINE_13
642 * @arg @ref LL_EXTI_LINE_14
643 * @arg @ref LL_EXTI_LINE_15
644 * @arg @ref LL_EXTI_LINE_16
645 * @arg @ref LL_EXTI_LINE_17
646 * @arg @ref LL_EXTI_LINE_18
647 * @arg @ref LL_EXTI_LINE_19
648 * @arg @ref LL_EXTI_LINE_20
649 * @arg @ref LL_EXTI_LINE_21
650 * @arg @ref LL_EXTI_LINE_22
651 * @arg @ref LL_EXTI_LINE_23
652 * @arg @ref LL_EXTI_LINE_24
653 * @arg @ref LL_EXTI_LINE_25
654 * @arg @ref LL_EXTI_LINE_26
655 * @arg @ref LL_EXTI_LINE_27
656 * @arg @ref LL_EXTI_LINE_28
657 * @arg @ref LL_EXTI_LINE_29
658 * @arg @ref LL_EXTI_LINE_30
659 * @arg @ref LL_EXTI_LINE_31
660 * @arg @ref LL_EXTI_LINE_ALL_0_31
661 * @note Please check each device line mapping for EXTI Line availability
662 * @retval State of bit (1 or 0).
663 */
LL_EXTI_IsEnabledEvent_0_31(uint32_t ExtiLine)664 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledEvent_0_31(uint32_t ExtiLine)
665 {
666 return ((READ_BIT(EXTI->EMR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
667
668 }
669
670 /**
671 * @brief Indicate if ExtiLine Event request is enabled for Lines in range 32 to 63
672 * @rmtoll EMR2 EMx LL_EXTI_IsEnabledEvent_32_63
673 * @param ExtiLine This parameter can be a combination of the following values:
674 * @arg @ref LL_EXTI_LINE_32
675 * @arg @ref LL_EXTI_LINE_33
676 * @arg @ref LL_EXTI_LINE_34(*)
677 * @arg @ref LL_EXTI_LINE_35
678 * @arg @ref LL_EXTI_LINE_36
679 * @arg @ref LL_EXTI_LINE_37
680 * @arg @ref LL_EXTI_LINE_38
681 * @arg @ref LL_EXTI_LINE_39(*)
682 * @arg @ref LL_EXTI_LINE_40(*)
683 * @arg @ref LL_EXTI_LINE_ALL_32_63
684 * @note (*): Available in some devices
685 * @retval State of bit (1 or 0).
686 */
LL_EXTI_IsEnabledEvent_32_63(uint32_t ExtiLine)687 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledEvent_32_63(uint32_t ExtiLine)
688 {
689 return ((READ_BIT(EXTI->EMR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
690 }
691
692 /**
693 * @}
694 */
695
696 /** @defgroup EXTI_LL_EF_Rising_Trigger_Management Rising_Trigger_Management
697 * @{
698 */
699
700 /**
701 * @brief Enable ExtiLine Rising Edge Trigger for Lines in range 0 to 31
702 * @note The configurable wakeup lines are edge-triggered. No glitch must be
703 * generated on these lines. If a rising edge on a configurable interrupt
704 * line occurs during a write operation in the EXTI_RTSR register, the
705 * pending bit is not set.
706 * Rising and falling edge triggers can be set for
707 * the same interrupt line. In this case, both generate a trigger
708 * condition.
709 * @rmtoll RTSR1 RTx LL_EXTI_EnableRisingTrig_0_31
710 * @param ExtiLine This parameter can be a combination of the following values:
711 * @arg @ref LL_EXTI_LINE_0
712 * @arg @ref LL_EXTI_LINE_1
713 * @arg @ref LL_EXTI_LINE_2
714 * @arg @ref LL_EXTI_LINE_3
715 * @arg @ref LL_EXTI_LINE_4
716 * @arg @ref LL_EXTI_LINE_5
717 * @arg @ref LL_EXTI_LINE_6
718 * @arg @ref LL_EXTI_LINE_7
719 * @arg @ref LL_EXTI_LINE_8
720 * @arg @ref LL_EXTI_LINE_9
721 * @arg @ref LL_EXTI_LINE_10
722 * @arg @ref LL_EXTI_LINE_11
723 * @arg @ref LL_EXTI_LINE_12
724 * @arg @ref LL_EXTI_LINE_13
725 * @arg @ref LL_EXTI_LINE_14
726 * @arg @ref LL_EXTI_LINE_15
727 * @arg @ref LL_EXTI_LINE_16
728 * @arg @ref LL_EXTI_LINE_18
729 * @arg @ref LL_EXTI_LINE_19
730 * @arg @ref LL_EXTI_LINE_20
731 * @arg @ref LL_EXTI_LINE_21
732 * @arg @ref LL_EXTI_LINE_22
733 * @arg @ref LL_EXTI_LINE_29
734 * @arg @ref LL_EXTI_LINE_30
735 * @arg @ref LL_EXTI_LINE_31
736 * @note Please check each device line mapping for EXTI Line availability
737 * @retval None
738 */
LL_EXTI_EnableRisingTrig_0_31(uint32_t ExtiLine)739 __STATIC_INLINE void LL_EXTI_EnableRisingTrig_0_31(uint32_t ExtiLine)
740 {
741 SET_BIT(EXTI->RTSR1, ExtiLine);
742
743 }
744
745 /**
746 * @brief Enable ExtiLine Rising Edge Trigger for Lines in range 32 to 63
747 * @note The configurable wakeup lines are edge-triggered. No glitch must be
748 * generated on these lines. If a rising edge on a configurable interrupt
749 * line occurs during a write operation in the EXTI_RTSR register, the
750 * pending bit is not set.Rising and falling edge triggers can be set for
751 * the same interrupt line. In this case, both generate a trigger
752 * condition.
753 * @rmtoll RTSR2 RTx LL_EXTI_EnableRisingTrig_32_63
754 * @param ExtiLine This parameter can be a combination of the following values:
755 * @arg @ref LL_EXTI_LINE_35
756 * @arg @ref LL_EXTI_LINE_36
757 * @arg @ref LL_EXTI_LINE_37
758 * @arg @ref LL_EXTI_LINE_38
759 * @retval None
760 */
LL_EXTI_EnableRisingTrig_32_63(uint32_t ExtiLine)761 __STATIC_INLINE void LL_EXTI_EnableRisingTrig_32_63(uint32_t ExtiLine)
762 {
763 SET_BIT(EXTI->RTSR2, ExtiLine);
764 }
765
766 /**
767 * @brief Disable ExtiLine Rising Edge Trigger for Lines in range 0 to 31
768 * @note The configurable wakeup lines are edge-triggered. No glitch must be
769 * generated on these lines. If a rising edge on a configurable interrupt
770 * line occurs during a write operation in the EXTI_RTSR register, the
771 * pending bit is not set.
772 * Rising and falling edge triggers can be set for
773 * the same interrupt line. In this case, both generate a trigger
774 * condition.
775 * @rmtoll RTSR1 RTx LL_EXTI_DisableRisingTrig_0_31
776 * @param ExtiLine This parameter can be a combination of the following values:
777 * @arg @ref LL_EXTI_LINE_0
778 * @arg @ref LL_EXTI_LINE_1
779 * @arg @ref LL_EXTI_LINE_2
780 * @arg @ref LL_EXTI_LINE_3
781 * @arg @ref LL_EXTI_LINE_4
782 * @arg @ref LL_EXTI_LINE_5
783 * @arg @ref LL_EXTI_LINE_6
784 * @arg @ref LL_EXTI_LINE_7
785 * @arg @ref LL_EXTI_LINE_8
786 * @arg @ref LL_EXTI_LINE_9
787 * @arg @ref LL_EXTI_LINE_10
788 * @arg @ref LL_EXTI_LINE_11
789 * @arg @ref LL_EXTI_LINE_12
790 * @arg @ref LL_EXTI_LINE_13
791 * @arg @ref LL_EXTI_LINE_14
792 * @arg @ref LL_EXTI_LINE_15
793 * @arg @ref LL_EXTI_LINE_16
794 * @arg @ref LL_EXTI_LINE_18
795 * @arg @ref LL_EXTI_LINE_19
796 * @arg @ref LL_EXTI_LINE_20
797 * @arg @ref LL_EXTI_LINE_21
798 * @arg @ref LL_EXTI_LINE_22
799 * @arg @ref LL_EXTI_LINE_29
800 * @arg @ref LL_EXTI_LINE_30
801 * @arg @ref LL_EXTI_LINE_31
802 * @note Please check each device line mapping for EXTI Line availability
803 * @retval None
804 */
LL_EXTI_DisableRisingTrig_0_31(uint32_t ExtiLine)805 __STATIC_INLINE void LL_EXTI_DisableRisingTrig_0_31(uint32_t ExtiLine)
806 {
807 CLEAR_BIT(EXTI->RTSR1, ExtiLine);
808
809 }
810
811 /**
812 * @brief Disable ExtiLine Rising Edge Trigger for Lines in range 32 to 63
813 * @note The configurable wakeup lines are edge-triggered. No glitch must be
814 * generated on these lines. If a rising edge on a configurable interrupt
815 * line occurs during a write operation in the EXTI_RTSR register, the
816 * pending bit is not set.
817 * Rising and falling edge triggers can be set for
818 * the same interrupt line. In this case, both generate a trigger
819 * condition.
820 * @rmtoll RTSR2 RTx LL_EXTI_DisableRisingTrig_32_63
821 * @param ExtiLine This parameter can be a combination of the following values:
822 * @arg @ref LL_EXTI_LINE_35
823 * @arg @ref LL_EXTI_LINE_36
824 * @arg @ref LL_EXTI_LINE_37
825 * @arg @ref LL_EXTI_LINE_38
826 * @retval None
827 */
LL_EXTI_DisableRisingTrig_32_63(uint32_t ExtiLine)828 __STATIC_INLINE void LL_EXTI_DisableRisingTrig_32_63(uint32_t ExtiLine)
829 {
830 CLEAR_BIT(EXTI->RTSR2, ExtiLine);
831 }
832
833 /**
834 * @brief Check if rising edge trigger is enabled for Lines in range 0 to 31
835 * @rmtoll RTSR1 RTx LL_EXTI_IsEnabledRisingTrig_0_31
836 * @param ExtiLine This parameter can be a combination of the following values:
837 * @arg @ref LL_EXTI_LINE_0
838 * @arg @ref LL_EXTI_LINE_1
839 * @arg @ref LL_EXTI_LINE_2
840 * @arg @ref LL_EXTI_LINE_3
841 * @arg @ref LL_EXTI_LINE_4
842 * @arg @ref LL_EXTI_LINE_5
843 * @arg @ref LL_EXTI_LINE_6
844 * @arg @ref LL_EXTI_LINE_7
845 * @arg @ref LL_EXTI_LINE_8
846 * @arg @ref LL_EXTI_LINE_9
847 * @arg @ref LL_EXTI_LINE_10
848 * @arg @ref LL_EXTI_LINE_11
849 * @arg @ref LL_EXTI_LINE_12
850 * @arg @ref LL_EXTI_LINE_13
851 * @arg @ref LL_EXTI_LINE_14
852 * @arg @ref LL_EXTI_LINE_15
853 * @arg @ref LL_EXTI_LINE_16
854 * @arg @ref LL_EXTI_LINE_18
855 * @arg @ref LL_EXTI_LINE_19
856 * @arg @ref LL_EXTI_LINE_20
857 * @arg @ref LL_EXTI_LINE_21
858 * @arg @ref LL_EXTI_LINE_22
859 * @arg @ref LL_EXTI_LINE_29
860 * @arg @ref LL_EXTI_LINE_30
861 * @arg @ref LL_EXTI_LINE_31
862 * @note Please check each device line mapping for EXTI Line availability
863 * @retval State of bit (1 or 0).
864 */
LL_EXTI_IsEnabledRisingTrig_0_31(uint32_t ExtiLine)865 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledRisingTrig_0_31(uint32_t ExtiLine)
866 {
867 return ((READ_BIT(EXTI->RTSR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
868 }
869
870 /**
871 * @brief Check if rising edge trigger is enabled for Lines in range 32 to 63
872 * @rmtoll RTSR2 RTx LL_EXTI_IsEnabledRisingTrig_32_63
873 * @param ExtiLine This parameter can be a combination of the following values:
874 * @arg @ref LL_EXTI_LINE_35
875 * @arg @ref LL_EXTI_LINE_36
876 * @arg @ref LL_EXTI_LINE_37
877 * @arg @ref LL_EXTI_LINE_38
878 * @retval State of bit (1 or 0).
879 */
LL_EXTI_IsEnabledRisingTrig_32_63(uint32_t ExtiLine)880 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledRisingTrig_32_63(uint32_t ExtiLine)
881 {
882 return ((READ_BIT(EXTI->RTSR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
883 }
884
885 /**
886 * @}
887 */
888
889 /** @defgroup EXTI_LL_EF_Falling_Trigger_Management Falling_Trigger_Management
890 * @{
891 */
892
893 /**
894 * @brief Enable ExtiLine Falling Edge Trigger for Lines in range 0 to 31
895 * @note The configurable wakeup lines are edge-triggered. No glitch must be
896 * generated on these lines. If a falling edge on a configurable interrupt
897 * line occurs during a write operation in the EXTI_FTSR register, the
898 * pending bit is not set.
899 * Rising and falling edge triggers can be set for
900 * the same interrupt line. In this case, both generate a trigger
901 * condition.
902 * @rmtoll FTSR1 FTx LL_EXTI_EnableFallingTrig_0_31
903 * @param ExtiLine This parameter can be a combination of the following values:
904 * @arg @ref LL_EXTI_LINE_0
905 * @arg @ref LL_EXTI_LINE_1
906 * @arg @ref LL_EXTI_LINE_2
907 * @arg @ref LL_EXTI_LINE_3
908 * @arg @ref LL_EXTI_LINE_4
909 * @arg @ref LL_EXTI_LINE_5
910 * @arg @ref LL_EXTI_LINE_6
911 * @arg @ref LL_EXTI_LINE_7
912 * @arg @ref LL_EXTI_LINE_8
913 * @arg @ref LL_EXTI_LINE_9
914 * @arg @ref LL_EXTI_LINE_10
915 * @arg @ref LL_EXTI_LINE_11
916 * @arg @ref LL_EXTI_LINE_12
917 * @arg @ref LL_EXTI_LINE_13
918 * @arg @ref LL_EXTI_LINE_14
919 * @arg @ref LL_EXTI_LINE_15
920 * @arg @ref LL_EXTI_LINE_16
921 * @arg @ref LL_EXTI_LINE_18
922 * @arg @ref LL_EXTI_LINE_19
923 * @arg @ref LL_EXTI_LINE_20
924 * @arg @ref LL_EXTI_LINE_21
925 * @arg @ref LL_EXTI_LINE_22
926 * @arg @ref LL_EXTI_LINE_29
927 * @arg @ref LL_EXTI_LINE_30
928 * @arg @ref LL_EXTI_LINE_31
929 * @note Please check each device line mapping for EXTI Line availability
930 * @retval None
931 */
LL_EXTI_EnableFallingTrig_0_31(uint32_t ExtiLine)932 __STATIC_INLINE void LL_EXTI_EnableFallingTrig_0_31(uint32_t ExtiLine)
933 {
934 SET_BIT(EXTI->FTSR1, ExtiLine);
935 }
936
937 /**
938 * @brief Enable ExtiLine Falling Edge Trigger for Lines in range 32 to 63
939 * @note The configurable wakeup lines are edge-triggered. No glitch must be
940 * generated on these lines. If a Falling edge on a configurable interrupt
941 * line occurs during a write operation in the EXTI_FTSR register, the
942 * pending bit is not set.
943 * Rising and falling edge triggers can be set for
944 * the same interrupt line. In this case, both generate a trigger
945 * condition.
946 * @rmtoll FTSR2 FTx LL_EXTI_EnableFallingTrig_32_63
947 * @param ExtiLine This parameter can be a combination of the following values:
948 * @arg @ref LL_EXTI_LINE_35
949 * @arg @ref LL_EXTI_LINE_36
950 * @arg @ref LL_EXTI_LINE_37
951 * @arg @ref LL_EXTI_LINE_38
952 * @retval None
953 */
LL_EXTI_EnableFallingTrig_32_63(uint32_t ExtiLine)954 __STATIC_INLINE void LL_EXTI_EnableFallingTrig_32_63(uint32_t ExtiLine)
955 {
956 SET_BIT(EXTI->FTSR2, ExtiLine);
957 }
958
959 /**
960 * @brief Disable ExtiLine Falling Edge Trigger for Lines in range 0 to 31
961 * @note The configurable wakeup lines are edge-triggered. No glitch must be
962 * generated on these lines. If a Falling edge on a configurable interrupt
963 * line occurs during a write operation in the EXTI_FTSR register, the
964 * pending bit is not set.
965 * Rising and falling edge triggers can be set for the same interrupt line.
966 * In this case, both generate a trigger condition.
967 * @rmtoll FTSR1 FTx LL_EXTI_DisableFallingTrig_0_31
968 * @param ExtiLine This parameter can be a combination of the following values:
969 * @arg @ref LL_EXTI_LINE_0
970 * @arg @ref LL_EXTI_LINE_1
971 * @arg @ref LL_EXTI_LINE_2
972 * @arg @ref LL_EXTI_LINE_3
973 * @arg @ref LL_EXTI_LINE_4
974 * @arg @ref LL_EXTI_LINE_5
975 * @arg @ref LL_EXTI_LINE_6
976 * @arg @ref LL_EXTI_LINE_7
977 * @arg @ref LL_EXTI_LINE_8
978 * @arg @ref LL_EXTI_LINE_9
979 * @arg @ref LL_EXTI_LINE_10
980 * @arg @ref LL_EXTI_LINE_11
981 * @arg @ref LL_EXTI_LINE_12
982 * @arg @ref LL_EXTI_LINE_13
983 * @arg @ref LL_EXTI_LINE_14
984 * @arg @ref LL_EXTI_LINE_15
985 * @arg @ref LL_EXTI_LINE_16
986 * @arg @ref LL_EXTI_LINE_18
987 * @arg @ref LL_EXTI_LINE_19
988 * @arg @ref LL_EXTI_LINE_20
989 * @arg @ref LL_EXTI_LINE_21
990 * @arg @ref LL_EXTI_LINE_22
991 * @arg @ref LL_EXTI_LINE_29
992 * @arg @ref LL_EXTI_LINE_30
993 * @arg @ref LL_EXTI_LINE_31
994 * @note Please check each device line mapping for EXTI Line availability
995 * @retval None
996 */
LL_EXTI_DisableFallingTrig_0_31(uint32_t ExtiLine)997 __STATIC_INLINE void LL_EXTI_DisableFallingTrig_0_31(uint32_t ExtiLine)
998 {
999 CLEAR_BIT(EXTI->FTSR1, ExtiLine);
1000 }
1001
1002 /**
1003 * @brief Disable ExtiLine Falling Edge Trigger for Lines in range 32 to 63
1004 * @note The configurable wakeup lines are edge-triggered. No glitch must be
1005 * generated on these lines. If a Falling edge on a configurable interrupt
1006 * line occurs during a write operation in the EXTI_FTSR register, the
1007 * pending bit is not set.
1008 * Rising and falling edge triggers can be set for the same interrupt line.
1009 * In this case, both generate a trigger condition.
1010 * @rmtoll FTSR2 FTx LL_EXTI_DisableFallingTrig_32_63
1011 * @param ExtiLine This parameter can be a combination of the following values:
1012 * @arg @ref LL_EXTI_LINE_35
1013 * @arg @ref LL_EXTI_LINE_36
1014 * @arg @ref LL_EXTI_LINE_37
1015 * @arg @ref LL_EXTI_LINE_38
1016 * @retval None
1017 */
LL_EXTI_DisableFallingTrig_32_63(uint32_t ExtiLine)1018 __STATIC_INLINE void LL_EXTI_DisableFallingTrig_32_63(uint32_t ExtiLine)
1019 {
1020 CLEAR_BIT(EXTI->FTSR2, ExtiLine);
1021 }
1022
1023 /**
1024 * @brief Check if falling edge trigger is enabled for Lines in range 0 to 31
1025 * @rmtoll FTSR1 FTx LL_EXTI_IsEnabledFallingTrig_0_31
1026 * @param ExtiLine This parameter can be a combination of the following values:
1027 * @arg @ref LL_EXTI_LINE_0
1028 * @arg @ref LL_EXTI_LINE_1
1029 * @arg @ref LL_EXTI_LINE_2
1030 * @arg @ref LL_EXTI_LINE_3
1031 * @arg @ref LL_EXTI_LINE_4
1032 * @arg @ref LL_EXTI_LINE_5
1033 * @arg @ref LL_EXTI_LINE_6
1034 * @arg @ref LL_EXTI_LINE_7
1035 * @arg @ref LL_EXTI_LINE_8
1036 * @arg @ref LL_EXTI_LINE_9
1037 * @arg @ref LL_EXTI_LINE_10
1038 * @arg @ref LL_EXTI_LINE_11
1039 * @arg @ref LL_EXTI_LINE_12
1040 * @arg @ref LL_EXTI_LINE_13
1041 * @arg @ref LL_EXTI_LINE_14
1042 * @arg @ref LL_EXTI_LINE_15
1043 * @arg @ref LL_EXTI_LINE_16
1044 * @arg @ref LL_EXTI_LINE_18
1045 * @arg @ref LL_EXTI_LINE_19
1046 * @arg @ref LL_EXTI_LINE_20
1047 * @arg @ref LL_EXTI_LINE_21
1048 * @arg @ref LL_EXTI_LINE_22
1049 * @arg @ref LL_EXTI_LINE_29
1050 * @arg @ref LL_EXTI_LINE_30
1051 * @arg @ref LL_EXTI_LINE_31
1052 * @note Please check each device line mapping for EXTI Line availability
1053 * @retval State of bit (1 or 0).
1054 */
LL_EXTI_IsEnabledFallingTrig_0_31(uint32_t ExtiLine)1055 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledFallingTrig_0_31(uint32_t ExtiLine)
1056 {
1057 return ((READ_BIT(EXTI->FTSR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1058 }
1059
1060 /**
1061 * @brief Check if falling edge trigger is enabled for Lines in range 32 to 63
1062 * @rmtoll FTSR2 FTx LL_EXTI_IsEnabledFallingTrig_32_63
1063 * @param ExtiLine This parameter can be a combination of the following values:
1064 * @arg @ref LL_EXTI_LINE_35
1065 * @arg @ref LL_EXTI_LINE_36
1066 * @arg @ref LL_EXTI_LINE_37
1067 * @arg @ref LL_EXTI_LINE_38
1068 * @retval State of bit (1 or 0).
1069 */
LL_EXTI_IsEnabledFallingTrig_32_63(uint32_t ExtiLine)1070 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledFallingTrig_32_63(uint32_t ExtiLine)
1071 {
1072 return ((READ_BIT(EXTI->FTSR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1073 }
1074
1075 /**
1076 * @}
1077 */
1078
1079 /** @defgroup EXTI_LL_EF_Software_Interrupt_Management Software_Interrupt_Management
1080 * @{
1081 */
1082
1083 /**
1084 * @brief Generate a software Interrupt Event for Lines in range 0 to 31
1085 * @note If the interrupt is enabled on this line in the EXTI_IMR1, writing a 1 to
1086 * this bit when it is at '0' sets the corresponding pending bit in EXTI_PR1
1087 * resulting in an interrupt request generation.
1088 * This bit is cleared by clearing the corresponding bit in the EXTI_PR1
1089 * register (by writing a 1 into the bit)
1090 * @rmtoll SWIER1 SWIx LL_EXTI_GenerateSWI_0_31
1091 * @param ExtiLine This parameter can be a combination of the following values:
1092 * @arg @ref LL_EXTI_LINE_0
1093 * @arg @ref LL_EXTI_LINE_1
1094 * @arg @ref LL_EXTI_LINE_2
1095 * @arg @ref LL_EXTI_LINE_3
1096 * @arg @ref LL_EXTI_LINE_4
1097 * @arg @ref LL_EXTI_LINE_5
1098 * @arg @ref LL_EXTI_LINE_6
1099 * @arg @ref LL_EXTI_LINE_7
1100 * @arg @ref LL_EXTI_LINE_8
1101 * @arg @ref LL_EXTI_LINE_9
1102 * @arg @ref LL_EXTI_LINE_10
1103 * @arg @ref LL_EXTI_LINE_11
1104 * @arg @ref LL_EXTI_LINE_12
1105 * @arg @ref LL_EXTI_LINE_13
1106 * @arg @ref LL_EXTI_LINE_14
1107 * @arg @ref LL_EXTI_LINE_15
1108 * @arg @ref LL_EXTI_LINE_16
1109 * @arg @ref LL_EXTI_LINE_18
1110 * @arg @ref LL_EXTI_LINE_19
1111 * @arg @ref LL_EXTI_LINE_20
1112 * @arg @ref LL_EXTI_LINE_21
1113 * @arg @ref LL_EXTI_LINE_22
1114 * @arg @ref LL_EXTI_LINE_29
1115 * @arg @ref LL_EXTI_LINE_30
1116 * @arg @ref LL_EXTI_LINE_31
1117 * @note Please check each device line mapping for EXTI Line availability
1118 * @retval None
1119 */
LL_EXTI_GenerateSWI_0_31(uint32_t ExtiLine)1120 __STATIC_INLINE void LL_EXTI_GenerateSWI_0_31(uint32_t ExtiLine)
1121 {
1122 SET_BIT(EXTI->SWIER1, ExtiLine);
1123 }
1124
1125 /**
1126 * @brief Generate a software Interrupt Event for Lines in range 32 to 63
1127 * @note If the interrupt is enabled on this line inthe EXTI_IMR2, writing a 1 to
1128 * this bit when it is at '0' sets the corresponding pending bit in EXTI_PR2
1129 * resulting in an interrupt request generation.
1130 * This bit is cleared by clearing the corresponding bit in the EXTI_PR2
1131 * register (by writing a 1 into the bit)
1132 * @rmtoll SWIER2 SWIx LL_EXTI_GenerateSWI_32_63
1133 * @param ExtiLine This parameter can be a combination of the following values:
1134 * @arg @ref LL_EXTI_LINE_35
1135 * @arg @ref LL_EXTI_LINE_36
1136 * @arg @ref LL_EXTI_LINE_37
1137 * @arg @ref LL_EXTI_LINE_38
1138 * @retval None
1139 */
LL_EXTI_GenerateSWI_32_63(uint32_t ExtiLine)1140 __STATIC_INLINE void LL_EXTI_GenerateSWI_32_63(uint32_t ExtiLine)
1141 {
1142 SET_BIT(EXTI->SWIER2, ExtiLine);
1143 }
1144
1145 /**
1146 * @}
1147 */
1148
1149 /** @defgroup EXTI_LL_EF_Flag_Management Flag_Management
1150 * @{
1151 */
1152
1153 /**
1154 * @brief Check if the ExtLine Flag is set or not for Lines in range 0 to 31
1155 * @note This bit is set when the selected edge event arrives on the interrupt
1156 * line. This bit is cleared by writing a 1 to the bit.
1157 * @rmtoll PR1 PIFx LL_EXTI_IsActiveFlag_0_31
1158 * @param ExtiLine This parameter can be a combination of the following values:
1159 * @arg @ref LL_EXTI_LINE_0
1160 * @arg @ref LL_EXTI_LINE_1
1161 * @arg @ref LL_EXTI_LINE_2
1162 * @arg @ref LL_EXTI_LINE_3
1163 * @arg @ref LL_EXTI_LINE_4
1164 * @arg @ref LL_EXTI_LINE_5
1165 * @arg @ref LL_EXTI_LINE_6
1166 * @arg @ref LL_EXTI_LINE_7
1167 * @arg @ref LL_EXTI_LINE_8
1168 * @arg @ref LL_EXTI_LINE_9
1169 * @arg @ref LL_EXTI_LINE_10
1170 * @arg @ref LL_EXTI_LINE_11
1171 * @arg @ref LL_EXTI_LINE_12
1172 * @arg @ref LL_EXTI_LINE_13
1173 * @arg @ref LL_EXTI_LINE_14
1174 * @arg @ref LL_EXTI_LINE_15
1175 * @arg @ref LL_EXTI_LINE_16
1176 * @arg @ref LL_EXTI_LINE_18
1177 * @arg @ref LL_EXTI_LINE_19
1178 * @arg @ref LL_EXTI_LINE_20
1179 * @arg @ref LL_EXTI_LINE_21
1180 * @arg @ref LL_EXTI_LINE_22
1181 * @arg @ref LL_EXTI_LINE_29
1182 * @arg @ref LL_EXTI_LINE_30
1183 * @arg @ref LL_EXTI_LINE_31
1184 * @note Please check each device line mapping for EXTI Line availability
1185 * @retval State of bit (1 or 0).
1186 */
LL_EXTI_IsActiveFlag_0_31(uint32_t ExtiLine)1187 __STATIC_INLINE uint32_t LL_EXTI_IsActiveFlag_0_31(uint32_t ExtiLine)
1188 {
1189 return ((READ_BIT(EXTI->PR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1190 }
1191
1192 /**
1193 * @brief Check if the ExtLine Flag is set or not for Lines in range 32 to 63
1194 * @note This bit is set when the selected edge event arrives on the interrupt
1195 * line. This bit is cleared by writing a 1 to the bit.
1196 * @rmtoll PR2 PIFx LL_EXTI_IsActiveFlag_32_63
1197 * @param ExtiLine This parameter can be a combination of the following values:
1198 * @arg @ref LL_EXTI_LINE_35
1199 * @arg @ref LL_EXTI_LINE_36
1200 * @arg @ref LL_EXTI_LINE_37
1201 * @arg @ref LL_EXTI_LINE_38
1202 * @retval State of bit (1 or 0).
1203 */
LL_EXTI_IsActiveFlag_32_63(uint32_t ExtiLine)1204 __STATIC_INLINE uint32_t LL_EXTI_IsActiveFlag_32_63(uint32_t ExtiLine)
1205 {
1206 return ((READ_BIT(EXTI->PR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1207 }
1208
1209 /**
1210 * @brief Read ExtLine Combination Flag for Lines in range 0 to 31
1211 * @note This bit is set when the selected edge event arrives on the interrupt
1212 * line. This bit is cleared by writing a 1 to the bit.
1213 * @rmtoll PR1 PIFx LL_EXTI_ReadFlag_0_31
1214 * @param ExtiLine This parameter can be a combination of the following values:
1215 * @arg @ref LL_EXTI_LINE_0
1216 * @arg @ref LL_EXTI_LINE_1
1217 * @arg @ref LL_EXTI_LINE_2
1218 * @arg @ref LL_EXTI_LINE_3
1219 * @arg @ref LL_EXTI_LINE_4
1220 * @arg @ref LL_EXTI_LINE_5
1221 * @arg @ref LL_EXTI_LINE_6
1222 * @arg @ref LL_EXTI_LINE_7
1223 * @arg @ref LL_EXTI_LINE_8
1224 * @arg @ref LL_EXTI_LINE_9
1225 * @arg @ref LL_EXTI_LINE_10
1226 * @arg @ref LL_EXTI_LINE_11
1227 * @arg @ref LL_EXTI_LINE_12
1228 * @arg @ref LL_EXTI_LINE_13
1229 * @arg @ref LL_EXTI_LINE_14
1230 * @arg @ref LL_EXTI_LINE_15
1231 * @arg @ref LL_EXTI_LINE_16
1232 * @arg @ref LL_EXTI_LINE_18
1233 * @arg @ref LL_EXTI_LINE_19
1234 * @arg @ref LL_EXTI_LINE_20
1235 * @arg @ref LL_EXTI_LINE_21
1236 * @arg @ref LL_EXTI_LINE_22
1237 * @arg @ref LL_EXTI_LINE_29
1238 * @arg @ref LL_EXTI_LINE_30
1239 * @arg @ref LL_EXTI_LINE_31
1240 * @note Please check each device line mapping for EXTI Line availability
1241 * @retval @note This bit is set when the selected edge event arrives on the interrupt
1242 */
LL_EXTI_ReadFlag_0_31(uint32_t ExtiLine)1243 __STATIC_INLINE uint32_t LL_EXTI_ReadFlag_0_31(uint32_t ExtiLine)
1244 {
1245 return (uint32_t)(READ_BIT(EXTI->PR1, ExtiLine));
1246 }
1247
1248 /**
1249 * @brief Read ExtLine Combination Flag for Lines in range 32 to 63
1250 * @note This bit is set when the selected edge event arrives on the interrupt
1251 * line. This bit is cleared by writing a 1 to the bit.
1252 * @rmtoll PR2 PIFx LL_EXTI_ReadFlag_32_63
1253 * @param ExtiLine This parameter can be a combination of the following values:
1254 * @arg @ref LL_EXTI_LINE_35
1255 * @arg @ref LL_EXTI_LINE_36
1256 * @arg @ref LL_EXTI_LINE_37
1257 * @arg @ref LL_EXTI_LINE_38
1258 * @retval @note This bit is set when the selected edge event arrives on the interrupt
1259 */
LL_EXTI_ReadFlag_32_63(uint32_t ExtiLine)1260 __STATIC_INLINE uint32_t LL_EXTI_ReadFlag_32_63(uint32_t ExtiLine)
1261 {
1262 return (uint32_t)(READ_BIT(EXTI->PR2, ExtiLine));
1263 }
1264
1265 /**
1266 * @brief Clear ExtLine Flags for Lines in range 0 to 31
1267 * @note This bit is set when the selected edge event arrives on the interrupt
1268 * line. This bit is cleared by writing a 1 to the bit.
1269 * @rmtoll PR1 PIFx LL_EXTI_ClearFlag_0_31
1270 * @param ExtiLine This parameter can be a combination of the following values:
1271 * @arg @ref LL_EXTI_LINE_0
1272 * @arg @ref LL_EXTI_LINE_1
1273 * @arg @ref LL_EXTI_LINE_2
1274 * @arg @ref LL_EXTI_LINE_3
1275 * @arg @ref LL_EXTI_LINE_4
1276 * @arg @ref LL_EXTI_LINE_5
1277 * @arg @ref LL_EXTI_LINE_6
1278 * @arg @ref LL_EXTI_LINE_7
1279 * @arg @ref LL_EXTI_LINE_8
1280 * @arg @ref LL_EXTI_LINE_9
1281 * @arg @ref LL_EXTI_LINE_10
1282 * @arg @ref LL_EXTI_LINE_11
1283 * @arg @ref LL_EXTI_LINE_12
1284 * @arg @ref LL_EXTI_LINE_13
1285 * @arg @ref LL_EXTI_LINE_14
1286 * @arg @ref LL_EXTI_LINE_15
1287 * @arg @ref LL_EXTI_LINE_16
1288 * @arg @ref LL_EXTI_LINE_18
1289 * @arg @ref LL_EXTI_LINE_19
1290 * @arg @ref LL_EXTI_LINE_20
1291 * @arg @ref LL_EXTI_LINE_21
1292 * @arg @ref LL_EXTI_LINE_22
1293 * @arg @ref LL_EXTI_LINE_29
1294 * @arg @ref LL_EXTI_LINE_30
1295 * @arg @ref LL_EXTI_LINE_31
1296 * @note Please check each device line mapping for EXTI Line availability
1297 * @retval None
1298 */
LL_EXTI_ClearFlag_0_31(uint32_t ExtiLine)1299 __STATIC_INLINE void LL_EXTI_ClearFlag_0_31(uint32_t ExtiLine)
1300 {
1301 WRITE_REG(EXTI->PR1, ExtiLine);
1302 }
1303
1304 /**
1305 * @brief Clear ExtLine Flags for Lines in range 32 to 63
1306 * @note This bit is set when the selected edge event arrives on the interrupt
1307 * line. This bit is cleared by writing a 1 to the bit.
1308 * @rmtoll PR2 PIFx LL_EXTI_ClearFlag_32_63
1309 * @param ExtiLine This parameter can be a combination of the following values:
1310 * @arg @ref LL_EXTI_LINE_35
1311 * @arg @ref LL_EXTI_LINE_36
1312 * @arg @ref LL_EXTI_LINE_37
1313 * @arg @ref LL_EXTI_LINE_38
1314 * @retval None
1315 */
LL_EXTI_ClearFlag_32_63(uint32_t ExtiLine)1316 __STATIC_INLINE void LL_EXTI_ClearFlag_32_63(uint32_t ExtiLine)
1317 {
1318 WRITE_REG(EXTI->PR2, ExtiLine);
1319 }
1320
1321
1322 /**
1323 * @}
1324 */
1325
1326 #if defined(USE_FULL_LL_DRIVER)
1327 /** @defgroup EXTI_LL_EF_Init Initialization and de-initialization functions
1328 * @{
1329 */
1330
1331 uint32_t LL_EXTI_Init(LL_EXTI_InitTypeDef *EXTI_InitStruct);
1332 uint32_t LL_EXTI_DeInit(void);
1333 void LL_EXTI_StructInit(LL_EXTI_InitTypeDef *EXTI_InitStruct);
1334
1335
1336 /**
1337 * @}
1338 */
1339 #endif /* USE_FULL_LL_DRIVER */
1340
1341 /**
1342 * @}
1343 */
1344
1345 /**
1346 * @}
1347 */
1348
1349 #endif /* EXTI */
1350
1351 /**
1352 * @}
1353 */
1354
1355 #ifdef __cplusplus
1356 }
1357 #endif
1358
1359 #endif /* STM32L4xx_LL_EXTI_H */
1360
1361 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
1362