1 /**
2 ******************************************************************************
3 * @file stm32l4xx_ll_dmamux.h
4 * @author MCD Application Team
5 * @brief Header file of DMAMUX LL module.
6 ******************************************************************************
7 * @attention
8 *
9 * <h2><center>© Copyright (c) 2017 STMicroelectronics.
10 * All rights reserved.</center></h2>
11 *
12 * This software component is licensed by ST under BSD 3-Clause license,
13 * the "License"; You may not use this file except in compliance with the
14 * License. You may obtain a copy of the License at:
15 * opensource.org/licenses/BSD-3-Clause
16 *
17 ******************************************************************************
18 */
19
20 /* Define to prevent recursive inclusion -------------------------------------*/
21 #ifndef STM32L4xx_LL_DMAMUX_H
22 #define STM32L4xx_LL_DMAMUX_H
23
24 #ifdef __cplusplus
25 extern "C" {
26 #endif
27
28 /* Includes ------------------------------------------------------------------*/
29 #include "stm32l4xx.h"
30
31 /** @addtogroup STM32L4xx_LL_Driver
32 * @{
33 */
34
35 #if defined (DMAMUX1)
36
37 /** @defgroup DMAMUX_LL DMAMUX
38 * @{
39 */
40
41 /* Private types -------------------------------------------------------------*/
42 /* Private variables ---------------------------------------------------------*/
43 /* Private constants ---------------------------------------------------------*/
44 /** @defgroup DMAMUX_LL_Private_Constants DMAMUX Private Constants
45 * @{
46 */
47 /* Define used to get DMAMUX CCR register size */
48 #define DMAMUX_CCR_SIZE 0x00000004UL
49
50 /* Define used to get DMAMUX RGCR register size */
51 #define DMAMUX_RGCR_SIZE 0x00000004UL
52 /**
53 * @}
54 */
55
56 /* Private macros ------------------------------------------------------------*/
57 /* Exported types ------------------------------------------------------------*/
58 /* Exported constants --------------------------------------------------------*/
59 /** @defgroup DMAMUX_LL_Exported_Constants DMAMUX Exported Constants
60 * @{
61 */
62 /** @defgroup DMAMUX_LL_EC_CLEAR_FLAG Clear Flags Defines
63 * @brief Flags defines which can be used with LL_DMAMUX_WriteReg function
64 * @{
65 */
66 #define LL_DMAMUX_CFR_CSOF0 DMAMUX_CFR_CSOF0 /*!< Synchronization Event Overrun Flag Channel 0 */
67 #define LL_DMAMUX_CFR_CSOF1 DMAMUX_CFR_CSOF1 /*!< Synchronization Event Overrun Flag Channel 1 */
68 #define LL_DMAMUX_CFR_CSOF2 DMAMUX_CFR_CSOF2 /*!< Synchronization Event Overrun Flag Channel 2 */
69 #define LL_DMAMUX_CFR_CSOF3 DMAMUX_CFR_CSOF3 /*!< Synchronization Event Overrun Flag Channel 3 */
70 #define LL_DMAMUX_CFR_CSOF4 DMAMUX_CFR_CSOF4 /*!< Synchronization Event Overrun Flag Channel 4 */
71 #define LL_DMAMUX_CFR_CSOF5 DMAMUX_CFR_CSOF5 /*!< Synchronization Event Overrun Flag Channel 5 */
72 #define LL_DMAMUX_CFR_CSOF6 DMAMUX_CFR_CSOF6 /*!< Synchronization Event Overrun Flag Channel 6 */
73 #define LL_DMAMUX_CFR_CSOF7 DMAMUX_CFR_CSOF7 /*!< Synchronization Event Overrun Flag Channel 7 */
74 #define LL_DMAMUX_CFR_CSOF8 DMAMUX_CFR_CSOF8 /*!< Synchronization Event Overrun Flag Channel 8 */
75 #define LL_DMAMUX_CFR_CSOF9 DMAMUX_CFR_CSOF9 /*!< Synchronization Event Overrun Flag Channel 9 */
76 #define LL_DMAMUX_CFR_CSOF10 DMAMUX_CFR_CSOF10 /*!< Synchronization Event Overrun Flag Channel 10 */
77 #define LL_DMAMUX_CFR_CSOF11 DMAMUX_CFR_CSOF11 /*!< Synchronization Event Overrun Flag Channel 11 */
78 #define LL_DMAMUX_CFR_CSOF12 DMAMUX_CFR_CSOF12 /*!< Synchronization Event Overrun Flag Channel 12 */
79 #define LL_DMAMUX_CFR_CSOF13 DMAMUX_CFR_CSOF13 /*!< Synchronization Event Overrun Flag Channel 13 */
80 #define LL_DMAMUX_RGCFR_RGCOF0 DMAMUX_RGCFR_COF0 /*!< Request Generator 0 Trigger Event Overrun Flag */
81 #define LL_DMAMUX_RGCFR_RGCOF1 DMAMUX_RGCFR_COF1 /*!< Request Generator 1 Trigger Event Overrun Flag */
82 #define LL_DMAMUX_RGCFR_RGCOF2 DMAMUX_RGCFR_COF2 /*!< Request Generator 2 Trigger Event Overrun Flag */
83 #define LL_DMAMUX_RGCFR_RGCOF3 DMAMUX_RGCFR_COF3 /*!< Request Generator 3 Trigger Event Overrun Flag */
84 /**
85 * @}
86 */
87
88 /** @defgroup DMAMUX_LL_EC_GET_FLAG Get Flags Defines
89 * @brief Flags defines which can be used with LL_DMAMUX_ReadReg function
90 * @{
91 */
92 #define LL_DMAMUX_CSR_SOF0 DMAMUX_CSR_SOF0 /*!< Synchronization Event Overrun Flag Channel 0 */
93 #define LL_DMAMUX_CSR_SOF1 DMAMUX_CSR_SOF1 /*!< Synchronization Event Overrun Flag Channel 1 */
94 #define LL_DMAMUX_CSR_SOF2 DMAMUX_CSR_SOF2 /*!< Synchronization Event Overrun Flag Channel 2 */
95 #define LL_DMAMUX_CSR_SOF3 DMAMUX_CSR_SOF3 /*!< Synchronization Event Overrun Flag Channel 3 */
96 #define LL_DMAMUX_CSR_SOF4 DMAMUX_CSR_SOF4 /*!< Synchronization Event Overrun Flag Channel 4 */
97 #define LL_DMAMUX_CSR_SOF5 DMAMUX_CSR_SOF5 /*!< Synchronization Event Overrun Flag Channel 5 */
98 #define LL_DMAMUX_CSR_SOF6 DMAMUX_CSR_SOF6 /*!< Synchronization Event Overrun Flag Channel 6 */
99 #define LL_DMAMUX_CSR_SOF7 DMAMUX_CSR_SOF7 /*!< Synchronization Event Overrun Flag Channel 7 */
100 #define LL_DMAMUX_CSR_SOF8 DMAMUX_CSR_SOF8 /*!< Synchronization Event Overrun Flag Channel 8 */
101 #define LL_DMAMUX_CSR_SOF9 DMAMUX_CSR_SOF9 /*!< Synchronization Event Overrun Flag Channel 9 */
102 #define LL_DMAMUX_CSR_SOF10 DMAMUX_CSR_SOF10 /*!< Synchronization Event Overrun Flag Channel 10 */
103 #define LL_DMAMUX_CSR_SOF11 DMAMUX_CSR_SOF11 /*!< Synchronization Event Overrun Flag Channel 11 */
104 #define LL_DMAMUX_CSR_SOF12 DMAMUX_CSR_SOF12 /*!< Synchronization Event Overrun Flag Channel 12 */
105 #define LL_DMAMUX_CSR_SOF13 DMAMUX_CSR_SOF13 /*!< Synchronization Event Overrun Flag Channel 13 */
106 #define LL_DMAMUX_RGSR_RGOF0 DMAMUX_RGSR_OF0 /*!< Request Generator 0 Trigger Event Overrun Flag */
107 #define LL_DMAMUX_RGSR_RGOF1 DMAMUX_RGSR_OF1 /*!< Request Generator 1 Trigger Event Overrun Flag */
108 #define LL_DMAMUX_RGSR_RGOF2 DMAMUX_RGSR_OF2 /*!< Request Generator 2 Trigger Event Overrun Flag */
109 #define LL_DMAMUX_RGSR_RGOF3 DMAMUX_RGSR_OF3 /*!< Request Generator 3 Trigger Event Overrun Flag */
110 /**
111 * @}
112 */
113
114 /** @defgroup DMAMUX_LL_EC_IT IT Defines
115 * @brief IT defines which can be used with LL_DMA_ReadReg and LL_DMAMUX_WriteReg functions
116 * @{
117 */
118 #define LL_DMAMUX_CCR_SOIE DMAMUX_CxCR_SOIE /*!< Synchronization Event Overrun Interrupt */
119 #define LL_DMAMUX_RGCR_RGOIE DMAMUX_RGxCR_OIE /*!< Request Generation Trigger Event Overrun Interrupt */
120 /**
121 * @}
122 */
123
124 /** @defgroup DMAMUX_LL_EC_REQUEST Transfer request
125 * @{
126 */
127 #define LL_DMAMUX_REQ_MEM2MEM 0U /*!< Memory to memory transfer */
128
129 #define LL_DMAMUX_REQ_GENERATOR0 1U /*!< DMAMUX request generator 0 */
130 #define LL_DMAMUX_REQ_GENERATOR1 2U /*!< DMAMUX request generator 1 */
131 #define LL_DMAMUX_REQ_GENERATOR2 3U /*!< DMAMUX request generator 2 */
132 #define LL_DMAMUX_REQ_GENERATOR3 4U /*!< DMAMUX request generator 3 */
133
134 #define LL_DMAMUX_REQ_ADC1 5U /*!< DMAMUX ADC1 request */
135
136 #if defined (ADC2)
137
138 #define LL_DMAMUX_REQ_ADC2 6U /*!< DMAMUX ADC1 request */
139
140 #define LL_DMAMUX_REQ_DAC1_CH1 7U /*!< DMAMUX DAC1 CH1 request */
141 #define LL_DMAMUX_REQ_DAC1_CH2 8U /*!< DMAMUX DAC1 CH2 request */
142
143 #define LL_DMAMUX_REQ_TIM6_UP 9U /*!< DMAMUX TIM6 UP request */
144 #define LL_DMAMUX_REQ_TIM7_UP 10U /*!< DMAMUX TIM7 UP request */
145
146 #define LL_DMAMUX_REQ_SPI1_RX 11U /*!< DMAMUX SPI1 RX request */
147 #define LL_DMAMUX_REQ_SPI1_TX 12U /*!< DMAMUX SPI1 TX request */
148 #define LL_DMAMUX_REQ_SPI2_RX 13U /*!< DMAMUX SPI2 RX request */
149 #define LL_DMAMUX_REQ_SPI2_TX 14U /*!< DMAMUX SPI2 TX request */
150 #define LL_DMAMUX_REQ_SPI3_RX 15U /*!< DMAMUX SPI3 RX request */
151 #define LL_DMAMUX_REQ_SPI3_TX 16U /*!< DMAMUX SPI3 TX request */
152
153 #define LL_DMAMUX_REQ_I2C1_RX 17U /*!< DMAMUX I2C1 RX request */
154 #define LL_DMAMUX_REQ_I2C1_TX 18U /*!< DMAMUX I2C1 TX request */
155 #define LL_DMAMUX_REQ_I2C2_RX 19U /*!< DMAMUX I2C2 RX request */
156 #define LL_DMAMUX_REQ_I2C2_TX 20U /*!< DMAMUX I2C2 TX request */
157 #define LL_DMAMUX_REQ_I2C3_RX 21U /*!< DMAMUX I2C3 RX request */
158 #define LL_DMAMUX_REQ_I2C3_TX 22U /*!< DMAMUX I2C3 TX request */
159 #define LL_DMAMUX_REQ_I2C4_RX 23U /*!< DMAMUX I2C4 RX request */
160 #define LL_DMAMUX_REQ_I2C4_TX 24U /*!< DMAMUX I2C4 TX request */
161
162 #define LL_DMAMUX_REQ_USART1_RX 25U /*!< DMAMUX USART1 RX request */
163 #define LL_DMAMUX_REQ_USART1_TX 26U /*!< DMAMUX USART1 TX request */
164 #define LL_DMAMUX_REQ_USART2_RX 27U /*!< DMAMUX USART2 RX request */
165 #define LL_DMAMUX_REQ_USART2_TX 28U /*!< DMAMUX USART2 TX request */
166 #define LL_DMAMUX_REQ_USART3_RX 29U /*!< DMAMUX USART3 RX request */
167 #define LL_DMAMUX_REQ_USART3_TX 30U /*!< DMAMUX USART3 TX request */
168
169 #define LL_DMAMUX_REQ_UART4_RX 31U /*!< DMAMUX UART4 RX request */
170 #define LL_DMAMUX_REQ_UART4_TX 32U /*!< DMAMUX UART4 TX request */
171 #define LL_DMAMUX_REQ_UART5_RX 33U /*!< DMAMUX UART5 RX request */
172 #define LL_DMAMUX_REQ_UART5_TX 34U /*!< DMAMUX UART5 TX request */
173
174 #define LL_DMAMUX_REQ_LPUART1_RX 35U /*!< DMAMUX LPUART1 RX request */
175 #define LL_DMAMUX_REQ_LPUART1_TX 36U /*!< DMAMUX LPUART1 TX request */
176
177 #define LL_DMAMUX_REQ_SAI1_A 37U /*!< DMAMUX SAI1 A request */
178 #define LL_DMAMUX_REQ_SAI1_B 38U /*!< DMAMUX SAI1 B request */
179 #define LL_DMAMUX_REQ_SAI2_A 39U /*!< DMAMUX SAI2 A request */
180 #define LL_DMAMUX_REQ_SAI2_B 40U /*!< DMAMUX SAI2 B request */
181
182 #define LL_DMAMUX_REQ_OSPI1 41U /*!< DMAMUX OCTOSPI1 request */
183 #define LL_DMAMUX_REQ_OSPI2 42U /*!< DMAMUX OCTOSPI2 request */
184
185 #define LL_DMAMUX_REQ_TIM1_CH1 43U /*!< DMAMUX TIM1 CH1 request */
186 #define LL_DMAMUX_REQ_TIM1_CH2 44U /*!< DMAMUX TIM1 CH2 request */
187 #define LL_DMAMUX_REQ_TIM1_CH3 45U /*!< DMAMUX TIM1 CH3 request */
188 #define LL_DMAMUX_REQ_TIM1_CH4 46U /*!< DMAMUX TIM1 CH4 request */
189 #define LL_DMAMUX_REQ_TIM1_UP 47U /*!< DMAMUX TIM1 UP request */
190 #define LL_DMAMUX_REQ_TIM1_TRIG 48U /*!< DMAMUX TIM1 TRIG request */
191 #define LL_DMAMUX_REQ_TIM1_COM 49U /*!< DMAMUX TIM1 COM request */
192
193 #define LL_DMAMUX_REQ_TIM8_CH1 50U /*!< DMAMUX TIM8 CH1 request */
194 #define LL_DMAMUX_REQ_TIM8_CH2 51U /*!< DMAMUX TIM8 CH2 request */
195 #define LL_DMAMUX_REQ_TIM8_CH3 52U /*!< DMAMUX TIM8 CH3 request */
196 #define LL_DMAMUX_REQ_TIM8_CH4 53U /*!< DMAMUX TIM8 CH4 request */
197 #define LL_DMAMUX_REQ_TIM8_UP 54U /*!< DMAMUX TIM8 UP request */
198 #define LL_DMAMUX_REQ_TIM8_TRIG 55U /*!< DMAMUX TIM8 TRIG request */
199 #define LL_DMAMUX_REQ_TIM8_COM 56U /*!< DMAMUX TIM8 COM request */
200
201 #define LL_DMAMUX_REQ_TIM2_CH1 57U /*!< DMAMUX TIM2 CH1 request */
202 #define LL_DMAMUX_REQ_TIM2_CH2 58U /*!< DMAMUX TIM2 CH2 request */
203 #define LL_DMAMUX_REQ_TIM2_CH3 59U /*!< DMAMUX TIM2 CH3 request */
204 #define LL_DMAMUX_REQ_TIM2_CH4 60U /*!< DMAMUX TIM2 CH4 request */
205 #define LL_DMAMUX_REQ_TIM2_UP 61U /*!< DMAMUX TIM2 UP request */
206
207 #define LL_DMAMUX_REQ_TIM3_CH1 62U /*!< DMAMUX TIM3 CH1 request */
208 #define LL_DMAMUX_REQ_TIM3_CH2 63U /*!< DMAMUX TIM3 CH2 request */
209 #define LL_DMAMUX_REQ_TIM3_CH3 64U /*!< DMAMUX TIM3 CH3 request */
210 #define LL_DMAMUX_REQ_TIM3_CH4 65U /*!< DMAMUX TIM3 CH4 request */
211 #define LL_DMAMUX_REQ_TIM3_UP 66U /*!< DMAMUX TIM3 UP request */
212 #define LL_DMAMUX_REQ_TIM3_TRIG 67U /*!< DMAMUX TIM3 TRIG request */
213
214 #define LL_DMAMUX_REQ_TIM4_CH1 68U /*!< DMAMUX TIM4 CH1 request */
215 #define LL_DMAMUX_REQ_TIM4_CH2 69U /*!< DMAMUX TIM4 CH2 request */
216 #define LL_DMAMUX_REQ_TIM4_CH3 70U /*!< DMAMUX TIM4 CH3 request */
217 #define LL_DMAMUX_REQ_TIM4_CH4 71U /*!< DMAMUX TIM4 CH4 request */
218 #define LL_DMAMUX_REQ_TIM4_UP 72U /*!< DMAMUX TIM4 UP request */
219
220 #define LL_DMAMUX_REQ_TIM5_CH1 73U /*!< DMAMUX TIM5 CH1 request */
221 #define LL_DMAMUX_REQ_TIM5_CH2 74U /*!< DMAMUX TIM5 CH2 request */
222 #define LL_DMAMUX_REQ_TIM5_CH3 75U /*!< DMAMUX TIM5 CH3 request */
223 #define LL_DMAMUX_REQ_TIM5_CH4 76U /*!< DMAMUX TIM5 CH4 request */
224 #define LL_DMAMUX_REQ_TIM5_UP 77U /*!< DMAMUX TIM5 UP request */
225 #define LL_DMAMUX_REQ_TIM5_TRIG 78U /*!< DMAMUX TIM5 TRIG request */
226 #define LL_DMAMUX_REQ_TIM15_CH1 79U /*!< DMAMUX TIM15 CH1 request */
227 #define LL_DMAMUX_REQ_TIM15_UP 80U /*!< DMAMUX TIM15 UP request */
228 #define LL_DMAMUX_REQ_TIM15_TRIG 81U /*!< DMAMUX TIM15 TRIG request */
229 #define LL_DMAMUX_REQ_TIM15_COM 82U /*!< DMAMUX TIM15 COM request */
230
231 #define LL_DMAMUX_REQ_TIM16_CH1 83U /*!< DMAMUX TIM16 CH1 request */
232 #define LL_DMAMUX_REQ_TIM16_UP 84U /*!< DMAMUX TIM16 UP request */
233 #define LL_DMAMUX_REQ_TIM17_CH1 85U /*!< DMAMUX TIM17 CH1 request */
234 #define LL_DMAMUX_REQ_TIM17_UP 86U /*!< DMAMUX TIM17 UP request */
235
236 #define LL_DMAMUX_REQ_DFSDM1_FLT0 87U /*!< DMAMUX DFSDM1_FLT0 request */
237 #define LL_DMAMUX_REQ_DFSDM1_FLT1 88U /*!< DMAMUX DFSDM1_FLT1 request */
238 #define LL_DMAMUX_REQ_DFSDM1_FLT2 89U /*!< DMAMUX DFSDM1_FLT2 request */
239 #define LL_DMAMUX_REQ_DFSDM1_FLT3 90U /*!< DMAMUX DFSDM1_FLT3 request */
240
241 #define LL_DMAMUX_REQ_DCMI 91U /*!< DMAMUX DCMI request */
242 #define LL_DMAMUX_REQ_DCMI_PSSI 91U /*!< DMAMUX PSSI request */
243
244 #define LL_DMAMUX_REQ_AES_IN 92U /*!< DMAMUX AES_IN request */
245 #define LL_DMAMUX_REQ_AES_OUT 93U /*!< DMAMUX AES_OUT request */
246
247 #define LL_DMAMUX_REQ_HASH_IN 94U /*!< DMAMUX HASH_IN request */
248
249 #else
250
251 #define LL_DMAMUX_REQ_DAC1_CH1 6U /*!< DMAMUX DAC1 CH1 request */
252 #define LL_DMAMUX_REQ_DAC1_CH2 7U /*!< DMAMUX DAC1 CH2 request */
253
254 #define LL_DMAMUX_REQ_TIM6_UP 8U /*!< DMAMUX TIM6 UP request */
255 #define LL_DMAMUX_REQ_TIM7_UP 9U /*!< DMAMUX TIM7 UP request */
256
257 #define LL_DMAMUX_REQ_SPI1_RX 10U /*!< DMAMUX SPI1 RX request */
258 #define LL_DMAMUX_REQ_SPI1_TX 11U /*!< DMAMUX SPI1 TX request */
259 #define LL_DMAMUX_REQ_SPI2_RX 12U /*!< DMAMUX SPI2 RX request */
260 #define LL_DMAMUX_REQ_SPI2_TX 13U /*!< DMAMUX SPI2 TX request */
261 #define LL_DMAMUX_REQ_SPI3_RX 14U /*!< DMAMUX SPI3 RX request */
262 #define LL_DMAMUX_REQ_SPI3_TX 15U /*!< DMAMUX SPI3 TX request */
263
264 #define LL_DMAMUX_REQ_I2C1_RX 16U /*!< DMAMUX I2C1 RX request */
265 #define LL_DMAMUX_REQ_I2C1_TX 17U /*!< DMAMUX I2C1 TX request */
266 #define LL_DMAMUX_REQ_I2C2_RX 18U /*!< DMAMUX I2C2 RX request */
267 #define LL_DMAMUX_REQ_I2C2_TX 19U /*!< DMAMUX I2C2 TX request */
268 #define LL_DMAMUX_REQ_I2C3_RX 20U /*!< DMAMUX I2C3 RX request */
269 #define LL_DMAMUX_REQ_I2C3_TX 21U /*!< DMAMUX I2C3 TX request */
270 #define LL_DMAMUX_REQ_I2C4_RX 22U /*!< DMAMUX I2C4 RX request */
271 #define LL_DMAMUX_REQ_I2C4_TX 23U /*!< DMAMUX I2C4 TX request */
272
273 #define LL_DMAMUX_REQ_USART1_RX 24U /*!< DMAMUX USART1 RX request */
274 #define LL_DMAMUX_REQ_USART1_TX 25U /*!< DMAMUX USART1 TX request */
275 #define LL_DMAMUX_REQ_USART2_RX 26U /*!< DMAMUX USART2 RX request */
276 #define LL_DMAMUX_REQ_USART2_TX 27U /*!< DMAMUX USART2 TX request */
277 #define LL_DMAMUX_REQ_USART3_RX 28U /*!< DMAMUX USART3 RX request */
278 #define LL_DMAMUX_REQ_USART3_TX 29U /*!< DMAMUX USART3 TX request */
279
280 #define LL_DMAMUX_REQ_UART4_RX 30U /*!< DMAMUX UART4 RX request */
281 #define LL_DMAMUX_REQ_UART4_TX 31U /*!< DMAMUX UART4 TX request */
282 #define LL_DMAMUX_REQ_UART5_RX 32U /*!< DMAMUX UART5 RX request */
283 #define LL_DMAMUX_REQ_UART5_TX 33U /*!< DMAMUX UART5 TX request */
284
285 #define LL_DMAMUX_REQ_LPUART1_RX 34U /*!< DMAMUX LPUART1 RX request */
286 #define LL_DMAMUX_REQ_LPUART1_TX 35U /*!< DMAMUX LPUART1 TX request */
287
288 #define LL_DMAMUX_REQ_SAI1_A 36U /*!< DMAMUX SAI1 A request */
289 #define LL_DMAMUX_REQ_SAI1_B 37U /*!< DMAMUX SAI1 B request */
290 #define LL_DMAMUX_REQ_SAI2_A 38U /*!< DMAMUX SAI2 A request */
291 #define LL_DMAMUX_REQ_SAI2_B 39U /*!< DMAMUX SAI2 B request */
292
293 #define LL_DMAMUX_REQ_OSPI1 40U /*!< DMAMUX OCTOSPI1 request */
294 #define LL_DMAMUX_REQ_OSPI2 41U /*!< DMAMUX OCTOSPI2 request */
295
296 #define LL_DMAMUX_REQ_TIM1_CH1 42U /*!< DMAMUX TIM1 CH1 request */
297 #define LL_DMAMUX_REQ_TIM1_CH2 43U /*!< DMAMUX TIM1 CH2 request */
298 #define LL_DMAMUX_REQ_TIM1_CH3 44U /*!< DMAMUX TIM1 CH3 request */
299 #define LL_DMAMUX_REQ_TIM1_CH4 45U /*!< DMAMUX TIM1 CH4 request */
300 #define LL_DMAMUX_REQ_TIM1_UP 46U /*!< DMAMUX TIM1 UP request */
301 #define LL_DMAMUX_REQ_TIM1_TRIG 47U /*!< DMAMUX TIM1 TRIG request */
302 #define LL_DMAMUX_REQ_TIM1_COM 48U /*!< DMAMUX TIM1 COM request */
303
304 #define LL_DMAMUX_REQ_TIM8_CH1 49U /*!< DMAMUX TIM8 CH1 request */
305 #define LL_DMAMUX_REQ_TIM8_CH2 50U /*!< DMAMUX TIM8 CH2 request */
306 #define LL_DMAMUX_REQ_TIM8_CH3 51U /*!< DMAMUX TIM8 CH3 request */
307 #define LL_DMAMUX_REQ_TIM8_CH4 52U /*!< DMAMUX TIM8 CH4 request */
308 #define LL_DMAMUX_REQ_TIM8_UP 53U /*!< DMAMUX TIM8 UP request */
309 #define LL_DMAMUX_REQ_TIM8_TRIG 54U /*!< DMAMUX TIM8 TRIG request */
310 #define LL_DMAMUX_REQ_TIM8_COM 55U /*!< DMAMUX TIM8 COM request */
311
312 #define LL_DMAMUX_REQ_TIM2_CH1 56U /*!< DMAMUX TIM2 CH1 request */
313 #define LL_DMAMUX_REQ_TIM2_CH2 57U /*!< DMAMUX TIM2 CH2 request */
314 #define LL_DMAMUX_REQ_TIM2_CH3 58U /*!< DMAMUX TIM2 CH3 request */
315 #define LL_DMAMUX_REQ_TIM2_CH4 59U /*!< DMAMUX TIM2 CH4 request */
316 #define LL_DMAMUX_REQ_TIM2_UP 60U /*!< DMAMUX TIM2 UP request */
317
318 #define LL_DMAMUX_REQ_TIM3_CH1 61U /*!< DMAMUX TIM3 CH1 request */
319 #define LL_DMAMUX_REQ_TIM3_CH2 62U /*!< DMAMUX TIM3 CH2 request */
320 #define LL_DMAMUX_REQ_TIM3_CH3 63U /*!< DMAMUX TIM3 CH3 request */
321 #define LL_DMAMUX_REQ_TIM3_CH4 64U /*!< DMAMUX TIM3 CH4 request */
322 #define LL_DMAMUX_REQ_TIM3_UP 65U /*!< DMAMUX TIM3 UP request */
323 #define LL_DMAMUX_REQ_TIM3_TRIG 66U /*!< DMAMUX TIM3 TRIG request */
324
325 #define LL_DMAMUX_REQ_TIM4_CH1 67U /*!< DMAMUX TIM4 CH1 request */
326 #define LL_DMAMUX_REQ_TIM4_CH2 68U /*!< DMAMUX TIM4 CH2 request */
327 #define LL_DMAMUX_REQ_TIM4_CH3 69U /*!< DMAMUX TIM4 CH3 request */
328 #define LL_DMAMUX_REQ_TIM4_CH4 70U /*!< DMAMUX TIM4 CH4 request */
329 #define LL_DMAMUX_REQ_TIM4_UP 71U /*!< DMAMUX TIM4 UP request */
330
331 #define LL_DMAMUX_REQ_TIM5_CH1 72U /*!< DMAMUX TIM5 CH1 request */
332 #define LL_DMAMUX_REQ_TIM5_CH2 73U /*!< DMAMUX TIM5 CH2 request */
333 #define LL_DMAMUX_REQ_TIM5_CH3 74U /*!< DMAMUX TIM5 CH3 request */
334 #define LL_DMAMUX_REQ_TIM5_CH4 75U /*!< DMAMUX TIM5 CH4 request */
335 #define LL_DMAMUX_REQ_TIM5_UP 76U /*!< DMAMUX TIM5 UP request */
336 #define LL_DMAMUX_REQ_TIM5_TRIG 77U /*!< DMAMUX TIM5 TRIG request */
337 #define LL_DMAMUX_REQ_TIM15_CH1 78U /*!< DMAMUX TIM15 CH1 request */
338 #define LL_DMAMUX_REQ_TIM15_UP 79U /*!< DMAMUX TIM15 UP request */
339 #define LL_DMAMUX_REQ_TIM15_TRIG 80U /*!< DMAMUX TIM15 TRIG request */
340 #define LL_DMAMUX_REQ_TIM15_COM 81U /*!< DMAMUX TIM15 COM request */
341
342 #define LL_DMAMUX_REQ_TIM16_CH1 82U /*!< DMAMUX TIM16 CH1 request */
343 #define LL_DMAMUX_REQ_TIM16_UP 83U /*!< DMAMUX TIM16 UP request */
344 #define LL_DMAMUX_REQ_TIM17_CH1 84U /*!< DMAMUX TIM17 CH1 request */
345 #define LL_DMAMUX_REQ_TIM17_UP 85U /*!< DMAMUX TIM17 UP request */
346
347 #define LL_DMAMUX_REQ_DFSDM1_FLT0 86U /*!< DMAMUX DFSDM1_FLT0 request */
348 #define LL_DMAMUX_REQ_DFSDM1_FLT1 87U /*!< DMAMUX DFSDM1_FLT1 request */
349 #define LL_DMAMUX_REQ_DFSDM1_FLT2 88U /*!< DMAMUX DFSDM1_FLT2 request */
350 #define LL_DMAMUX_REQ_DFSDM1_FLT3 89U /*!< DMAMUX DFSDM1_FLT3 request */
351
352 #define LL_DMAMUX_REQ_DCMI 90U /*!< DMAMUX DCMI request */
353
354 #define LL_DMAMUX_REQ_AES_IN 91U /*!< DMAMUX AES_IN request */
355 #define LL_DMAMUX_REQ_AES_OUT 92U /*!< DMAMUX AES_OUT request */
356
357 #define LL_DMAMUX_REQ_HASH_IN 93U /*!< DMAMUX HASH_IN request */
358
359 #endif
360
361 /**
362 * @}
363 */
364
365 /** @defgroup DMAMUX_LL_EC_CHANNEL DMAMUX Channel
366 * @{
367 */
368 #define LL_DMAMUX_CHANNEL_0 0x00000000U /*!< DMAMUX Channel 0 connected to DMA1 Channel 1 */
369 #define LL_DMAMUX_CHANNEL_1 0x00000001U /*!< DMAMUX Channel 1 connected to DMA1 Channel 2 */
370 #define LL_DMAMUX_CHANNEL_2 0x00000002U /*!< DMAMUX Channel 2 connected to DMA1 Channel 3 */
371 #define LL_DMAMUX_CHANNEL_3 0x00000003U /*!< DMAMUX Channel 3 connected to DMA1 Channel 4 */
372 #define LL_DMAMUX_CHANNEL_4 0x00000004U /*!< DMAMUX Channel 4 connected to DMA1 Channel 5 */
373 #define LL_DMAMUX_CHANNEL_5 0x00000005U /*!< DMAMUX Channel 5 connected to DMA1 Channel 6 */
374 #define LL_DMAMUX_CHANNEL_6 0x00000006U /*!< DMAMUX Channel 6 connected to DMA1 Channel 7 */
375 #define LL_DMAMUX_CHANNEL_7 0x00000007U /*!< DMAMUX Channel 7 connected to DMA2 Channel 1 */
376 #define LL_DMAMUX_CHANNEL_8 0x00000008U /*!< DMAMUX Channel 8 connected to DMA2 Channel 2 */
377 #define LL_DMAMUX_CHANNEL_9 0x00000009U /*!< DMAMUX Channel 9 connected to DMA2 Channel 3 */
378 #define LL_DMAMUX_CHANNEL_10 0x0000000AU /*!< DMAMUX Channel 10 connected to DMA2 Channel 4 */
379 #define LL_DMAMUX_CHANNEL_11 0x0000000BU /*!< DMAMUX Channel 11 connected to DMA2 Channel 5 */
380 #define LL_DMAMUX_CHANNEL_12 0x0000000CU /*!< DMAMUX Channel 12 connected to DMA2 Channel 6 */
381 #define LL_DMAMUX_CHANNEL_13 0x0000000DU /*!< DMAMUX Channel 13 connected to DMA2 Channel 7 */
382 /**
383 * @}
384 */
385
386 /** @defgroup DMAMUX_LL_EC_SYNC_NO Synchronization Signal Polarity
387 * @{
388 */
389 #define LL_DMAMUX_SYNC_NO_EVENT 0x00000000U /*!< All requests are blocked */
390 #define LL_DMAMUX_SYNC_POL_RISING DMAMUX_CxCR_SPOL_0 /*!< Synchronization on event on rising edge */
391 #define LL_DMAMUX_SYNC_POL_FALLING DMAMUX_CxCR_SPOL_1 /*!< Synchronization on event on falling edge */
392 #define LL_DMAMUX_SYNC_POL_RISING_FALLING (DMAMUX_CxCR_SPOL_0 | DMAMUX_CxCR_SPOL_1) /*!< Synchronization on event on rising and falling edge */
393 /**
394 * @}
395 */
396
397 /** @defgroup DMAMUX_LL_EC_SYNC_EVT Synchronization Signal Event
398 * @{
399 */
400 #define LL_DMAMUX_SYNC_EXTI_LINE0 0x00000000U /*!< Synchronization signal from EXTI Line0 */
401 #define LL_DMAMUX_SYNC_EXTI_LINE1 DMAMUX_CxCR_SYNC_ID_0 /*!< Synchronization signal from EXTI Line1 */
402 #define LL_DMAMUX_SYNC_EXTI_LINE2 DMAMUX_CxCR_SYNC_ID_1 /*!< Synchronization signal from EXTI Line2 */
403 #define LL_DMAMUX_SYNC_EXTI_LINE3 (DMAMUX_CxCR_SYNC_ID_1 | DMAMUX_CxCR_SYNC_ID_0) /*!< Synchronization signal from EXTI Line3 */
404 #define LL_DMAMUX_SYNC_EXTI_LINE4 DMAMUX_CxCR_SYNC_ID_2 /*!< Synchronization signal from EXTI Line4 */
405 #define LL_DMAMUX_SYNC_EXTI_LINE5 (DMAMUX_CxCR_SYNC_ID_2 | DMAMUX_CxCR_SYNC_ID_0) /*!< Synchronization signal from EXTI Line5 */
406 #define LL_DMAMUX_SYNC_EXTI_LINE6 (DMAMUX_CxCR_SYNC_ID_2 | DMAMUX_CxCR_SYNC_ID_1) /*!< Synchronization signal from EXTI Line6 */
407 #define LL_DMAMUX_SYNC_EXTI_LINE7 (DMAMUX_CxCR_SYNC_ID_2 | DMAMUX_CxCR_SYNC_ID_1 | DMAMUX_CxCR_SYNC_ID_0) /*!< Synchronization signal from EXTI Line7 */
408 #define LL_DMAMUX_SYNC_EXTI_LINE8 DMAMUX_CxCR_SYNC_ID_3 /*!< Synchronization signal from EXTI Line8 */
409 #define LL_DMAMUX_SYNC_EXTI_LINE9 (DMAMUX_CxCR_SYNC_ID_3 | DMAMUX_CxCR_SYNC_ID_0) /*!< Synchronization signal from EXTI Line9 */
410 #define LL_DMAMUX_SYNC_EXTI_LINE10 (DMAMUX_CxCR_SYNC_ID_3 | DMAMUX_CxCR_SYNC_ID_1) /*!< Synchronization signal from EXTI Line10 */
411 #define LL_DMAMUX_SYNC_EXTI_LINE11 (DMAMUX_CxCR_SYNC_ID_3 | DMAMUX_CxCR_SYNC_ID_1 | DMAMUX_CxCR_SYNC_ID_0) /*!< Synchronization signal from EXTI Line11 */
412 #define LL_DMAMUX_SYNC_EXTI_LINE12 (DMAMUX_CxCR_SYNC_ID_3 | DMAMUX_CxCR_SYNC_ID_2) /*!< Synchronization signal from EXTI Line12 */
413 #define LL_DMAMUX_SYNC_EXTI_LINE13 (DMAMUX_CxCR_SYNC_ID_3 | DMAMUX_CxCR_SYNC_ID_2 | DMAMUX_CxCR_SYNC_ID_0) /*!< Synchronization signal from EXTI Line13 */
414 #define LL_DMAMUX_SYNC_EXTI_LINE14 (DMAMUX_CxCR_SYNC_ID_3 | DMAMUX_CxCR_SYNC_ID_2 | DMAMUX_CxCR_SYNC_ID_1) /*!< Synchronization signal from EXTI Line14 */
415 #define LL_DMAMUX_SYNC_EXTI_LINE15 (DMAMUX_CxCR_SYNC_ID_3 | DMAMUX_CxCR_SYNC_ID_2 | DMAMUX_CxCR_SYNC_ID_1 | DMAMUX_CxCR_SYNC_ID_0) /*!< Synchronization signal from EXTI Line15 */
416 #define LL_DMAMUX_SYNC_DMAMUX_CH0 DMAMUX_CxCR_SYNC_ID_4 /*!< Synchronization signal from DMAMUX channel0 Event */
417 #define LL_DMAMUX_SYNC_DMAMUX_CH1 (DMAMUX_CxCR_SYNC_ID_4 | DMAMUX_CxCR_SYNC_ID_0) /*!< Synchronization signal from DMAMUX channel1 Event */
418 #define LL_DMAMUX_SYNC_DMAMUX_CH2 (DMAMUX_CxCR_SYNC_ID_4 | DMAMUX_CxCR_SYNC_ID_1) /*!< Synchronization signal from DMAMUX channel2 Event */
419 #define LL_DMAMUX_SYNC_DMAMUX_CH3 (DMAMUX_CxCR_SYNC_ID_4 | DMAMUX_CxCR_SYNC_ID_1 | DMAMUX_CxCR_SYNC_ID_0) /*!< Synchronization signal from DMAMUX channel3 Event */
420 #define LL_DMAMUX_SYNC_LPTIM1_OUT (DMAMUX_CxCR_SYNC_ID_4 | DMAMUX_CxCR_SYNC_ID_2) /*!< Synchronization signal from LPTIM1 Ouput */
421 #define LL_DMAMUX_SYNC_LPTIM2_OUT (DMAMUX_CxCR_SYNC_ID_4 | DMAMUX_CxCR_SYNC_ID_2 | DMAMUX_CxCR_SYNC_ID_0) /*!< Synchronization signal from LPTIM2 Ouput */
422 #define LL_DMAMUX_SYNC_DSI_TE (DMAMUX_CxCR_SYNC_ID_4 | DMAMUX_CxCR_SYNC_ID_2 | DMAMUX_CxCR_SYNC_ID_1) /*!< Synchronization signal from DSI Tearing Effect */
423 #define LL_DMAMUX_SYNC_DSI_REFRESH_END (DMAMUX_CxCR_SYNC_ID_4 | DMAMUX_CxCR_SYNC_ID_2 | DMAMUX_CxCR_SYNC_ID_1 | DMAMUX_CxCR_SYNC_ID_0) /*!< Synchronization signal from DSI End of Refresh */
424 #define LL_DMAMUX_SYNC_DMA2D_TX_END (DMAMUX_CxCR_SYNC_ID_4 | DMAMUX_CxCR_SYNC_ID_3) /*!< Synchronization signal from DMA2D End of Transfer */
425 #define LL_DMAMUX_SYNC_LTDC_LINE_IT (DMAMUX_CxCR_SYNC_ID_4 | DMAMUX_CxCR_SYNC_ID_3 | DMAMUX_CxCR_SYNC_ID_0) /*!< Synchronization signal from LTDC Line Interrupt */
426 /**
427 * @}
428 */
429
430 /** @defgroup DMAMUX_LL_EC_REQUEST_GENERATOR Request Generator Channel
431 * @{
432 */
433 #define LL_DMAMUX_REQ_GEN_0 0x00000000U
434 #define LL_DMAMUX_REQ_GEN_1 0x00000001U
435 #define LL_DMAMUX_REQ_GEN_2 0x00000002U
436 #define LL_DMAMUX_REQ_GEN_3 0x00000003U
437 /**
438 * @}
439 */
440
441 /** @defgroup DMAMUX_LL_EC_REQUEST_GEN_POLARITY External Request Signal Generation Polarity
442 * @{
443 */
444 #define LL_DMAMUX_REQ_GEN_NO_EVENT 0x00000000U /*!< No external DMA request generation */
445 #define LL_DMAMUX_REQ_GEN_POL_RISING DMAMUX_RGxCR_GPOL_0 /*!< External DMA request generation on event on rising edge */
446 #define LL_DMAMUX_REQ_GEN_POL_FALLING DMAMUX_RGxCR_GPOL_1 /*!< External DMA request generation on event on falling edge */
447 #define LL_DMAMUX_REQ_GEN_POL_RISING_FALLING (DMAMUX_RGxCR_GPOL_0 | DMAMUX_RGxCR_GPOL_1) /*!< External DMA request generation on rising and falling edge */
448 /**
449 * @}
450 */
451
452 /** @defgroup DMAMUX_LL_EC_REQUEST_GEN External Request Signal Generation
453 * @{
454 */
455 #define LL_DMAMUX_REQ_GEN_EXTI_LINE0 0x00000000U /*!< Request signal generation from EXTI Line0 */
456 #define LL_DMAMUX_REQ_GEN_EXTI_LINE1 DMAMUX_RGxCR_SIG_ID_0 /*!< Request signal generation from EXTI Line1 */
457 #define LL_DMAMUX_REQ_GEN_EXTI_LINE2 DMAMUX_RGxCR_SIG_ID_1 /*!< Request signal generation from EXTI Line2 */
458 #define LL_DMAMUX_REQ_GEN_EXTI_LINE3 (DMAMUX_RGxCR_SIG_ID_1 |DMAMUX_RGxCR_SIG_ID_0) /*!< Request signal generation from EXTI Line3 */
459 #define LL_DMAMUX_REQ_GEN_EXTI_LINE4 DMAMUX_RGxCR_SIG_ID_2 /*!< Request signal generation from EXTI Line4 */
460 #define LL_DMAMUX_REQ_GEN_EXTI_LINE5 (DMAMUX_RGxCR_SIG_ID_2 | DMAMUX_RGxCR_SIG_ID_0) /*!< Request signal generation from EXTI Line5 */
461 #define LL_DMAMUX_REQ_GEN_EXTI_LINE6 (DMAMUX_RGxCR_SIG_ID_2 | DMAMUX_RGxCR_SIG_ID_1) /*!< Request signal generation from EXTI Line6 */
462 #define LL_DMAMUX_REQ_GEN_EXTI_LINE7 (DMAMUX_RGxCR_SIG_ID_2 | DMAMUX_RGxCR_SIG_ID_1 | DMAMUX_RGxCR_SIG_ID_0) /*!< Request signal generation from EXTI Line7 */
463 #define LL_DMAMUX_REQ_GEN_EXTI_LINE8 DMAMUX_RGxCR_SIG_ID_3 /*!< Request signal generation from EXTI Line8 */
464 #define LL_DMAMUX_REQ_GEN_EXTI_LINE9 (DMAMUX_RGxCR_SIG_ID_3 | DMAMUX_RGxCR_SIG_ID_0) /*!< Request signal generation from EXTI Line9 */
465 #define LL_DMAMUX_REQ_GEN_EXTI_LINE10 (DMAMUX_RGxCR_SIG_ID_3 | DMAMUX_RGxCR_SIG_ID_1) /*!< Request signal generation from EXTI Line10 */
466 #define LL_DMAMUX_REQ_GEN_EXTI_LINE11 (DMAMUX_RGxCR_SIG_ID_3 | DMAMUX_RGxCR_SIG_ID_1 | DMAMUX_RGxCR_SIG_ID_0) /*!< Request signal generation from EXTI Line11 */
467 #define LL_DMAMUX_REQ_GEN_EXTI_LINE12 (DMAMUX_RGxCR_SIG_ID_3 | DMAMUX_RGxCR_SIG_ID_2) /*!< Request signal generation from EXTI Line12 */
468 #define LL_DMAMUX_REQ_GEN_EXTI_LINE13 (DMAMUX_RGxCR_SIG_ID_3 | DMAMUX_RGxCR_SIG_ID_2 | DMAMUX_RGxCR_SIG_ID_0) /*!< Request signal generation from EXTI Line13 */
469 #define LL_DMAMUX_REQ_GEN_EXTI_LINE14 (DMAMUX_RGxCR_SIG_ID_3 | DMAMUX_RGxCR_SIG_ID_2 | DMAMUX_RGxCR_SIG_ID_1) /*!< Request signal generation from EXTI Line14 */
470 #define LL_DMAMUX_REQ_GEN_EXTI_LINE15 (DMAMUX_RGxCR_SIG_ID_3 | DMAMUX_RGxCR_SIG_ID_2 | DMAMUX_RGxCR_SIG_ID_1 | DMAMUX_RGxCR_SIG_ID_0) /*!< Request signal generation from EXTI Line15 */
471 #define LL_DMAMUX_REQ_GEN_DMAMUX_CH0 DMAMUX_RGxCR_SIG_ID_4 /*!< Request signal generation from DMAMUX channel0 Event */
472 #define LL_DMAMUX_REQ_GEN_DMAMUX_CH1 (DMAMUX_RGxCR_SIG_ID_4 | DMAMUX_RGxCR_SIG_ID_0) /*!< Request signal generation from DMAMUX channel1 Event */
473 #define LL_DMAMUX_REQ_GEN_DMAMUX_CH2 (DMAMUX_RGxCR_SIG_ID_4 | DMAMUX_RGxCR_SIG_ID_1) /*!< Request signal generation from DMAMUX channel2 Event */
474 #define LL_DMAMUX_REQ_GEN_DMAMUX_CH3 (DMAMUX_RGxCR_SIG_ID_4 | DMAMUX_RGxCR_SIG_ID_1 | DMAMUX_RGxCR_SIG_ID_0) /*!< Request signal generation from DMAMUX channel3 Event */
475 #define LL_DMAMUX_REQ_GEN_LPTIM1_OUT (DMAMUX_RGxCR_SIG_ID_4 | DMAMUX_RGxCR_SIG_ID_2) /*!< Request signal generation from LPTIM1 Ouput */
476 #define LL_DMAMUX_REQ_GEN_LPTIM2_OUT (DMAMUX_RGxCR_SIG_ID_4 | DMAMUX_RGxCR_SIG_ID_2 | DMAMUX_RGxCR_SIG_ID_0) /*!< Request signal generation from LPTIM2 Ouput */
477 #define LL_DMAMUX_REQ_GEN_DSI_TE (DMAMUX_RGxCR_SIG_ID_4 | DMAMUX_RGxCR_SIG_ID_2 | DMAMUX_RGxCR_SIG_ID_1) /*!< Request signal generation from DSI Tearing Effect */
478 #define LL_DMAMUX_REQ_GEN_DSI_REFRESH_END (DMAMUX_RGxCR_SIG_ID_4 | DMAMUX_RGxCR_SIG_ID_2 | DMAMUX_RGxCR_SIG_ID_1 | DMAMUX_RGxCR_SIG_ID_0) /*!< Request signal generation from DSI End of Refresh */
479 #define LL_DMAMUX_REQ_GEN_DMA2D_TX_END (DMAMUX_RGxCR_SIG_ID_4 | DMAMUX_RGxCR_SIG_ID_3) /*!< Request signal generation from DMA2D End of Transfer */
480 #define LL_DMAMUX_REQ_GEN_LTDC_LINE_IT (DMAMUX_RGxCR_SIG_ID_4 | DMAMUX_RGxCR_SIG_ID_3 | DMAMUX_RGxCR_SIG_ID_0) /*!< Request signal generation from LTDC Line Interrupt */
481 /**
482 * @}
483 */
484
485 /**
486 * @}
487 */
488
489 /* Exported macro ------------------------------------------------------------*/
490 /** @defgroup DMAMUX_LL_Exported_Macros DMAMUX Exported Macros
491 * @{
492 */
493
494 /** @defgroup DMAMUX_LL_EM_WRITE_READ Common Write and read registers macros
495 * @{
496 */
497 /**
498 * @brief Write a value in DMAMUX register
499 * @param __INSTANCE__ DMAMUX Instance
500 * @param __REG__ Register to be written
501 * @param __VALUE__ Value to be written in the register
502 * @retval None
503 */
504 #define LL_DMAMUX_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
505
506 /**
507 * @brief Read a value in DMAMUX register
508 * @param __INSTANCE__ DMAMUX Instance
509 * @param __REG__ Register to be read
510 * @retval Register value
511 */
512 #define LL_DMAMUX_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
513 /**
514 * @}
515 */
516
517 /**
518 * @}
519 */
520
521 /* Exported functions --------------------------------------------------------*/
522 /** @defgroup DMAMUX_LL_Exported_Functions DMAMUX Exported Functions
523 * @{
524 */
525
526 /** @defgroup DMAMUX_LL_EF_Configuration Configuration
527 * @{
528 */
529 /**
530 * @brief Set DMAMUX request ID for DMAMUX Channel x.
531 * @note DMAMUX channel 0 to 6 are mapped to DMA1 channel 1 to 7.
532 * DMAMUX channel 7 to 13 are mapped to DMA2 channel 1 to 7.
533 * @rmtoll CxCR DMAREQ_ID LL_DMAMUX_SetRequestID
534 * @param DMAMUXx DMAMUXx Instance
535 * @param Channel This parameter can be one of the following values:
536 * @arg @ref LL_DMAMUX_CHANNEL_0
537 * @arg @ref LL_DMAMUX_CHANNEL_1
538 * @arg @ref LL_DMAMUX_CHANNEL_2
539 * @arg @ref LL_DMAMUX_CHANNEL_3
540 * @arg @ref LL_DMAMUX_CHANNEL_4
541 * @arg @ref LL_DMAMUX_CHANNEL_5
542 * @arg @ref LL_DMAMUX_CHANNEL_6
543 * @arg @ref LL_DMAMUX_CHANNEL_7
544 * @arg @ref LL_DMAMUX_CHANNEL_8
545 * @arg @ref LL_DMAMUX_CHANNEL_9
546 * @arg @ref LL_DMAMUX_CHANNEL_10
547 * @arg @ref LL_DMAMUX_CHANNEL_11
548 * @arg @ref LL_DMAMUX_CHANNEL_12
549 * @arg @ref LL_DMAMUX_CHANNEL_13
550 * @param Request This parameter can be one of the following values:
551 * @arg @ref LL_DMAMUX_REQ_MEM2MEM
552 * @arg @ref LL_DMAMUX_REQ_GENERATOR0
553 * @arg @ref LL_DMAMUX_REQ_GENERATOR1
554 * @arg @ref LL_DMAMUX_REQ_GENERATOR2
555 * @arg @ref LL_DMAMUX_REQ_GENERATOR3
556 * @arg @ref LL_DMAMUX_REQ_ADC1
557 * @arg @ref LL_DMAMUX_REQ_DAC1_CH1
558 * @arg @ref LL_DMAMUX_REQ_DAC1_CH2
559 * @arg @ref LL_DMAMUX_REQ_TIM6_UP
560 * @arg @ref LL_DMAMUX_REQ_TIM7_UP
561 * @arg @ref LL_DMAMUX_REQ_SPI1_RX
562 * @arg @ref LL_DMAMUX_REQ_SPI1_TX
563 * @arg @ref LL_DMAMUX_REQ_SPI2_RX
564 * @arg @ref LL_DMAMUX_REQ_SPI2_TX
565 * @arg @ref LL_DMAMUX_REQ_SPI3_RX
566 * @arg @ref LL_DMAMUX_REQ_SPI3_TX
567 * @arg @ref LL_DMAMUX_REQ_I2C1_RX
568 * @arg @ref LL_DMAMUX_REQ_I2C1_TX
569 * @arg @ref LL_DMAMUX_REQ_I2C2_RX
570 * @arg @ref LL_DMAMUX_REQ_I2C2_TX
571 * @arg @ref LL_DMAMUX_REQ_I2C3_RX
572 * @arg @ref LL_DMAMUX_REQ_I2C3_TX
573 * @arg @ref LL_DMAMUX_REQ_I2C4_RX
574 * @arg @ref LL_DMAMUX_REQ_I2C4_TX
575 * @arg @ref LL_DMAMUX_REQ_USART1_RX
576 * @arg @ref LL_DMAMUX_REQ_USART1_TX
577 * @arg @ref LL_DMAMUX_REQ_USART2_RX
578 * @arg @ref LL_DMAMUX_REQ_USART2_TX
579 * @arg @ref LL_DMAMUX_REQ_USART3_RX
580 * @arg @ref LL_DMAMUX_REQ_USART3_TX
581 * @arg @ref LL_DMAMUX_REQ_UART4_RX
582 * @arg @ref LL_DMAMUX_REQ_UART4_TX
583 * @arg @ref LL_DMAMUX_REQ_UART5_RX
584 * @arg @ref LL_DMAMUX_REQ_UART5_TX
585 * @arg @ref LL_DMAMUX_REQ_LPUART1_RX
586 * @arg @ref LL_DMAMUX_REQ_LPUART1_TX
587 * @arg @ref LL_DMAMUX_REQ_SAI1_A
588 * @arg @ref LL_DMAMUX_REQ_SAI1_B
589 * @arg @ref LL_DMAMUX_REQ_SAI2_A
590 * @arg @ref LL_DMAMUX_REQ_SAI2_B
591 * @arg @ref LL_DMAMUX_REQ_OSPI1
592 * @arg @ref LL_DMAMUX_REQ_OSPI2
593 * @arg @ref LL_DMAMUX_REQ_TIM1_CH1
594 * @arg @ref LL_DMAMUX_REQ_TIM1_CH2
595 * @arg @ref LL_DMAMUX_REQ_TIM1_CH3
596 * @arg @ref LL_DMAMUX_REQ_TIM1_CH4
597 * @arg @ref LL_DMAMUX_REQ_TIM1_UP
598 * @arg @ref LL_DMAMUX_REQ_TIM1_TRIG
599 * @arg @ref LL_DMAMUX_REQ_TIM1_COM
600 * @arg @ref LL_DMAMUX_REQ_TIM8_CH1
601 * @arg @ref LL_DMAMUX_REQ_TIM8_CH2
602 * @arg @ref LL_DMAMUX_REQ_TIM8_CH3
603 * @arg @ref LL_DMAMUX_REQ_TIM8_CH4
604 * @arg @ref LL_DMAMUX_REQ_TIM8_UP
605 * @arg @ref LL_DMAMUX_REQ_TIM8_TRIG
606 * @arg @ref LL_DMAMUX_REQ_TIM8_COM
607 * @arg @ref LL_DMAMUX_REQ_TIM2_CH1
608 * @arg @ref LL_DMAMUX_REQ_TIM2_CH2
609 * @arg @ref LL_DMAMUX_REQ_TIM2_CH3
610 * @arg @ref LL_DMAMUX_REQ_TIM2_CH4
611 * @arg @ref LL_DMAMUX_REQ_TIM2_UP
612 * @arg @ref LL_DMAMUX_REQ_TIM3_CH1
613 * @arg @ref LL_DMAMUX_REQ_TIM3_CH2
614 * @arg @ref LL_DMAMUX_REQ_TIM3_CH3
615 * @arg @ref LL_DMAMUX_REQ_TIM3_CH4
616 * @arg @ref LL_DMAMUX_REQ_TIM3_UP
617 * @arg @ref LL_DMAMUX_REQ_TIM3_TRIG
618 * @arg @ref LL_DMAMUX_REQ_TIM4_CH1
619 * @arg @ref LL_DMAMUX_REQ_TIM4_CH2
620 * @arg @ref LL_DMAMUX_REQ_TIM4_CH3
621 * @arg @ref LL_DMAMUX_REQ_TIM4_CH4
622 * @arg @ref LL_DMAMUX_REQ_TIM4_UP
623 * @arg @ref LL_DMAMUX_REQ_TIM5_CH1
624 * @arg @ref LL_DMAMUX_REQ_TIM5_CH2
625 * @arg @ref LL_DMAMUX_REQ_TIM5_CH3
626 * @arg @ref LL_DMAMUX_REQ_TIM5_CH4
627 * @arg @ref LL_DMAMUX_REQ_TIM5_UP
628 * @arg @ref LL_DMAMUX_REQ_TIM5_TRIG
629 * @arg @ref LL_DMAMUX_REQ_TIM15_CH1
630 * @arg @ref LL_DMAMUX_REQ_TIM15_UP
631 * @arg @ref LL_DMAMUX_REQ_TIM15_TRIG
632 * @arg @ref LL_DMAMUX_REQ_TIM15_COM
633 * @arg @ref LL_DMAMUX_REQ_TIM16_CH1
634 * @arg @ref LL_DMAMUX_REQ_TIM16_UP
635 * @arg @ref LL_DMAMUX_REQ_TIM17_CH1
636 * @arg @ref LL_DMAMUX_REQ_TIM17_UP
637 * @arg @ref LL_DMAMUX_REQ_DFSDM1_FLT0
638 * @arg @ref LL_DMAMUX_REQ_DFSDM1_FLT1
639 * @arg @ref LL_DMAMUX_REQ_DFSDM1_FLT2
640 * @arg @ref LL_DMAMUX_REQ_DFSDM1_FLT3
641 * @arg @ref LL_DMAMUX_REQ_DCMI
642 * @arg @ref LL_DMAMUX_REQ_AES_IN
643 * @arg @ref LL_DMAMUX_REQ_AES_OUT
644 * @arg @ref LL_DMAMUX_REQ_HASH_IN
645 * @retval None
646 */
LL_DMAMUX_SetRequestID(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t Channel,uint32_t Request)647 __STATIC_INLINE void LL_DMAMUX_SetRequestID(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel, uint32_t Request)
648 {
649 (void)(DMAMUXx);
650 MODIFY_REG((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_DMAREQ_ID, Request);
651 }
652
653 /**
654 * @brief Get DMAMUX request ID for DMAMUX Channel x.
655 * @note DMAMUX channel 0 to 6 are mapped to DMA1 channel 1 to 7.
656 * DMAMUX channel 7 to 13 are mapped to DMA2 channel 1 to 7.
657 * @rmtoll CxCR DMAREQ_ID LL_DMAMUX_GetRequestID
658 * @param DMAMUXx DMAMUXx Instance
659 * @param Channel This parameter can be one of the following values:
660 * @arg @ref LL_DMAMUX_CHANNEL_0
661 * @arg @ref LL_DMAMUX_CHANNEL_1
662 * @arg @ref LL_DMAMUX_CHANNEL_2
663 * @arg @ref LL_DMAMUX_CHANNEL_3
664 * @arg @ref LL_DMAMUX_CHANNEL_4
665 * @arg @ref LL_DMAMUX_CHANNEL_5
666 * @arg @ref LL_DMAMUX_CHANNEL_6
667 * @arg @ref LL_DMAMUX_CHANNEL_7
668 * @arg @ref LL_DMAMUX_CHANNEL_8
669 * @arg @ref LL_DMAMUX_CHANNEL_9
670 * @arg @ref LL_DMAMUX_CHANNEL_10
671 * @arg @ref LL_DMAMUX_CHANNEL_11
672 * @arg @ref LL_DMAMUX_CHANNEL_12
673 * @arg @ref LL_DMAMUX_CHANNEL_13
674 * @retval Returned value can be one of the following values:
675 * @arg @ref LL_DMAMUX_REQ_MEM2MEM
676 * @arg @ref LL_DMAMUX_REQ_GENERATOR0
677 * @arg @ref LL_DMAMUX_REQ_GENERATOR1
678 * @arg @ref LL_DMAMUX_REQ_GENERATOR2
679 * @arg @ref LL_DMAMUX_REQ_GENERATOR3
680 * @arg @ref LL_DMAMUX_REQ_ADC1
681 * @arg @ref LL_DMAMUX_REQ_DAC1_CH1
682 * @arg @ref LL_DMAMUX_REQ_DAC1_CH2
683 * @arg @ref LL_DMAMUX_REQ_TIM6_UP
684 * @arg @ref LL_DMAMUX_REQ_TIM7_UP
685 * @arg @ref LL_DMAMUX_REQ_SPI1_RX
686 * @arg @ref LL_DMAMUX_REQ_SPI1_TX
687 * @arg @ref LL_DMAMUX_REQ_SPI2_RX
688 * @arg @ref LL_DMAMUX_REQ_SPI2_TX
689 * @arg @ref LL_DMAMUX_REQ_SPI3_RX
690 * @arg @ref LL_DMAMUX_REQ_SPI3_TX
691 * @arg @ref LL_DMAMUX_REQ_I2C1_RX
692 * @arg @ref LL_DMAMUX_REQ_I2C1_TX
693 * @arg @ref LL_DMAMUX_REQ_I2C2_RX
694 * @arg @ref LL_DMAMUX_REQ_I2C2_TX
695 * @arg @ref LL_DMAMUX_REQ_I2C3_RX
696 * @arg @ref LL_DMAMUX_REQ_I2C3_TX
697 * @arg @ref LL_DMAMUX_REQ_I2C4_RX
698 * @arg @ref LL_DMAMUX_REQ_I2C4_TX
699 * @arg @ref LL_DMAMUX_REQ_USART1_RX
700 * @arg @ref LL_DMAMUX_REQ_USART1_TX
701 * @arg @ref LL_DMAMUX_REQ_USART2_RX
702 * @arg @ref LL_DMAMUX_REQ_USART2_TX
703 * @arg @ref LL_DMAMUX_REQ_USART3_RX
704 * @arg @ref LL_DMAMUX_REQ_USART3_TX
705 * @arg @ref LL_DMAMUX_REQ_UART4_RX
706 * @arg @ref LL_DMAMUX_REQ_UART4_TX
707 * @arg @ref LL_DMAMUX_REQ_UART5_RX
708 * @arg @ref LL_DMAMUX_REQ_UART5_TX
709 * @arg @ref LL_DMAMUX_REQ_LPUART1_RX
710 * @arg @ref LL_DMAMUX_REQ_LPUART1_TX
711 * @arg @ref LL_DMAMUX_REQ_SAI1_A
712 * @arg @ref LL_DMAMUX_REQ_SAI1_B
713 * @arg @ref LL_DMAMUX_REQ_SAI2_A
714 * @arg @ref LL_DMAMUX_REQ_SAI2_B
715 * @arg @ref LL_DMAMUX_REQ_OSPI1
716 * @arg @ref LL_DMAMUX_REQ_OSPI2
717 * @arg @ref LL_DMAMUX_REQ_TIM1_CH1
718 * @arg @ref LL_DMAMUX_REQ_TIM1_CH2
719 * @arg @ref LL_DMAMUX_REQ_TIM1_CH3
720 * @arg @ref LL_DMAMUX_REQ_TIM1_CH4
721 * @arg @ref LL_DMAMUX_REQ_TIM1_UP
722 * @arg @ref LL_DMAMUX_REQ_TIM1_TRIG
723 * @arg @ref LL_DMAMUX_REQ_TIM1_COM
724 * @arg @ref LL_DMAMUX_REQ_TIM8_CH1
725 * @arg @ref LL_DMAMUX_REQ_TIM8_CH2
726 * @arg @ref LL_DMAMUX_REQ_TIM8_CH3
727 * @arg @ref LL_DMAMUX_REQ_TIM8_CH4
728 * @arg @ref LL_DMAMUX_REQ_TIM8_UP
729 * @arg @ref LL_DMAMUX_REQ_TIM8_TRIG
730 * @arg @ref LL_DMAMUX_REQ_TIM8_COM
731 * @arg @ref LL_DMAMUX_REQ_TIM2_CH1
732 * @arg @ref LL_DMAMUX_REQ_TIM2_CH2
733 * @arg @ref LL_DMAMUX_REQ_TIM2_CH3
734 * @arg @ref LL_DMAMUX_REQ_TIM2_CH4
735 * @arg @ref LL_DMAMUX_REQ_TIM2_UP
736 * @arg @ref LL_DMAMUX_REQ_TIM3_CH1
737 * @arg @ref LL_DMAMUX_REQ_TIM3_CH2
738 * @arg @ref LL_DMAMUX_REQ_TIM3_CH3
739 * @arg @ref LL_DMAMUX_REQ_TIM3_CH4
740 * @arg @ref LL_DMAMUX_REQ_TIM3_UP
741 * @arg @ref LL_DMAMUX_REQ_TIM3_TRIG
742 * @arg @ref LL_DMAMUX_REQ_TIM4_CH1
743 * @arg @ref LL_DMAMUX_REQ_TIM4_CH2
744 * @arg @ref LL_DMAMUX_REQ_TIM4_CH3
745 * @arg @ref LL_DMAMUX_REQ_TIM4_CH4
746 * @arg @ref LL_DMAMUX_REQ_TIM4_UP
747 * @arg @ref LL_DMAMUX_REQ_TIM5_CH1
748 * @arg @ref LL_DMAMUX_REQ_TIM5_CH2
749 * @arg @ref LL_DMAMUX_REQ_TIM5_CH3
750 * @arg @ref LL_DMAMUX_REQ_TIM5_CH4
751 * @arg @ref LL_DMAMUX_REQ_TIM5_UP
752 * @arg @ref LL_DMAMUX_REQ_TIM5_TRIG
753 * @arg @ref LL_DMAMUX_REQ_TIM15_CH1
754 * @arg @ref LL_DMAMUX_REQ_TIM15_UP
755 * @arg @ref LL_DMAMUX_REQ_TIM15_TRIG
756 * @arg @ref LL_DMAMUX_REQ_TIM15_COM
757 * @arg @ref LL_DMAMUX_REQ_TIM16_CH1
758 * @arg @ref LL_DMAMUX_REQ_TIM16_UP
759 * @arg @ref LL_DMAMUX_REQ_TIM17_CH1
760 * @arg @ref LL_DMAMUX_REQ_TIM17_UP
761 * @arg @ref LL_DMAMUX_REQ_DFSDM1_FLT0
762 * @arg @ref LL_DMAMUX_REQ_DFSDM1_FLT1
763 * @arg @ref LL_DMAMUX_REQ_DFSDM1_FLT2
764 * @arg @ref LL_DMAMUX_REQ_DFSDM1_FLT3
765 * @arg @ref LL_DMAMUX_REQ_DCMI
766 * @arg @ref LL_DMAMUX_REQ_AES_IN
767 * @arg @ref LL_DMAMUX_REQ_AES_OUT
768 * @arg @ref LL_DMAMUX_REQ_HASH_IN
769 */
LL_DMAMUX_GetRequestID(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t Channel)770 __STATIC_INLINE uint32_t LL_DMAMUX_GetRequestID(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
771 {
772 (void)(DMAMUXx);
773 return (uint32_t)(READ_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_DMAREQ_ID));
774 }
775
776 /**
777 * @brief Set the number of DMA request that will be autorized after a synchronization event and/or the number of DMA request needed to generate an event.
778 * @rmtoll CxCR NBREQ LL_DMAMUX_SetSyncRequestNb
779 * @param DMAMUXx DMAMUXx Instance
780 * @param Channel This parameter can be one of the following values:
781 * @arg @ref LL_DMAMUX_CHANNEL_0
782 * @arg @ref LL_DMAMUX_CHANNEL_1
783 * @arg @ref LL_DMAMUX_CHANNEL_2
784 * @arg @ref LL_DMAMUX_CHANNEL_3
785 * @arg @ref LL_DMAMUX_CHANNEL_4
786 * @arg @ref LL_DMAMUX_CHANNEL_5
787 * @arg @ref LL_DMAMUX_CHANNEL_6
788 * @arg @ref LL_DMAMUX_CHANNEL_7
789 * @arg @ref LL_DMAMUX_CHANNEL_8
790 * @arg @ref LL_DMAMUX_CHANNEL_9
791 * @arg @ref LL_DMAMUX_CHANNEL_10
792 * @arg @ref LL_DMAMUX_CHANNEL_11
793 * @arg @ref LL_DMAMUX_CHANNEL_12
794 * @arg @ref LL_DMAMUX_CHANNEL_13
795 * @param RequestNb This parameter must be a value between Min_Data = 1 and Max_Data = 32.
796 * @retval None
797 */
LL_DMAMUX_SetSyncRequestNb(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t Channel,uint32_t RequestNb)798 __STATIC_INLINE void LL_DMAMUX_SetSyncRequestNb(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel, uint32_t RequestNb)
799 {
800 (void)(DMAMUXx);
801 MODIFY_REG((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_NBREQ, ((RequestNb - 1U) << DMAMUX_CxCR_NBREQ_Pos));
802 }
803
804 /**
805 * @brief Get the number of DMA request that will be autorized after a synchronization event and/or the number of DMA request needed to generate an event.
806 * @rmtoll CxCR NBREQ LL_DMAMUX_GetSyncRequestNb
807 * @param DMAMUXx DMAMUXx Instance
808 * @param Channel This parameter can be one of the following values:
809 * @arg @ref LL_DMAMUX_CHANNEL_0
810 * @arg @ref LL_DMAMUX_CHANNEL_1
811 * @arg @ref LL_DMAMUX_CHANNEL_2
812 * @arg @ref LL_DMAMUX_CHANNEL_3
813 * @arg @ref LL_DMAMUX_CHANNEL_4
814 * @arg @ref LL_DMAMUX_CHANNEL_5
815 * @arg @ref LL_DMAMUX_CHANNEL_6
816 * @arg @ref LL_DMAMUX_CHANNEL_7
817 * @arg @ref LL_DMAMUX_CHANNEL_8
818 * @arg @ref LL_DMAMUX_CHANNEL_9
819 * @arg @ref LL_DMAMUX_CHANNEL_10
820 * @arg @ref LL_DMAMUX_CHANNEL_11
821 * @arg @ref LL_DMAMUX_CHANNEL_12
822 * @arg @ref LL_DMAMUX_CHANNEL_13
823 * @retval Between Min_Data = 1 and Max_Data = 32
824 */
LL_DMAMUX_GetSyncRequestNb(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t Channel)825 __STATIC_INLINE uint32_t LL_DMAMUX_GetSyncRequestNb(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
826 {
827 (void)(DMAMUXx);
828 return (uint32_t)(((READ_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_NBREQ)) >> DMAMUX_CxCR_NBREQ_Pos) + 1U);
829 }
830
831 /**
832 * @brief Set the polarity of the signal on which the DMA request is synchronized.
833 * @rmtoll CxCR SPOL LL_DMAMUX_SetSyncPolarity
834 * @param DMAMUXx DMAMUXx Instance
835 * @param Channel This parameter can be one of the following values:
836 * @arg @ref LL_DMAMUX_CHANNEL_0
837 * @arg @ref LL_DMAMUX_CHANNEL_1
838 * @arg @ref LL_DMAMUX_CHANNEL_2
839 * @arg @ref LL_DMAMUX_CHANNEL_3
840 * @arg @ref LL_DMAMUX_CHANNEL_4
841 * @arg @ref LL_DMAMUX_CHANNEL_5
842 * @arg @ref LL_DMAMUX_CHANNEL_6
843 * @arg @ref LL_DMAMUX_CHANNEL_7
844 * @arg @ref LL_DMAMUX_CHANNEL_8
845 * @arg @ref LL_DMAMUX_CHANNEL_9
846 * @arg @ref LL_DMAMUX_CHANNEL_10
847 * @arg @ref LL_DMAMUX_CHANNEL_11
848 * @arg @ref LL_DMAMUX_CHANNEL_12
849 * @arg @ref LL_DMAMUX_CHANNEL_13
850 * @param Polarity This parameter can be one of the following values:
851 * @arg @ref LL_DMAMUX_SYNC_NO_EVENT
852 * @arg @ref LL_DMAMUX_SYNC_POL_RISING
853 * @arg @ref LL_DMAMUX_SYNC_POL_FALLING
854 * @arg @ref LL_DMAMUX_SYNC_POL_RISING_FALLING
855 * @retval None
856 */
LL_DMAMUX_SetSyncPolarity(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t Channel,uint32_t Polarity)857 __STATIC_INLINE void LL_DMAMUX_SetSyncPolarity(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel, uint32_t Polarity)
858 {
859 (void)(DMAMUXx);
860 MODIFY_REG((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SPOL, Polarity);
861 }
862
863 /**
864 * @brief Get the polarity of the signal on which the DMA request is synchronized.
865 * @rmtoll CxCR SPOL LL_DMAMUX_GetSyncPolarity
866 * @param DMAMUXx DMAMUXx Instance
867 * @param Channel This parameter can be one of the following values:
868 * @arg @ref LL_DMAMUX_CHANNEL_0
869 * @arg @ref LL_DMAMUX_CHANNEL_1
870 * @arg @ref LL_DMAMUX_CHANNEL_2
871 * @arg @ref LL_DMAMUX_CHANNEL_3
872 * @arg @ref LL_DMAMUX_CHANNEL_4
873 * @arg @ref LL_DMAMUX_CHANNEL_5
874 * @arg @ref LL_DMAMUX_CHANNEL_6
875 * @arg @ref LL_DMAMUX_CHANNEL_7
876 * @arg @ref LL_DMAMUX_CHANNEL_8
877 * @arg @ref LL_DMAMUX_CHANNEL_9
878 * @arg @ref LL_DMAMUX_CHANNEL_10
879 * @arg @ref LL_DMAMUX_CHANNEL_11
880 * @arg @ref LL_DMAMUX_CHANNEL_12
881 * @arg @ref LL_DMAMUX_CHANNEL_13
882 * @retval Returned value can be one of the following values:
883 * @arg @ref LL_DMAMUX_SYNC_NO_EVENT
884 * @arg @ref LL_DMAMUX_SYNC_POL_RISING
885 * @arg @ref LL_DMAMUX_SYNC_POL_FALLING
886 * @arg @ref LL_DMAMUX_SYNC_POL_RISING_FALLING
887 */
LL_DMAMUX_GetSyncPolarity(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t Channel)888 __STATIC_INLINE uint32_t LL_DMAMUX_GetSyncPolarity(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
889 {
890 (void)(DMAMUXx);
891 return (uint32_t)(READ_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SPOL));
892 }
893
894 /**
895 * @brief Enable the Event Generation on DMAMUX channel x.
896 * @rmtoll CxCR EGE LL_DMAMUX_EnableEventGeneration
897 * @param DMAMUXx DMAMUXx Instance
898 * @param Channel This parameter can be one of the following values:
899 * @arg @ref LL_DMAMUX_CHANNEL_0
900 * @arg @ref LL_DMAMUX_CHANNEL_1
901 * @arg @ref LL_DMAMUX_CHANNEL_2
902 * @arg @ref LL_DMAMUX_CHANNEL_3
903 * @arg @ref LL_DMAMUX_CHANNEL_4
904 * @arg @ref LL_DMAMUX_CHANNEL_5
905 * @arg @ref LL_DMAMUX_CHANNEL_6
906 * @arg @ref LL_DMAMUX_CHANNEL_7
907 * @arg @ref LL_DMAMUX_CHANNEL_8
908 * @arg @ref LL_DMAMUX_CHANNEL_9
909 * @arg @ref LL_DMAMUX_CHANNEL_10
910 * @arg @ref LL_DMAMUX_CHANNEL_11
911 * @arg @ref LL_DMAMUX_CHANNEL_12
912 * @arg @ref LL_DMAMUX_CHANNEL_13
913 * @retval None
914 */
LL_DMAMUX_EnableEventGeneration(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t Channel)915 __STATIC_INLINE void LL_DMAMUX_EnableEventGeneration(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
916 {
917 (void)(DMAMUXx);
918 SET_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_EGE);
919 }
920
921 /**
922 * @brief Disable the Event Generation on DMAMUX channel x.
923 * @rmtoll CxCR EGE LL_DMAMUX_DisableEventGeneration
924 * @param DMAMUXx DMAMUXx Instance
925 * @param Channel This parameter can be one of the following values:
926 * @arg @ref LL_DMAMUX_CHANNEL_0
927 * @arg @ref LL_DMAMUX_CHANNEL_1
928 * @arg @ref LL_DMAMUX_CHANNEL_2
929 * @arg @ref LL_DMAMUX_CHANNEL_3
930 * @arg @ref LL_DMAMUX_CHANNEL_4
931 * @arg @ref LL_DMAMUX_CHANNEL_5
932 * @arg @ref LL_DMAMUX_CHANNEL_6
933 * @arg @ref LL_DMAMUX_CHANNEL_7
934 * @arg @ref LL_DMAMUX_CHANNEL_8
935 * @arg @ref LL_DMAMUX_CHANNEL_9
936 * @arg @ref LL_DMAMUX_CHANNEL_10
937 * @arg @ref LL_DMAMUX_CHANNEL_11
938 * @arg @ref LL_DMAMUX_CHANNEL_12
939 * @arg @ref LL_DMAMUX_CHANNEL_13
940 * @retval None
941 */
LL_DMAMUX_DisableEventGeneration(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t Channel)942 __STATIC_INLINE void LL_DMAMUX_DisableEventGeneration(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
943 {
944 (void)(DMAMUXx);
945 CLEAR_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_EGE);
946 }
947
948 /**
949 * @brief Check if the Event Generation on DMAMUX channel x is enabled or disabled.
950 * @rmtoll CxCR EGE LL_DMAMUX_IsEnabledEventGeneration
951 * @param DMAMUXx DMAMUXx Instance
952 * @param Channel This parameter can be one of the following values:
953 * @arg @ref LL_DMAMUX_CHANNEL_0
954 * @arg @ref LL_DMAMUX_CHANNEL_1
955 * @arg @ref LL_DMAMUX_CHANNEL_2
956 * @arg @ref LL_DMAMUX_CHANNEL_3
957 * @arg @ref LL_DMAMUX_CHANNEL_4
958 * @arg @ref LL_DMAMUX_CHANNEL_5
959 * @arg @ref LL_DMAMUX_CHANNEL_6
960 * @arg @ref LL_DMAMUX_CHANNEL_7
961 * @arg @ref LL_DMAMUX_CHANNEL_8
962 * @arg @ref LL_DMAMUX_CHANNEL_9
963 * @arg @ref LL_DMAMUX_CHANNEL_10
964 * @arg @ref LL_DMAMUX_CHANNEL_11
965 * @arg @ref LL_DMAMUX_CHANNEL_12
966 * @arg @ref LL_DMAMUX_CHANNEL_13
967 * @retval State of bit (1 or 0).
968 */
LL_DMAMUX_IsEnabledEventGeneration(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t Channel)969 __STATIC_INLINE uint32_t LL_DMAMUX_IsEnabledEventGeneration(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
970 {
971 (void)(DMAMUXx);
972 return ((READ_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_EGE) == (DMAMUX_CxCR_EGE))? 1UL : 0UL);
973 }
974
975 /**
976 * @brief Enable the synchronization mode.
977 * @rmtoll CxCR SE LL_DMAMUX_EnableSync
978 * @param DMAMUXx DMAMUXx Instance
979 * @param Channel This parameter can be one of the following values:
980 * @arg @ref LL_DMAMUX_CHANNEL_0
981 * @arg @ref LL_DMAMUX_CHANNEL_1
982 * @arg @ref LL_DMAMUX_CHANNEL_2
983 * @arg @ref LL_DMAMUX_CHANNEL_3
984 * @arg @ref LL_DMAMUX_CHANNEL_4
985 * @arg @ref LL_DMAMUX_CHANNEL_5
986 * @arg @ref LL_DMAMUX_CHANNEL_6
987 * @arg @ref LL_DMAMUX_CHANNEL_7
988 * @arg @ref LL_DMAMUX_CHANNEL_8
989 * @arg @ref LL_DMAMUX_CHANNEL_9
990 * @arg @ref LL_DMAMUX_CHANNEL_10
991 * @arg @ref LL_DMAMUX_CHANNEL_11
992 * @arg @ref LL_DMAMUX_CHANNEL_12
993 * @arg @ref LL_DMAMUX_CHANNEL_13
994 * @retval None
995 */
LL_DMAMUX_EnableSync(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t Channel)996 __STATIC_INLINE void LL_DMAMUX_EnableSync(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
997 {
998 (void)(DMAMUXx);
999 SET_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SE);
1000 }
1001
1002 /**
1003 * @brief Disable the synchronization mode.
1004 * @rmtoll CxCR SE LL_DMAMUX_DisableSync
1005 * @param DMAMUXx DMAMUXx Instance
1006 * @param Channel This parameter can be one of the following values:
1007 * @arg @ref LL_DMAMUX_CHANNEL_0
1008 * @arg @ref LL_DMAMUX_CHANNEL_1
1009 * @arg @ref LL_DMAMUX_CHANNEL_2
1010 * @arg @ref LL_DMAMUX_CHANNEL_3
1011 * @arg @ref LL_DMAMUX_CHANNEL_4
1012 * @arg @ref LL_DMAMUX_CHANNEL_5
1013 * @arg @ref LL_DMAMUX_CHANNEL_6
1014 * @arg @ref LL_DMAMUX_CHANNEL_7
1015 * @arg @ref LL_DMAMUX_CHANNEL_8
1016 * @arg @ref LL_DMAMUX_CHANNEL_9
1017 * @arg @ref LL_DMAMUX_CHANNEL_10
1018 * @arg @ref LL_DMAMUX_CHANNEL_11
1019 * @arg @ref LL_DMAMUX_CHANNEL_12
1020 * @arg @ref LL_DMAMUX_CHANNEL_13
1021 * @retval None
1022 */
LL_DMAMUX_DisableSync(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t Channel)1023 __STATIC_INLINE void LL_DMAMUX_DisableSync(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
1024 {
1025 (void)(DMAMUXx);
1026 CLEAR_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SE);
1027 }
1028
1029 /**
1030 * @brief Check if the synchronization mode is enabled or disabled.
1031 * @rmtoll CxCR SE LL_DMAMUX_IsEnabledSync
1032 * @param DMAMUXx DMAMUXx Instance
1033 * @param Channel This parameter can be one of the following values:
1034 * @arg @ref LL_DMAMUX_CHANNEL_0
1035 * @arg @ref LL_DMAMUX_CHANNEL_1
1036 * @arg @ref LL_DMAMUX_CHANNEL_2
1037 * @arg @ref LL_DMAMUX_CHANNEL_3
1038 * @arg @ref LL_DMAMUX_CHANNEL_4
1039 * @arg @ref LL_DMAMUX_CHANNEL_5
1040 * @arg @ref LL_DMAMUX_CHANNEL_6
1041 * @arg @ref LL_DMAMUX_CHANNEL_7
1042 * @arg @ref LL_DMAMUX_CHANNEL_8
1043 * @arg @ref LL_DMAMUX_CHANNEL_9
1044 * @arg @ref LL_DMAMUX_CHANNEL_10
1045 * @arg @ref LL_DMAMUX_CHANNEL_11
1046 * @arg @ref LL_DMAMUX_CHANNEL_12
1047 * @arg @ref LL_DMAMUX_CHANNEL_13
1048 * @retval State of bit (1 or 0).
1049 */
LL_DMAMUX_IsEnabledSync(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t Channel)1050 __STATIC_INLINE uint32_t LL_DMAMUX_IsEnabledSync(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
1051 {
1052 (void)(DMAMUXx);
1053 return ((READ_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SE) == (DMAMUX_CxCR_SE))? 1UL : 0UL);
1054 }
1055
1056 /**
1057 * @brief Set DMAMUX synchronization ID on DMAMUX Channel x.
1058 * @rmtoll CxCR SYNC_ID LL_DMAMUX_SetSyncID
1059 * @param DMAMUXx DMAMUXx Instance
1060 * @param Channel This parameter can be one of the following values:
1061 * @arg @ref LL_DMAMUX_CHANNEL_0
1062 * @arg @ref LL_DMAMUX_CHANNEL_1
1063 * @arg @ref LL_DMAMUX_CHANNEL_2
1064 * @arg @ref LL_DMAMUX_CHANNEL_3
1065 * @arg @ref LL_DMAMUX_CHANNEL_4
1066 * @arg @ref LL_DMAMUX_CHANNEL_5
1067 * @arg @ref LL_DMAMUX_CHANNEL_6
1068 * @arg @ref LL_DMAMUX_CHANNEL_7
1069 * @arg @ref LL_DMAMUX_CHANNEL_8
1070 * @arg @ref LL_DMAMUX_CHANNEL_9
1071 * @arg @ref LL_DMAMUX_CHANNEL_10
1072 * @arg @ref LL_DMAMUX_CHANNEL_11
1073 * @arg @ref LL_DMAMUX_CHANNEL_12
1074 * @arg @ref LL_DMAMUX_CHANNEL_13
1075 * @param SyncID This parameter can be one of the following values:
1076 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE0
1077 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE1
1078 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE2
1079 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE3
1080 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE4
1081 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE5
1082 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE6
1083 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE7
1084 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE8
1085 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE9
1086 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE10
1087 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE11
1088 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE12
1089 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE13
1090 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE14
1091 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE15
1092 * @arg @ref LL_DMAMUX_SYNC_DMAMUX_CH0
1093 * @arg @ref LL_DMAMUX_SYNC_DMAMUX_CH1
1094 * @arg @ref LL_DMAMUX_SYNC_DMAMUX_CH2
1095 * @arg @ref LL_DMAMUX_SYNC_DMAMUX_CH3
1096 * @arg @ref LL_DMAMUX_SYNC_LPTIM1_OUT
1097 * @arg @ref LL_DMAMUX_SYNC_LPTIM2_OUT
1098 * @arg @ref LL_DMAMUX_SYNC_DSI_TE
1099 * @arg @ref LL_DMAMUX_SYNC_DSI_REFRESH_END
1100 * @arg @ref LL_DMAMUX_SYNC_DMA2D_TX_END
1101 * @arg @ref LL_DMAMUX_SYNC_LTDC_LINE_IT
1102 * @retval None
1103 */
LL_DMAMUX_SetSyncID(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t Channel,uint32_t SyncID)1104 __STATIC_INLINE void LL_DMAMUX_SetSyncID(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel, uint32_t SyncID)
1105 {
1106 (void)(DMAMUXx);
1107 MODIFY_REG((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SYNC_ID, SyncID);
1108 }
1109
1110 /**
1111 * @brief Get DMAMUX synchronization ID on DMAMUX Channel x.
1112 * @rmtoll CxCR SYNC_ID LL_DMAMUX_GetSyncID
1113 * @param DMAMUXx DMAMUXx Instance
1114 * @param Channel This parameter can be one of the following values:
1115 * @arg @ref LL_DMAMUX_CHANNEL_0
1116 * @arg @ref LL_DMAMUX_CHANNEL_1
1117 * @arg @ref LL_DMAMUX_CHANNEL_2
1118 * @arg @ref LL_DMAMUX_CHANNEL_3
1119 * @arg @ref LL_DMAMUX_CHANNEL_4
1120 * @arg @ref LL_DMAMUX_CHANNEL_5
1121 * @arg @ref LL_DMAMUX_CHANNEL_6
1122 * @arg @ref LL_DMAMUX_CHANNEL_7
1123 * @arg @ref LL_DMAMUX_CHANNEL_8
1124 * @arg @ref LL_DMAMUX_CHANNEL_9
1125 * @arg @ref LL_DMAMUX_CHANNEL_10
1126 * @arg @ref LL_DMAMUX_CHANNEL_11
1127 * @arg @ref LL_DMAMUX_CHANNEL_12
1128 * @arg @ref LL_DMAMUX_CHANNEL_13
1129 * @retval Returned value can be one of the following values:
1130 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE0
1131 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE1
1132 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE2
1133 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE3
1134 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE4
1135 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE5
1136 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE6
1137 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE7
1138 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE8
1139 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE9
1140 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE10
1141 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE11
1142 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE12
1143 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE13
1144 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE14
1145 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE15
1146 * @arg @ref LL_DMAMUX_SYNC_DMAMUX_CH0
1147 * @arg @ref LL_DMAMUX_SYNC_DMAMUX_CH1
1148 * @arg @ref LL_DMAMUX_SYNC_DMAMUX_CH2
1149 * @arg @ref LL_DMAMUX_SYNC_DMAMUX_CH3
1150 * @arg @ref LL_DMAMUX_SYNC_LPTIM1_OUT
1151 * @arg @ref LL_DMAMUX_SYNC_LPTIM2_OUT
1152 * @arg @ref LL_DMAMUX_SYNC_DSI_TE
1153 * @arg @ref LL_DMAMUX_SYNC_DSI_REFRESH_END
1154 * @arg @ref LL_DMAMUX_SYNC_DMA2D_TX_END
1155 * @arg @ref LL_DMAMUX_SYNC_LTDC_LINE_IT
1156 */
LL_DMAMUX_GetSyncID(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t Channel)1157 __STATIC_INLINE uint32_t LL_DMAMUX_GetSyncID(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
1158 {
1159 (void)(DMAMUXx);
1160 return (uint32_t)(READ_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SYNC_ID));
1161 }
1162
1163 /**
1164 * @brief Enable the Request Generator.
1165 * @rmtoll RGxCR GE LL_DMAMUX_EnableRequestGen
1166 * @param DMAMUXx DMAMUXx Instance
1167 * @param RequestGenChannel This parameter can be one of the following values:
1168 * @arg @ref LL_DMAMUX_REQ_GEN_0
1169 * @arg @ref LL_DMAMUX_REQ_GEN_1
1170 * @arg @ref LL_DMAMUX_REQ_GEN_2
1171 * @arg @ref LL_DMAMUX_REQ_GEN_3
1172 * @retval None
1173 */
LL_DMAMUX_EnableRequestGen(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t RequestGenChannel)1174 __STATIC_INLINE void LL_DMAMUX_EnableRequestGen(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
1175 {
1176 (void)(DMAMUXx);
1177 SET_BIT(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE * (RequestGenChannel)))))->RGCR, DMAMUX_RGxCR_GE);
1178 }
1179
1180 /**
1181 * @brief Disable the Request Generator.
1182 * @rmtoll RGxCR GE LL_DMAMUX_DisableRequestGen
1183 * @param DMAMUXx DMAMUXx Instance
1184 * @param RequestGenChannel This parameter can be one of the following values:
1185 * @arg @ref LL_DMAMUX_REQ_GEN_0
1186 * @arg @ref LL_DMAMUX_REQ_GEN_1
1187 * @arg @ref LL_DMAMUX_REQ_GEN_2
1188 * @arg @ref LL_DMAMUX_REQ_GEN_3
1189 * @retval None
1190 */
LL_DMAMUX_DisableRequestGen(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t RequestGenChannel)1191 __STATIC_INLINE void LL_DMAMUX_DisableRequestGen(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
1192 {
1193 (void)(DMAMUXx);
1194 CLEAR_BIT(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE * (RequestGenChannel)))))->RGCR, DMAMUX_RGxCR_GE);
1195 }
1196
1197 /**
1198 * @brief Check if the Request Generator is enabled or disabled.
1199 * @rmtoll RGxCR GE LL_DMAMUX_IsEnabledRequestGen
1200 * @param DMAMUXx DMAMUXx Instance
1201 * @param RequestGenChannel This parameter can be one of the following values:
1202 * @arg @ref LL_DMAMUX_REQ_GEN_0
1203 * @arg @ref LL_DMAMUX_REQ_GEN_1
1204 * @arg @ref LL_DMAMUX_REQ_GEN_2
1205 * @arg @ref LL_DMAMUX_REQ_GEN_3
1206 * @retval State of bit (1 or 0).
1207 */
LL_DMAMUX_IsEnabledRequestGen(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t RequestGenChannel)1208 __STATIC_INLINE uint32_t LL_DMAMUX_IsEnabledRequestGen(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
1209 {
1210 (void)(DMAMUXx);
1211 return ((READ_BIT(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE * (RequestGenChannel)))))->RGCR, DMAMUX_RGxCR_GE) == (DMAMUX_RGxCR_GE))? 1UL : 0UL);
1212 }
1213
1214 /**
1215 * @brief Set the polarity of the signal on which the DMA request is generated.
1216 * @rmtoll RGxCR GPOL LL_DMAMUX_SetRequestGenPolarity
1217 * @param DMAMUXx DMAMUXx Instance
1218 * @param RequestGenChannel This parameter can be one of the following values:
1219 * @arg @ref LL_DMAMUX_REQ_GEN_0
1220 * @arg @ref LL_DMAMUX_REQ_GEN_1
1221 * @arg @ref LL_DMAMUX_REQ_GEN_2
1222 * @arg @ref LL_DMAMUX_REQ_GEN_3
1223 * @param Polarity This parameter can be one of the following values:
1224 * @arg @ref LL_DMAMUX_REQ_GEN_NO_EVENT
1225 * @arg @ref LL_DMAMUX_REQ_GEN_POL_RISING
1226 * @arg @ref LL_DMAMUX_REQ_GEN_POL_FALLING
1227 * @arg @ref LL_DMAMUX_REQ_GEN_POL_RISING_FALLING
1228 * @retval None
1229 */
LL_DMAMUX_SetRequestGenPolarity(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t RequestGenChannel,uint32_t Polarity)1230 __STATIC_INLINE void LL_DMAMUX_SetRequestGenPolarity(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel, uint32_t Polarity)
1231 {
1232 (void)(DMAMUXx);
1233 MODIFY_REG(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE * (RequestGenChannel)))))->RGCR, DMAMUX_RGxCR_GPOL, Polarity);
1234 }
1235
1236 /**
1237 * @brief Get the polarity of the signal on which the DMA request is generated.
1238 * @rmtoll RGxCR GPOL LL_DMAMUX_GetRequestGenPolarity
1239 * @param DMAMUXx DMAMUXx Instance
1240 * @param RequestGenChannel This parameter can be one of the following values:
1241 * @arg @ref LL_DMAMUX_REQ_GEN_0
1242 * @arg @ref LL_DMAMUX_REQ_GEN_1
1243 * @arg @ref LL_DMAMUX_REQ_GEN_2
1244 * @arg @ref LL_DMAMUX_REQ_GEN_3
1245 * @retval Returned value can be one of the following values:
1246 * @arg @ref LL_DMAMUX_REQ_GEN_NO_EVENT
1247 * @arg @ref LL_DMAMUX_REQ_GEN_POL_RISING
1248 * @arg @ref LL_DMAMUX_REQ_GEN_POL_FALLING
1249 * @arg @ref LL_DMAMUX_REQ_GEN_POL_RISING_FALLING
1250 */
LL_DMAMUX_GetRequestGenPolarity(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t RequestGenChannel)1251 __STATIC_INLINE uint32_t LL_DMAMUX_GetRequestGenPolarity(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
1252 {
1253 (void)(DMAMUXx);
1254 return (uint32_t)(READ_BIT(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE * (RequestGenChannel)))))->RGCR, DMAMUX_RGxCR_GPOL));
1255 }
1256
1257 /**
1258 * @brief Set the number of DMA request that will be autorized after a generation event.
1259 * @note This field can only be written when Generator is disabled.
1260 * @rmtoll RGxCR GNBREQ LL_DMAMUX_SetGenRequestNb
1261 * @param DMAMUXx DMAMUXx Instance
1262 * @param RequestGenChannel This parameter can be one of the following values:
1263 * @arg @ref LL_DMAMUX_REQ_GEN_0
1264 * @arg @ref LL_DMAMUX_REQ_GEN_1
1265 * @arg @ref LL_DMAMUX_REQ_GEN_2
1266 * @arg @ref LL_DMAMUX_REQ_GEN_3
1267 * @param RequestNb This parameter must be a value between Min_Data = 1 and Max_Data = 32.
1268 * @retval None
1269 */
LL_DMAMUX_SetGenRequestNb(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t RequestGenChannel,uint32_t RequestNb)1270 __STATIC_INLINE void LL_DMAMUX_SetGenRequestNb(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel, uint32_t RequestNb)
1271 {
1272 (void)(DMAMUXx);
1273 MODIFY_REG(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE * (RequestGenChannel)))))->RGCR, DMAMUX_RGxCR_GNBREQ, (RequestNb - 1U) << DMAMUX_RGxCR_GNBREQ_Pos);
1274 }
1275
1276 /**
1277 * @brief Get the number of DMA request that will be autorized after a generation event.
1278 * @rmtoll RGxCR GNBREQ LL_DMAMUX_GetGenRequestNb
1279 * @param DMAMUXx DMAMUXx Instance
1280 * @param RequestGenChannel This parameter can be one of the following values:
1281 * @arg @ref LL_DMAMUX_REQ_GEN_0
1282 * @arg @ref LL_DMAMUX_REQ_GEN_1
1283 * @arg @ref LL_DMAMUX_REQ_GEN_2
1284 * @arg @ref LL_DMAMUX_REQ_GEN_3
1285 * @retval Between Min_Data = 1 and Max_Data = 32
1286 */
LL_DMAMUX_GetGenRequestNb(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t RequestGenChannel)1287 __STATIC_INLINE uint32_t LL_DMAMUX_GetGenRequestNb(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
1288 {
1289 (void)(DMAMUXx);
1290 return (uint32_t)((READ_BIT(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE * (RequestGenChannel)))))->RGCR, DMAMUX_RGxCR_GNBREQ) >> DMAMUX_RGxCR_GNBREQ_Pos) + 1U);
1291 }
1292
1293 /**
1294 * @brief Set DMAMUX external Request Signal ID on DMAMUX Request Generation Trigger Event Channel x.
1295 * @rmtoll RGxCR SIG_ID LL_DMAMUX_SetRequestSignalID
1296 * @param DMAMUXx DMAMUXx Instance
1297 * @param RequestGenChannel This parameter can be one of the following values:
1298 * @arg @ref LL_DMAMUX_REQ_GEN_0
1299 * @arg @ref LL_DMAMUX_REQ_GEN_1
1300 * @arg @ref LL_DMAMUX_REQ_GEN_2
1301 * @arg @ref LL_DMAMUX_REQ_GEN_3
1302 * @param RequestSignalID This parameter can be one of the following values:
1303 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE0
1304 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE1
1305 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE2
1306 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE3
1307 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE4
1308 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE5
1309 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE6
1310 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE7
1311 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE8
1312 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE9
1313 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE10
1314 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE11
1315 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE12
1316 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE13
1317 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE14
1318 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE15
1319 * @arg @ref LL_DMAMUX_REQ_GEN_DMAMUX_CH0
1320 * @arg @ref LL_DMAMUX_REQ_GEN_DMAMUX_CH1
1321 * @arg @ref LL_DMAMUX_REQ_GEN_DMAMUX_CH2
1322 * @arg @ref LL_DMAMUX_REQ_GEN_DMAMUX_CH3
1323 * @arg @ref LL_DMAMUX_REQ_GEN_LPTIM1_OUT
1324 * @arg @ref LL_DMAMUX_REQ_GEN_LPTIM2_OUT
1325 * @arg @ref LL_DMAMUX_REQ_GEN_DSI_TE
1326 * @arg @ref LL_DMAMUX_REQ_GEN_DSI_REFRESH_END
1327 * @arg @ref LL_DMAMUX_REQ_GEN_DMA2D_TX_END
1328 * @arg @ref LL_DMAMUX_REQ_GEN_LTDC_LINE_IT
1329 * @retval None
1330 */
LL_DMAMUX_SetRequestSignalID(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t RequestGenChannel,uint32_t RequestSignalID)1331 __STATIC_INLINE void LL_DMAMUX_SetRequestSignalID(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel, uint32_t RequestSignalID)
1332 {
1333 (void)(DMAMUXx);
1334 MODIFY_REG(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE * (RequestGenChannel)))))->RGCR, DMAMUX_RGxCR_SIG_ID, RequestSignalID);
1335 }
1336
1337 /**
1338 * @brief Get DMAMUX external Request Signal ID set on DMAMUX Channel x.
1339 * @rmtoll RGxCR SIG_ID LL_DMAMUX_GetRequestSignalID
1340 * @param DMAMUXx DMAMUXx Instance
1341 * @param RequestGenChannel This parameter can be one of the following values:
1342 * @arg @ref LL_DMAMUX_REQ_GEN_0
1343 * @arg @ref LL_DMAMUX_REQ_GEN_1
1344 * @arg @ref LL_DMAMUX_REQ_GEN_2
1345 * @arg @ref LL_DMAMUX_REQ_GEN_3
1346 * @retval Returned value can be one of the following values:
1347 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE0
1348 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE1
1349 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE2
1350 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE3
1351 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE4
1352 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE5
1353 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE6
1354 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE7
1355 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE8
1356 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE9
1357 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE10
1358 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE11
1359 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE12
1360 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE13
1361 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE14
1362 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE15
1363 * @arg @ref LL_DMAMUX_REQ_GEN_DMAMUX_CH0
1364 * @arg @ref LL_DMAMUX_REQ_GEN_DMAMUX_CH1
1365 * @arg @ref LL_DMAMUX_REQ_GEN_DMAMUX_CH2
1366 * @arg @ref LL_DMAMUX_REQ_GEN_DMAMUX_CH3
1367 * @arg @ref LL_DMAMUX_REQ_GEN_LPTIM1_OUT
1368 * @arg @ref LL_DMAMUX_REQ_GEN_LPTIM2_OUT
1369 * @arg @ref LL_DMAMUX_REQ_GEN_DSI_TE
1370 * @arg @ref LL_DMAMUX_REQ_GEN_DSI_REFRESH_END
1371 * @arg @ref LL_DMAMUX_REQ_GEN_DMA2D_TX_END
1372 * @arg @ref LL_DMAMUX_REQ_GEN_LTDC_LINE_IT
1373 */
LL_DMAMUX_GetRequestSignalID(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t RequestGenChannel)1374 __STATIC_INLINE uint32_t LL_DMAMUX_GetRequestSignalID(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
1375 {
1376 (void)(DMAMUXx);
1377 return (uint32_t)(READ_BIT(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE * (RequestGenChannel)))))->RGCR, DMAMUX_RGxCR_SIG_ID));
1378 }
1379
1380 /**
1381 * @}
1382 */
1383
1384 /** @defgroup DMAMUX_LL_EF_FLAG_Management FLAG_Management
1385 * @{
1386 */
1387
1388 /**
1389 * @brief Get Synchronization Event Overrun Flag Channel 0.
1390 * @rmtoll CSR SOF0 LL_DMAMUX_IsActiveFlag_SO0
1391 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1392 * @retval State of bit (1 or 0).
1393 */
LL_DMAMUX_IsActiveFlag_SO0(DMAMUX_Channel_TypeDef * DMAMUXx)1394 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO0(DMAMUX_Channel_TypeDef *DMAMUXx)
1395 {
1396 (void)(DMAMUXx);
1397 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF0) == (DMAMUX_CSR_SOF0)) ? 1UL : 0UL);
1398 }
1399
1400 /**
1401 * @brief Get Synchronization Event Overrun Flag Channel 1.
1402 * @rmtoll CSR SOF1 LL_DMAMUX_IsActiveFlag_SO1
1403 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1404 * @retval State of bit (1 or 0).
1405 */
LL_DMAMUX_IsActiveFlag_SO1(DMAMUX_Channel_TypeDef * DMAMUXx)1406 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO1(DMAMUX_Channel_TypeDef *DMAMUXx)
1407 {
1408 (void)(DMAMUXx);
1409 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF1) == (DMAMUX_CSR_SOF1)) ? 1UL : 0UL);
1410 }
1411
1412 /**
1413 * @brief Get Synchronization Event Overrun Flag Channel 2.
1414 * @rmtoll CSR SOF2 LL_DMAMUX_IsActiveFlag_SO2
1415 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1416 * @retval State of bit (1 or 0).
1417 */
LL_DMAMUX_IsActiveFlag_SO2(DMAMUX_Channel_TypeDef * DMAMUXx)1418 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO2(DMAMUX_Channel_TypeDef *DMAMUXx)
1419 {
1420 (void)(DMAMUXx);
1421 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF2) == (DMAMUX_CSR_SOF2)) ? 1UL : 0UL);
1422 }
1423
1424 /**
1425 * @brief Get Synchronization Event Overrun Flag Channel 3.
1426 * @rmtoll CSR SOF3 LL_DMAMUX_IsActiveFlag_SO3
1427 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1428 * @retval State of bit (1 or 0).
1429 */
LL_DMAMUX_IsActiveFlag_SO3(DMAMUX_Channel_TypeDef * DMAMUXx)1430 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO3(DMAMUX_Channel_TypeDef *DMAMUXx)
1431 {
1432 (void)(DMAMUXx);
1433 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF3) == (DMAMUX_CSR_SOF3)) ? 1UL : 0UL);
1434 }
1435
1436 /**
1437 * @brief Get Synchronization Event Overrun Flag Channel 4.
1438 * @rmtoll CSR SOF4 LL_DMAMUX_IsActiveFlag_SO4
1439 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1440 * @retval State of bit (1 or 0).
1441 */
LL_DMAMUX_IsActiveFlag_SO4(DMAMUX_Channel_TypeDef * DMAMUXx)1442 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO4(DMAMUX_Channel_TypeDef *DMAMUXx)
1443 {
1444 (void)(DMAMUXx);
1445 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF4) == (DMAMUX_CSR_SOF4)) ? 1UL : 0UL);
1446 }
1447
1448 /**
1449 * @brief Get Synchronization Event Overrun Flag Channel 5.
1450 * @rmtoll CSR SOF5 LL_DMAMUX_IsActiveFlag_SO5
1451 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1452 * @retval State of bit (1 or 0).
1453 */
LL_DMAMUX_IsActiveFlag_SO5(DMAMUX_Channel_TypeDef * DMAMUXx)1454 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO5(DMAMUX_Channel_TypeDef *DMAMUXx)
1455 {
1456 (void)(DMAMUXx);
1457 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF5) == (DMAMUX_CSR_SOF5)) ? 1UL : 0UL);
1458 }
1459
1460 /**
1461 * @brief Get Synchronization Event Overrun Flag Channel 6.
1462 * @rmtoll CSR SOF6 LL_DMAMUX_IsActiveFlag_SO6
1463 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1464 * @retval State of bit (1 or 0).
1465 */
LL_DMAMUX_IsActiveFlag_SO6(DMAMUX_Channel_TypeDef * DMAMUXx)1466 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO6(DMAMUX_Channel_TypeDef *DMAMUXx)
1467 {
1468 (void)(DMAMUXx);
1469 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF6) == (DMAMUX_CSR_SOF6)) ? 1UL : 0UL);
1470 }
1471
1472 /**
1473 * @brief Get Synchronization Event Overrun Flag Channel 7.
1474 * @rmtoll CSR SOF7 LL_DMAMUX_IsActiveFlag_SO7
1475 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1476 * @retval State of bit (1 or 0).
1477 */
LL_DMAMUX_IsActiveFlag_SO7(DMAMUX_Channel_TypeDef * DMAMUXx)1478 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO7(DMAMUX_Channel_TypeDef *DMAMUXx)
1479 {
1480 (void)(DMAMUXx);
1481 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF7) == (DMAMUX_CSR_SOF7)) ? 1UL : 0UL);
1482 }
1483
1484 /**
1485 * @brief Get Synchronization Event Overrun Flag Channel 8.
1486 * @rmtoll CSR SOF8 LL_DMAMUX_IsActiveFlag_SO8
1487 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1488 * @retval State of bit (1 or 0).
1489 */
LL_DMAMUX_IsActiveFlag_SO8(DMAMUX_Channel_TypeDef * DMAMUXx)1490 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO8(DMAMUX_Channel_TypeDef *DMAMUXx)
1491 {
1492 (void)(DMAMUXx);
1493 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF8) == (DMAMUX_CSR_SOF8)) ? 1UL : 0UL);
1494 }
1495
1496 /**
1497 * @brief Get Synchronization Event Overrun Flag Channel 9.
1498 * @rmtoll CSR SOF9 LL_DMAMUX_IsActiveFlag_SO9
1499 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1500 * @retval State of bit (1 or 0).
1501 */
LL_DMAMUX_IsActiveFlag_SO9(DMAMUX_Channel_TypeDef * DMAMUXx)1502 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO9(DMAMUX_Channel_TypeDef *DMAMUXx)
1503 {
1504 (void)(DMAMUXx);
1505 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF9) == (DMAMUX_CSR_SOF9)) ? 1UL : 0UL);
1506 }
1507
1508 /**
1509 * @brief Get Synchronization Event Overrun Flag Channel 10.
1510 * @rmtoll CSR SOF10 LL_DMAMUX_IsActiveFlag_SO10
1511 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1512 * @retval State of bit (1 or 0).
1513 */
LL_DMAMUX_IsActiveFlag_SO10(DMAMUX_Channel_TypeDef * DMAMUXx)1514 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO10(DMAMUX_Channel_TypeDef *DMAMUXx)
1515 {
1516 (void)(DMAMUXx);
1517 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF10) == (DMAMUX_CSR_SOF10)) ? 1UL : 0UL);
1518 }
1519
1520 /**
1521 * @brief Get Synchronization Event Overrun Flag Channel 11.
1522 * @rmtoll CSR SOF11 LL_DMAMUX_IsActiveFlag_SO11
1523 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1524 * @retval State of bit (1 or 0).
1525 */
LL_DMAMUX_IsActiveFlag_SO11(DMAMUX_Channel_TypeDef * DMAMUXx)1526 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO11(DMAMUX_Channel_TypeDef *DMAMUXx)
1527 {
1528 (void)(DMAMUXx);
1529 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF11) == (DMAMUX_CSR_SOF11)) ? 1UL : 0UL);
1530 }
1531
1532 /**
1533 * @brief Get Synchronization Event Overrun Flag Channel 12.
1534 * @rmtoll CSR SOF12 LL_DMAMUX_IsActiveFlag_SO12
1535 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1536 * @retval State of bit (1 or 0).
1537 */
LL_DMAMUX_IsActiveFlag_SO12(DMAMUX_Channel_TypeDef * DMAMUXx)1538 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO12(DMAMUX_Channel_TypeDef *DMAMUXx)
1539 {
1540 (void)(DMAMUXx);
1541 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF12) == (DMAMUX_CSR_SOF12)) ? 1UL : 0UL);
1542 }
1543
1544 /**
1545 * @brief Get Synchronization Event Overrun Flag Channel 13.
1546 * @rmtoll CSR SOF13 LL_DMAMUX_IsActiveFlag_SO13
1547 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1548 * @retval State of bit (1 or 0).
1549 */
LL_DMAMUX_IsActiveFlag_SO13(DMAMUX_Channel_TypeDef * DMAMUXx)1550 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO13(DMAMUX_Channel_TypeDef *DMAMUXx)
1551 {
1552 (void)(DMAMUXx);
1553 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF13) == (DMAMUX_CSR_SOF13)) ? 1UL : 0UL);
1554 }
1555
1556 /**
1557 * @brief Get Request Generator 0 Trigger Event Overrun Flag.
1558 * @rmtoll RGSR OF0 LL_DMAMUX_IsActiveFlag_RGO0
1559 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1560 * @retval State of bit (1 or 0).
1561 */
LL_DMAMUX_IsActiveFlag_RGO0(DMAMUX_Channel_TypeDef * DMAMUXx)1562 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_RGO0(DMAMUX_Channel_TypeDef *DMAMUXx)
1563 {
1564 (void)(DMAMUXx);
1565 return ((READ_BIT(DMAMUX1_RequestGenStatus->RGSR, DMAMUX_RGSR_OF0) == (DMAMUX_RGSR_OF0)) ? 1UL : 0UL);
1566 }
1567
1568 /**
1569 * @brief Get Request Generator 1 Trigger Event Overrun Flag.
1570 * @rmtoll RGSR OF1 LL_DMAMUX_IsActiveFlag_RGO1
1571 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1572 * @retval State of bit (1 or 0).
1573 */
LL_DMAMUX_IsActiveFlag_RGO1(DMAMUX_Channel_TypeDef * DMAMUXx)1574 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_RGO1(DMAMUX_Channel_TypeDef *DMAMUXx)
1575 {
1576 (void)(DMAMUXx);
1577 return ((READ_BIT(DMAMUX1_RequestGenStatus->RGSR, DMAMUX_RGSR_OF1) == (DMAMUX_RGSR_OF1)) ? 1UL : 0UL);
1578 }
1579
1580 /**
1581 * @brief Get Request Generator 2 Trigger Event Overrun Flag.
1582 * @rmtoll RGSR OF2 LL_DMAMUX_IsActiveFlag_RGO2
1583 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1584 * @retval State of bit (1 or 0).
1585 */
LL_DMAMUX_IsActiveFlag_RGO2(DMAMUX_Channel_TypeDef * DMAMUXx)1586 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_RGO2(DMAMUX_Channel_TypeDef *DMAMUXx)
1587 {
1588 (void)(DMAMUXx);
1589 return ((READ_BIT(DMAMUX1_RequestGenStatus->RGSR, DMAMUX_RGSR_OF2) == (DMAMUX_RGSR_OF2)) ? 1UL : 0UL);
1590 }
1591
1592 /**
1593 * @brief Get Request Generator 3 Trigger Event Overrun Flag.
1594 * @rmtoll RGSR OF3 LL_DMAMUX_IsActiveFlag_RGO3
1595 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1596 * @retval State of bit (1 or 0).
1597 */
LL_DMAMUX_IsActiveFlag_RGO3(DMAMUX_Channel_TypeDef * DMAMUXx)1598 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_RGO3(DMAMUX_Channel_TypeDef *DMAMUXx)
1599 {
1600 (void)(DMAMUXx);
1601 return ((READ_BIT(DMAMUX1_RequestGenStatus->RGSR, DMAMUX_RGSR_OF3) == (DMAMUX_RGSR_OF3)) ? 1UL : 0UL);
1602 }
1603
1604 /**
1605 * @brief Clear Synchronization Event Overrun Flag Channel 0.
1606 * @rmtoll CFR CSOF0 LL_DMAMUX_ClearFlag_SO0
1607 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1608 * @retval None
1609 */
LL_DMAMUX_ClearFlag_SO0(DMAMUX_Channel_TypeDef * DMAMUXx)1610 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO0(DMAMUX_Channel_TypeDef * DMAMUXx)
1611 {
1612 (void)(DMAMUXx);
1613 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF0);
1614 }
1615
1616 /**
1617 * @brief Clear Synchronization Event Overrun Flag Channel 1.
1618 * @rmtoll CFR CSOF1 LL_DMAMUX_ClearFlag_SO1
1619 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1620 * @retval None
1621 */
LL_DMAMUX_ClearFlag_SO1(DMAMUX_Channel_TypeDef * DMAMUXx)1622 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO1(DMAMUX_Channel_TypeDef *DMAMUXx)
1623 {
1624 (void)(DMAMUXx);
1625 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF1);
1626 }
1627
1628 /**
1629 * @brief Clear Synchronization Event Overrun Flag Channel 2.
1630 * @rmtoll CFR CSOF2 LL_DMAMUX_ClearFlag_SO2
1631 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1632 * @retval None
1633 */
LL_DMAMUX_ClearFlag_SO2(DMAMUX_Channel_TypeDef * DMAMUXx)1634 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO2(DMAMUX_Channel_TypeDef *DMAMUXx)
1635 {
1636 (void)(DMAMUXx);
1637 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF2);
1638 }
1639
1640 /**
1641 * @brief Clear Synchronization Event Overrun Flag Channel 3.
1642 * @rmtoll CFR CSOF3 LL_DMAMUX_ClearFlag_SO3
1643 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1644 * @retval None
1645 */
LL_DMAMUX_ClearFlag_SO3(DMAMUX_Channel_TypeDef * DMAMUXx)1646 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO3(DMAMUX_Channel_TypeDef *DMAMUXx)
1647 {
1648 (void)(DMAMUXx);
1649 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF3);
1650 }
1651
1652 /**
1653 * @brief Clear Synchronization Event Overrun Flag Channel 4.
1654 * @rmtoll CFR CSOF4 LL_DMAMUX_ClearFlag_SO4
1655 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1656 * @retval None
1657 */
LL_DMAMUX_ClearFlag_SO4(DMAMUX_Channel_TypeDef * DMAMUXx)1658 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO4(DMAMUX_Channel_TypeDef *DMAMUXx)
1659 {
1660 (void)(DMAMUXx);
1661 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF4);
1662 }
1663
1664 /**
1665 * @brief Clear Synchronization Event Overrun Flag Channel 5.
1666 * @rmtoll CFR CSOF5 LL_DMAMUX_ClearFlag_SO5
1667 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1668 * @retval None
1669 */
LL_DMAMUX_ClearFlag_SO5(DMAMUX_Channel_TypeDef * DMAMUXx)1670 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO5(DMAMUX_Channel_TypeDef *DMAMUXx)
1671 {
1672 (void)(DMAMUXx);
1673 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF5);
1674 }
1675
1676 /**
1677 * @brief Clear Synchronization Event Overrun Flag Channel 6.
1678 * @rmtoll CFR CSOF6 LL_DMAMUX_ClearFlag_SO6
1679 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1680 * @retval None
1681 */
LL_DMAMUX_ClearFlag_SO6(DMAMUX_Channel_TypeDef * DMAMUXx)1682 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO6(DMAMUX_Channel_TypeDef *DMAMUXx)
1683 {
1684 (void)(DMAMUXx);
1685 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF6);
1686 }
1687
1688 /**
1689 * @brief Clear Synchronization Event Overrun Flag Channel 7.
1690 * @rmtoll CFR CSOF7 LL_DMAMUX_ClearFlag_SO7
1691 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1692 * @retval None
1693 */
LL_DMAMUX_ClearFlag_SO7(DMAMUX_Channel_TypeDef * DMAMUXx)1694 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO7(DMAMUX_Channel_TypeDef *DMAMUXx)
1695 {
1696 (void)(DMAMUXx);
1697 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF7);
1698 }
1699
1700 /**
1701 * @brief Clear Synchronization Event Overrun Flag Channel 8.
1702 * @rmtoll CFR CSOF8 LL_DMAMUX_ClearFlag_SO8
1703 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1704 * @retval None
1705 */
LL_DMAMUX_ClearFlag_SO8(DMAMUX_Channel_TypeDef * DMAMUXx)1706 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO8(DMAMUX_Channel_TypeDef *DMAMUXx)
1707 {
1708 (void)(DMAMUXx);
1709 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF8);
1710 }
1711
1712 /**
1713 * @brief Clear Synchronization Event Overrun Flag Channel 9.
1714 * @rmtoll CFR CSOF9 LL_DMAMUX_ClearFlag_SO9
1715 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1716 * @retval None
1717 */
LL_DMAMUX_ClearFlag_SO9(DMAMUX_Channel_TypeDef * DMAMUXx)1718 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO9(DMAMUX_Channel_TypeDef *DMAMUXx)
1719 {
1720 (void)(DMAMUXx);
1721 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF9);
1722 }
1723
1724 /**
1725 * @brief Clear Synchronization Event Overrun Flag Channel 10.
1726 * @rmtoll CFR CSOF10 LL_DMAMUX_ClearFlag_SO10
1727 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1728 * @retval None
1729 */
LL_DMAMUX_ClearFlag_SO10(DMAMUX_Channel_TypeDef * DMAMUXx)1730 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO10(DMAMUX_Channel_TypeDef *DMAMUXx)
1731 {
1732 (void)(DMAMUXx);
1733 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF10);
1734 }
1735
1736 /**
1737 * @brief Clear Synchronization Event Overrun Flag Channel 11.
1738 * @rmtoll CFR CSOF11 LL_DMAMUX_ClearFlag_SO11
1739 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1740 * @retval None
1741 */
LL_DMAMUX_ClearFlag_SO11(DMAMUX_Channel_TypeDef * DMAMUXx)1742 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO11(DMAMUX_Channel_TypeDef *DMAMUXx)
1743 {
1744 (void)(DMAMUXx);
1745 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF11);
1746 }
1747
1748 /**
1749 * @brief Clear Synchronization Event Overrun Flag Channel 12.
1750 * @rmtoll CFR CSOF12 LL_DMAMUX_ClearFlag_SO12
1751 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1752 * @retval None
1753 */
LL_DMAMUX_ClearFlag_SO12(DMAMUX_Channel_TypeDef * DMAMUXx)1754 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO12(DMAMUX_Channel_TypeDef *DMAMUXx)
1755 {
1756 (void)(DMAMUXx);
1757 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF12);
1758 }
1759
1760 /**
1761 * @brief Clear Synchronization Event Overrun Flag Channel 13.
1762 * @rmtoll CFR CSOF13 LL_DMAMUX_ClearFlag_SO13
1763 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1764 * @retval None
1765 */
LL_DMAMUX_ClearFlag_SO13(DMAMUX_Channel_TypeDef * DMAMUXx)1766 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO13(DMAMUX_Channel_TypeDef *DMAMUXx)
1767 {
1768 (void)(DMAMUXx);
1769 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF13);
1770 }
1771
1772 /**
1773 * @brief Clear Request Generator 0 Trigger Event Overrun Flag.
1774 * @rmtoll RGCFR COF0 LL_DMAMUX_ClearFlag_RGO0
1775 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1776 * @retval None
1777 */
LL_DMAMUX_ClearFlag_RGO0(DMAMUX_Channel_TypeDef * DMAMUXx)1778 __STATIC_INLINE void LL_DMAMUX_ClearFlag_RGO0(DMAMUX_Channel_TypeDef *DMAMUXx)
1779 {
1780 (void)(DMAMUXx);
1781 SET_BIT(DMAMUX1_RequestGenStatus->RGCFR, DMAMUX_RGCFR_COF0);
1782 }
1783
1784 /**
1785 * @brief Clear Request Generator 1 Trigger Event Overrun Flag.
1786 * @rmtoll RGCFR COF1 LL_DMAMUX_ClearFlag_RGO1
1787 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1788 * @retval None
1789 */
LL_DMAMUX_ClearFlag_RGO1(DMAMUX_Channel_TypeDef * DMAMUXx)1790 __STATIC_INLINE void LL_DMAMUX_ClearFlag_RGO1(DMAMUX_Channel_TypeDef *DMAMUXx)
1791 {
1792 (void)(DMAMUXx);
1793 SET_BIT(DMAMUX1_RequestGenStatus->RGCFR, DMAMUX_RGCFR_COF1);
1794 }
1795
1796 /**
1797 * @brief Clear Request Generator 2 Trigger Event Overrun Flag.
1798 * @rmtoll RGCFR COF2 LL_DMAMUX_ClearFlag_RGO2
1799 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1800 * @retval None
1801 */
LL_DMAMUX_ClearFlag_RGO2(DMAMUX_Channel_TypeDef * DMAMUXx)1802 __STATIC_INLINE void LL_DMAMUX_ClearFlag_RGO2(DMAMUX_Channel_TypeDef *DMAMUXx)
1803 {
1804 (void)(DMAMUXx);
1805 SET_BIT(DMAMUX1_RequestGenStatus->RGCFR, DMAMUX_RGCFR_COF2);
1806 }
1807
1808 /**
1809 * @brief Clear Request Generator 3 Trigger Event Overrun Flag.
1810 * @rmtoll RGCFR COF3 LL_DMAMUX_ClearFlag_RGO3
1811 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1812 * @retval None
1813 */
LL_DMAMUX_ClearFlag_RGO3(DMAMUX_Channel_TypeDef * DMAMUXx)1814 __STATIC_INLINE void LL_DMAMUX_ClearFlag_RGO3(DMAMUX_Channel_TypeDef *DMAMUXx)
1815 {
1816 (void)(DMAMUXx);
1817 SET_BIT(DMAMUX1_RequestGenStatus->RGCFR, DMAMUX_RGCFR_COF3);
1818 }
1819
1820 /**
1821 * @}
1822 */
1823
1824 /** @defgroup DMAMUX_LL_EF_IT_Management IT_Management
1825 * @{
1826 */
1827
1828 /**
1829 * @brief Enable the Synchronization Event Overrun Interrupt on DMAMUX channel x.
1830 * @rmtoll CxCR SOIE LL_DMAMUX_EnableIT_SO
1831 * @param DMAMUXx DMAMUXx Instance
1832 * @param Channel This parameter can be one of the following values:
1833 * @arg @ref LL_DMAMUX_CHANNEL_0
1834 * @arg @ref LL_DMAMUX_CHANNEL_1
1835 * @arg @ref LL_DMAMUX_CHANNEL_2
1836 * @arg @ref LL_DMAMUX_CHANNEL_3
1837 * @arg @ref LL_DMAMUX_CHANNEL_4
1838 * @arg @ref LL_DMAMUX_CHANNEL_5
1839 * @arg @ref LL_DMAMUX_CHANNEL_6
1840 * @arg @ref LL_DMAMUX_CHANNEL_7
1841 * @arg @ref LL_DMAMUX_CHANNEL_8
1842 * @arg @ref LL_DMAMUX_CHANNEL_9
1843 * @arg @ref LL_DMAMUX_CHANNEL_10
1844 * @arg @ref LL_DMAMUX_CHANNEL_11
1845 * @arg @ref LL_DMAMUX_CHANNEL_12
1846 * @arg @ref LL_DMAMUX_CHANNEL_13
1847 * @retval None
1848 */
LL_DMAMUX_EnableIT_SO(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t Channel)1849 __STATIC_INLINE void LL_DMAMUX_EnableIT_SO(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
1850 {
1851 (void)(DMAMUXx);
1852 SET_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SOIE);
1853 }
1854
1855 /**
1856 * @brief Disable the Synchronization Event Overrun Interrupt on DMAMUX channel x.
1857 * @rmtoll CxCR SOIE LL_DMAMUX_DisableIT_SO
1858 * @param DMAMUXx DMAMUXx Instance
1859 * @param Channel This parameter can be one of the following values:
1860 * @arg @ref LL_DMAMUX_CHANNEL_0
1861 * @arg @ref LL_DMAMUX_CHANNEL_1
1862 * @arg @ref LL_DMAMUX_CHANNEL_2
1863 * @arg @ref LL_DMAMUX_CHANNEL_3
1864 * @arg @ref LL_DMAMUX_CHANNEL_4
1865 * @arg @ref LL_DMAMUX_CHANNEL_5
1866 * @arg @ref LL_DMAMUX_CHANNEL_6
1867 * @arg @ref LL_DMAMUX_CHANNEL_7
1868 * @arg @ref LL_DMAMUX_CHANNEL_8
1869 * @arg @ref LL_DMAMUX_CHANNEL_9
1870 * @arg @ref LL_DMAMUX_CHANNEL_10
1871 * @arg @ref LL_DMAMUX_CHANNEL_11
1872 * @arg @ref LL_DMAMUX_CHANNEL_12
1873 * @arg @ref LL_DMAMUX_CHANNEL_13
1874 * @retval None
1875 */
LL_DMAMUX_DisableIT_SO(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t Channel)1876 __STATIC_INLINE void LL_DMAMUX_DisableIT_SO(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
1877 {
1878 (void)(DMAMUXx);
1879 CLEAR_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SOIE);
1880 }
1881
1882 /**
1883 * @brief Check if the Synchronization Event Overrun Interrupt on DMAMUX channel x is enabled or disabled.
1884 * @rmtoll CxCR SOIE LL_DMAMUX_IsEnabledIT_SO
1885 * @param DMAMUXx DMAMUXx Instance
1886 * @param Channel This parameter can be one of the following values:
1887 * @arg @ref LL_DMAMUX_CHANNEL_0
1888 * @arg @ref LL_DMAMUX_CHANNEL_1
1889 * @arg @ref LL_DMAMUX_CHANNEL_2
1890 * @arg @ref LL_DMAMUX_CHANNEL_3
1891 * @arg @ref LL_DMAMUX_CHANNEL_4
1892 * @arg @ref LL_DMAMUX_CHANNEL_5
1893 * @arg @ref LL_DMAMUX_CHANNEL_6
1894 * @arg @ref LL_DMAMUX_CHANNEL_7
1895 * @arg @ref LL_DMAMUX_CHANNEL_8
1896 * @arg @ref LL_DMAMUX_CHANNEL_9
1897 * @arg @ref LL_DMAMUX_CHANNEL_10
1898 * @arg @ref LL_DMAMUX_CHANNEL_11
1899 * @arg @ref LL_DMAMUX_CHANNEL_12
1900 * @arg @ref LL_DMAMUX_CHANNEL_13
1901 * @retval State of bit (1 or 0).
1902 */
LL_DMAMUX_IsEnabledIT_SO(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t Channel)1903 __STATIC_INLINE uint32_t LL_DMAMUX_IsEnabledIT_SO(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
1904 {
1905 (void)(DMAMUXx);
1906 return (((READ_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SOIE)) == (DMAMUX_CxCR_SOIE))? 1UL : 0UL);
1907 }
1908
1909 /**
1910 * @brief Enable the Request Generation Trigger Event Overrun Interrupt on DMAMUX channel x.
1911 * @rmtoll RGxCR OIE LL_DMAMUX_EnableIT_RGO
1912 * @param DMAMUXx DMAMUXx Instance
1913 * @param RequestGenChannel This parameter can be one of the following values:
1914 * @arg @ref LL_DMAMUX_REQ_GEN_0
1915 * @arg @ref LL_DMAMUX_REQ_GEN_1
1916 * @arg @ref LL_DMAMUX_REQ_GEN_2
1917 * @arg @ref LL_DMAMUX_REQ_GEN_3
1918 * @retval None
1919 */
LL_DMAMUX_EnableIT_RGO(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t RequestGenChannel)1920 __STATIC_INLINE void LL_DMAMUX_EnableIT_RGO(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
1921 {
1922 (void)(DMAMUXx);
1923 SET_BIT((DMAMUX1_RequestGenerator0 + RequestGenChannel)->RGCR, DMAMUX_RGxCR_OIE);
1924 }
1925
1926 /**
1927 * @brief Disable the Request Generation Trigger Event Overrun Interrupt on DMAMUX channel x.
1928 * @rmtoll RGxCR OIE LL_DMAMUX_DisableIT_RGO
1929 * @param DMAMUXx DMAMUXx Instance
1930 * @param RequestGenChannel This parameter can be one of the following values:
1931 * @arg @ref LL_DMAMUX_REQ_GEN_0
1932 * @arg @ref LL_DMAMUX_REQ_GEN_1
1933 * @arg @ref LL_DMAMUX_REQ_GEN_2
1934 * @arg @ref LL_DMAMUX_REQ_GEN_3
1935 * @retval None
1936 */
LL_DMAMUX_DisableIT_RGO(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t RequestGenChannel)1937 __STATIC_INLINE void LL_DMAMUX_DisableIT_RGO(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
1938 {
1939 (void)(DMAMUXx);
1940 CLEAR_BIT((DMAMUX1_RequestGenerator0 + RequestGenChannel)->RGCR, DMAMUX_RGxCR_OIE);
1941 }
1942
1943 /**
1944 * @brief Check if the Request Generation Trigger Event Overrun Interrupt on DMAMUX channel x is enabled or disabled.
1945 * @rmtoll RGxCR OIE LL_DMAMUX_IsEnabledIT_RGO
1946 * @param DMAMUXx DMAMUXx Instance
1947 * @param RequestGenChannel This parameter can be one of the following values:
1948 * @arg @ref LL_DMAMUX_REQ_GEN_0
1949 * @arg @ref LL_DMAMUX_REQ_GEN_1
1950 * @arg @ref LL_DMAMUX_REQ_GEN_2
1951 * @arg @ref LL_DMAMUX_REQ_GEN_3
1952 * @retval State of bit (1 or 0).
1953 */
LL_DMAMUX_IsEnabledIT_RGO(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t RequestGenChannel)1954 __STATIC_INLINE uint32_t LL_DMAMUX_IsEnabledIT_RGO(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
1955 {
1956 (void)(DMAMUXx);
1957 return ((READ_BIT((DMAMUX1_RequestGenerator0 + RequestGenChannel)->RGCR, DMAMUX_RGxCR_OIE) == (DMAMUX_RGxCR_OIE))? 1UL : 0UL);
1958 }
1959
1960 /**
1961 * @}
1962 */
1963
1964 /**
1965 * @}
1966 */
1967
1968 /**
1969 * @}
1970 */
1971
1972 #endif /* DMAMUX1 */
1973
1974 /**
1975 * @}
1976 */
1977
1978 #ifdef __cplusplus
1979 }
1980 #endif
1981
1982 #endif /* STM32L4xx_LL_DMAMUX_H */
1983
1984 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
1985