1 /** 2 ****************************************************************************** 3 * @file stm32l4xx_hal_usart_ex.h 4 * @author MCD Application Team 5 * @brief Header file of USART HAL Extended module. 6 ****************************************************************************** 7 * @attention 8 * 9 * <h2><center>© Copyright (c) 2017 STMicroelectronics. 10 * All rights reserved.</center></h2> 11 * 12 * This software component is licensed by ST under BSD 3-Clause license, 13 * the "License"; You may not use this file except in compliance with the 14 * License. You may obtain a copy of the License at: 15 * opensource.org/licenses/BSD-3-Clause 16 * 17 ****************************************************************************** 18 */ 19 20 /* Define to prevent recursive inclusion -------------------------------------*/ 21 #ifndef STM32L4xx_HAL_USART_EX_H 22 #define STM32L4xx_HAL_USART_EX_H 23 24 #ifdef __cplusplus 25 extern "C" { 26 #endif 27 28 /* Includes ------------------------------------------------------------------*/ 29 #include "stm32l4xx_hal_def.h" 30 31 /** @addtogroup STM32L4xx_HAL_Driver 32 * @{ 33 */ 34 35 /** @addtogroup USARTEx 36 * @{ 37 */ 38 39 /* Exported types ------------------------------------------------------------*/ 40 /* Exported constants --------------------------------------------------------*/ 41 /** @defgroup USARTEx_Exported_Constants USARTEx Exported Constants 42 * @{ 43 */ 44 45 /** @defgroup USARTEx_Word_Length USARTEx Word Length 46 * @{ 47 */ 48 #define USART_WORDLENGTH_7B ((uint32_t)USART_CR1_M1) /*!< 7-bit long USART frame */ 49 #define USART_WORDLENGTH_8B 0x00000000U /*!< 8-bit long USART frame */ 50 #define USART_WORDLENGTH_9B ((uint32_t)USART_CR1_M0) /*!< 9-bit long USART frame */ 51 /** 52 * @} 53 */ 54 55 #if defined(USART_CR2_SLVEN) 56 /** @defgroup USARTEx_Slave_Select_management USARTEx Slave Select Management 57 * @{ 58 */ 59 #define USART_NSS_HARD 0x00000000U /*!< SPI slave selection depends on NSS input pin */ 60 #define USART_NSS_SOFT USART_CR2_DIS_NSS /*!< SPI slave is always selected and NSS input pin is ignored */ 61 /** 62 * @} 63 */ 64 65 66 /** @defgroup USARTEx_Slave_Mode USARTEx Synchronous Slave mode enable 67 * @brief USART SLAVE mode 68 * @{ 69 */ 70 #define USART_SLAVEMODE_DISABLE 0x00000000U /*!< USART SPI Slave Mode Enable */ 71 #define USART_SLAVEMODE_ENABLE USART_CR2_SLVEN /*!< USART SPI Slave Mode Disable */ 72 /** 73 * @} 74 */ 75 #endif /* USART_CR2_SLVEN */ 76 77 #if defined(USART_CR1_FIFOEN) 78 /** @defgroup USARTEx_FIFO_mode USARTEx FIFO mode 79 * @brief USART FIFO mode 80 * @{ 81 */ 82 #define USART_FIFOMODE_DISABLE 0x00000000U /*!< FIFO mode disable */ 83 #define USART_FIFOMODE_ENABLE USART_CR1_FIFOEN /*!< FIFO mode enable */ 84 /** 85 * @} 86 */ 87 88 /** @defgroup USARTEx_TXFIFO_threshold_level USARTEx TXFIFO threshold level 89 * @brief USART TXFIFO level 90 * @{ 91 */ 92 #define USART_TXFIFO_THRESHOLD_1_8 0x00000000U /*!< TXFIFO reaches 1/8 of its depth */ 93 #define USART_TXFIFO_THRESHOLD_1_4 USART_CR3_TXFTCFG_0 /*!< TXFIFO reaches 1/4 of its depth */ 94 #define USART_TXFIFO_THRESHOLD_1_2 USART_CR3_TXFTCFG_1 /*!< TXFIFO reaches 1/2 of its depth */ 95 #define USART_TXFIFO_THRESHOLD_3_4 (USART_CR3_TXFTCFG_0|USART_CR3_TXFTCFG_1) /*!< TXFIFO reaches 3/4 of its depth */ 96 #define USART_TXFIFO_THRESHOLD_7_8 USART_CR3_TXFTCFG_2 /*!< TXFIFO reaches 7/8 of its depth */ 97 #define USART_TXFIFO_THRESHOLD_8_8 (USART_CR3_TXFTCFG_2|USART_CR3_TXFTCFG_0) /*!< TXFIFO becomes empty */ 98 /** 99 * @} 100 */ 101 102 /** @defgroup USARTEx_RXFIFO_threshold_level USARTEx RXFIFO threshold level 103 * @brief USART RXFIFO level 104 * @{ 105 */ 106 #define USART_RXFIFO_THRESHOLD_1_8 0x00000000U /*!< RXFIFO FIFO reaches 1/8 of its depth */ 107 #define USART_RXFIFO_THRESHOLD_1_4 USART_CR3_RXFTCFG_0 /*!< RXFIFO FIFO reaches 1/4 of its depth */ 108 #define USART_RXFIFO_THRESHOLD_1_2 USART_CR3_RXFTCFG_1 /*!< RXFIFO FIFO reaches 1/2 of its depth */ 109 #define USART_RXFIFO_THRESHOLD_3_4 (USART_CR3_RXFTCFG_0|USART_CR3_RXFTCFG_1) /*!< RXFIFO FIFO reaches 3/4 of its depth */ 110 #define USART_RXFIFO_THRESHOLD_7_8 USART_CR3_RXFTCFG_2 /*!< RXFIFO FIFO reaches 7/8 of its depth */ 111 #define USART_RXFIFO_THRESHOLD_8_8 (USART_CR3_RXFTCFG_2|USART_CR3_RXFTCFG_0) /*!< RXFIFO FIFO becomes full */ 112 /** 113 * @} 114 */ 115 #endif /* USART_CR1_FIFOEN */ 116 117 /** 118 * @} 119 */ 120 121 /* Private macros ------------------------------------------------------------*/ 122 /** @defgroup USARTEx_Private_Macros USARTEx Private Macros 123 * @{ 124 */ 125 126 /** @brief Report the USART clock source. 127 * @param __HANDLE__ specifies the USART Handle. 128 * @param __CLOCKSOURCE__ output variable. 129 * @retval the USART clocking source, written in __CLOCKSOURCE__. 130 */ 131 #if defined (STM32L432xx) || defined (STM32L442xx) 132 #define USART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ 133 do { \ 134 if((__HANDLE__)->Instance == USART1) \ 135 { \ 136 switch(__HAL_RCC_GET_USART1_SOURCE()) \ 137 { \ 138 case RCC_USART1CLKSOURCE_PCLK2: \ 139 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK2; \ 140 break; \ 141 case RCC_USART1CLKSOURCE_HSI: \ 142 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \ 143 break; \ 144 case RCC_USART1CLKSOURCE_SYSCLK: \ 145 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \ 146 break; \ 147 case RCC_USART1CLKSOURCE_LSE: \ 148 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \ 149 break; \ 150 default: \ 151 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ 152 break; \ 153 } \ 154 } \ 155 else if((__HANDLE__)->Instance == USART2) \ 156 { \ 157 switch(__HAL_RCC_GET_USART2_SOURCE()) \ 158 { \ 159 case RCC_USART2CLKSOURCE_PCLK1: \ 160 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \ 161 break; \ 162 case RCC_USART2CLKSOURCE_HSI: \ 163 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \ 164 break; \ 165 case RCC_USART2CLKSOURCE_SYSCLK: \ 166 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \ 167 break; \ 168 case RCC_USART2CLKSOURCE_LSE: \ 169 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \ 170 break; \ 171 default: \ 172 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ 173 break; \ 174 } \ 175 } \ 176 else \ 177 { \ 178 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ 179 } \ 180 } while(0) 181 #else 182 #define USART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ 183 do { \ 184 if((__HANDLE__)->Instance == USART1) \ 185 { \ 186 switch(__HAL_RCC_GET_USART1_SOURCE()) \ 187 { \ 188 case RCC_USART1CLKSOURCE_PCLK2: \ 189 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK2; \ 190 break; \ 191 case RCC_USART1CLKSOURCE_HSI: \ 192 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \ 193 break; \ 194 case RCC_USART1CLKSOURCE_SYSCLK: \ 195 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \ 196 break; \ 197 case RCC_USART1CLKSOURCE_LSE: \ 198 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \ 199 break; \ 200 default: \ 201 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ 202 break; \ 203 } \ 204 } \ 205 else if((__HANDLE__)->Instance == USART2) \ 206 { \ 207 switch(__HAL_RCC_GET_USART2_SOURCE()) \ 208 { \ 209 case RCC_USART2CLKSOURCE_PCLK1: \ 210 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \ 211 break; \ 212 case RCC_USART2CLKSOURCE_HSI: \ 213 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \ 214 break; \ 215 case RCC_USART2CLKSOURCE_SYSCLK: \ 216 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \ 217 break; \ 218 case RCC_USART2CLKSOURCE_LSE: \ 219 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \ 220 break; \ 221 default: \ 222 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ 223 break; \ 224 } \ 225 } \ 226 else if((__HANDLE__)->Instance == USART3) \ 227 { \ 228 switch(__HAL_RCC_GET_USART3_SOURCE()) \ 229 { \ 230 case RCC_USART3CLKSOURCE_PCLK1: \ 231 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \ 232 break; \ 233 case RCC_USART3CLKSOURCE_HSI: \ 234 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \ 235 break; \ 236 case RCC_USART3CLKSOURCE_SYSCLK: \ 237 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \ 238 break; \ 239 case RCC_USART3CLKSOURCE_LSE: \ 240 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \ 241 break; \ 242 default: \ 243 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ 244 break; \ 245 } \ 246 } \ 247 else \ 248 { \ 249 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ 250 } \ 251 } while(0) 252 #endif /* STM32L432xx || STM32L442xx */ 253 254 /** @brief Compute the USART mask to apply to retrieve the received data 255 * according to the word length and to the parity bits activation. 256 * @note If PCE = 1, the parity bit is not included in the data extracted 257 * by the reception API(). 258 * This masking operation is not carried out in the case of 259 * DMA transfers. 260 * @param __HANDLE__ specifies the USART Handle. 261 * @retval None, the mask to apply to USART RDR register is stored in (__HANDLE__)->Mask field. 262 */ 263 #define USART_MASK_COMPUTATION(__HANDLE__) \ 264 do { \ 265 if ((__HANDLE__)->Init.WordLength == USART_WORDLENGTH_9B) \ 266 { \ 267 if ((__HANDLE__)->Init.Parity == USART_PARITY_NONE) \ 268 { \ 269 (__HANDLE__)->Mask = 0x01FFU; \ 270 } \ 271 else \ 272 { \ 273 (__HANDLE__)->Mask = 0x00FFU; \ 274 } \ 275 } \ 276 else if ((__HANDLE__)->Init.WordLength == USART_WORDLENGTH_8B) \ 277 { \ 278 if ((__HANDLE__)->Init.Parity == USART_PARITY_NONE) \ 279 { \ 280 (__HANDLE__)->Mask = 0x00FFU; \ 281 } \ 282 else \ 283 { \ 284 (__HANDLE__)->Mask = 0x007FU; \ 285 } \ 286 } \ 287 else if ((__HANDLE__)->Init.WordLength == USART_WORDLENGTH_7B) \ 288 { \ 289 if ((__HANDLE__)->Init.Parity == USART_PARITY_NONE) \ 290 { \ 291 (__HANDLE__)->Mask = 0x007FU; \ 292 } \ 293 else \ 294 { \ 295 (__HANDLE__)->Mask = 0x003FU; \ 296 } \ 297 } \ 298 else \ 299 { \ 300 (__HANDLE__)->Mask = 0x0000U; \ 301 } \ 302 } while(0U) 303 304 305 /** 306 * @brief Ensure that USART frame length is valid. 307 * @param __LENGTH__ USART frame length. 308 * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid) 309 */ 310 #define IS_USART_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == USART_WORDLENGTH_7B) || \ 311 ((__LENGTH__) == USART_WORDLENGTH_8B) || \ 312 ((__LENGTH__) == USART_WORDLENGTH_9B)) 313 314 #if defined(USART_CR2_SLVEN) 315 /** 316 * @brief Ensure that USART Negative Slave Select (NSS) pin management is valid. 317 * @param __NSS__ USART Negative Slave Select pin management. 318 * @retval SET (__NSS__ is valid) or RESET (__NSS__ is invalid) 319 */ 320 #define IS_USART_NSS(__NSS__) (((__NSS__) == USART_NSS_HARD) || \ 321 ((__NSS__) == USART_NSS_SOFT)) 322 323 /** 324 * @brief Ensure that USART Slave Mode is valid. 325 * @param __STATE__ USART Slave Mode. 326 * @retval SET (__STATE__ is valid) or RESET (__STATE__ is invalid) 327 */ 328 #define IS_USART_SLAVEMODE(__STATE__) (((__STATE__) == USART_SLAVEMODE_DISABLE ) || \ 329 ((__STATE__) == USART_SLAVEMODE_ENABLE)) 330 #endif /* USART_CR2_SLVEN */ 331 332 #if defined(USART_CR1_FIFOEN) 333 /** 334 * @brief Ensure that USART FIFO mode is valid. 335 * @param __STATE__ USART FIFO mode. 336 * @retval SET (__STATE__ is valid) or RESET (__STATE__ is invalid) 337 */ 338 #define IS_USART_FIFO_MODE_STATE(__STATE__) (((__STATE__) == USART_FIFOMODE_DISABLE ) || \ 339 ((__STATE__) == USART_FIFOMODE_ENABLE)) 340 341 /** 342 * @brief Ensure that USART TXFIFO threshold level is valid. 343 * @param __THRESHOLD__ USART TXFIFO threshold level. 344 * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid) 345 */ 346 #define IS_USART_TXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == USART_TXFIFO_THRESHOLD_1_8) || \ 347 ((__THRESHOLD__) == USART_TXFIFO_THRESHOLD_1_4) || \ 348 ((__THRESHOLD__) == USART_TXFIFO_THRESHOLD_1_2) || \ 349 ((__THRESHOLD__) == USART_TXFIFO_THRESHOLD_3_4) || \ 350 ((__THRESHOLD__) == USART_TXFIFO_THRESHOLD_7_8) || \ 351 ((__THRESHOLD__) == USART_TXFIFO_THRESHOLD_8_8)) 352 353 /** 354 * @brief Ensure that USART RXFIFO threshold level is valid. 355 * @param __THRESHOLD__ USART RXFIFO threshold level. 356 * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid) 357 */ 358 #define IS_USART_RXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == USART_RXFIFO_THRESHOLD_1_8) || \ 359 ((__THRESHOLD__) == USART_RXFIFO_THRESHOLD_1_4) || \ 360 ((__THRESHOLD__) == USART_RXFIFO_THRESHOLD_1_2) || \ 361 ((__THRESHOLD__) == USART_RXFIFO_THRESHOLD_3_4) || \ 362 ((__THRESHOLD__) == USART_RXFIFO_THRESHOLD_7_8) || \ 363 ((__THRESHOLD__) == USART_RXFIFO_THRESHOLD_8_8)) 364 #endif /* USART_CR1_FIFOEN */ 365 /** 366 * @} 367 */ 368 369 /* Exported functions --------------------------------------------------------*/ 370 /** @addtogroup USARTEx_Exported_Functions 371 * @{ 372 */ 373 374 /** @addtogroup USARTEx_Exported_Functions_Group1 375 * @{ 376 */ 377 378 /* IO operation functions *****************************************************/ 379 #if defined(USART_CR1_FIFOEN) 380 void HAL_USARTEx_RxFifoFullCallback(USART_HandleTypeDef *husart); 381 void HAL_USARTEx_TxFifoEmptyCallback(USART_HandleTypeDef *husart); 382 #endif /* USART_CR1_FIFOEN */ 383 384 /** 385 * @} 386 */ 387 388 /** @addtogroup USARTEx_Exported_Functions_Group2 389 * @{ 390 */ 391 392 /* Peripheral Control functions ***********************************************/ 393 #if defined(USART_CR2_SLVEN) 394 HAL_StatusTypeDef HAL_USARTEx_EnableSlaveMode(USART_HandleTypeDef *husart); 395 HAL_StatusTypeDef HAL_USARTEx_DisableSlaveMode(USART_HandleTypeDef *husart); 396 HAL_StatusTypeDef HAL_USARTEx_ConfigNSS(USART_HandleTypeDef *husart, uint32_t NSSConfig); 397 #endif /* USART_CR2_SLVEN */ 398 #if defined(USART_CR1_FIFOEN) 399 HAL_StatusTypeDef HAL_USARTEx_EnableFifoMode(USART_HandleTypeDef *husart); 400 HAL_StatusTypeDef HAL_USARTEx_DisableFifoMode(USART_HandleTypeDef *husart); 401 HAL_StatusTypeDef HAL_USARTEx_SetTxFifoThreshold(USART_HandleTypeDef *husart, uint32_t Threshold); 402 HAL_StatusTypeDef HAL_USARTEx_SetRxFifoThreshold(USART_HandleTypeDef *husart, uint32_t Threshold); 403 #endif /* USART_CR1_FIFOEN */ 404 405 /** 406 * @} 407 */ 408 409 /** 410 * @} 411 */ 412 413 /** 414 * @} 415 */ 416 417 /** 418 * @} 419 */ 420 421 #ifdef __cplusplus 422 } 423 #endif 424 425 #endif /* STM32L4xx_HAL_USART_EX_H */ 426 427 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 428