1 /** 2 ****************************************************************************** 3 * @file stm32l4xx_hal_pcd.h 4 * @author MCD Application Team 5 * @brief Header file of PCD HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * <h2><center>© Copyright (c) 2017 STMicroelectronics. 10 * All rights reserved.</center></h2> 11 * 12 * This software component is licensed by ST under BSD 3-Clause license, 13 * the "License"; You may not use this file except in compliance with the 14 * License. You may obtain a copy of the License at: 15 * opensource.org/licenses/BSD-3-Clause 16 * 17 ****************************************************************************** 18 */ 19 20 /* Define to prevent recursive inclusion -------------------------------------*/ 21 #ifndef STM32L4xx_HAL_PCD_H 22 #define STM32L4xx_HAL_PCD_H 23 24 #ifdef __cplusplus 25 extern "C" { 26 #endif 27 28 /* Includes ------------------------------------------------------------------*/ 29 #include "stm32l4xx_ll_usb.h" 30 31 #if defined (USB) || defined (USB_OTG_FS) 32 33 /** @addtogroup STM32L4xx_HAL_Driver 34 * @{ 35 */ 36 37 /** @addtogroup PCD 38 * @{ 39 */ 40 41 /* Exported types ------------------------------------------------------------*/ 42 /** @defgroup PCD_Exported_Types PCD Exported Types 43 * @{ 44 */ 45 46 /** 47 * @brief PCD State structure definition 48 */ 49 typedef enum 50 { 51 HAL_PCD_STATE_RESET = 0x00, 52 HAL_PCD_STATE_READY = 0x01, 53 HAL_PCD_STATE_ERROR = 0x02, 54 HAL_PCD_STATE_BUSY = 0x03, 55 HAL_PCD_STATE_TIMEOUT = 0x04 56 } PCD_StateTypeDef; 57 58 /* Device LPM suspend state */ 59 typedef enum 60 { 61 LPM_L0 = 0x00, /* on */ 62 LPM_L1 = 0x01, /* LPM L1 sleep */ 63 LPM_L2 = 0x02, /* suspend */ 64 LPM_L3 = 0x03, /* off */ 65 } PCD_LPM_StateTypeDef; 66 67 typedef enum 68 { 69 PCD_LPM_L0_ACTIVE = 0x00, /* on */ 70 PCD_LPM_L1_ACTIVE = 0x01, /* LPM L1 sleep */ 71 } PCD_LPM_MsgTypeDef; 72 73 typedef enum 74 { 75 PCD_BCD_ERROR = 0xFF, 76 PCD_BCD_CONTACT_DETECTION = 0xFE, 77 PCD_BCD_STD_DOWNSTREAM_PORT = 0xFD, 78 PCD_BCD_CHARGING_DOWNSTREAM_PORT = 0xFC, 79 PCD_BCD_DEDICATED_CHARGING_PORT = 0xFB, 80 PCD_BCD_DISCOVERY_COMPLETED = 0x00, 81 82 } PCD_BCD_MsgTypeDef; 83 84 #if defined (USB) 85 86 #endif /* defined (USB) */ 87 #if defined (USB_OTG_FS) 88 typedef USB_OTG_GlobalTypeDef PCD_TypeDef; 89 typedef USB_OTG_CfgTypeDef PCD_InitTypeDef; 90 typedef USB_OTG_EPTypeDef PCD_EPTypeDef; 91 #endif /* defined (USB_OTG_FS) */ 92 #if defined (USB) 93 typedef USB_TypeDef PCD_TypeDef; 94 typedef USB_CfgTypeDef PCD_InitTypeDef; 95 typedef USB_EPTypeDef PCD_EPTypeDef; 96 #endif /* defined (USB) */ 97 98 /** 99 * @brief PCD Handle Structure definition 100 */ 101 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) 102 typedef struct __PCD_HandleTypeDef 103 #else 104 typedef struct 105 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ 106 { 107 PCD_TypeDef *Instance; /*!< Register base address */ 108 PCD_InitTypeDef Init; /*!< PCD required parameters */ 109 __IO uint8_t USB_Address; /*!< USB Address */ 110 #if defined (USB_OTG_FS) 111 PCD_EPTypeDef IN_ep[16]; /*!< IN endpoint parameters */ 112 PCD_EPTypeDef OUT_ep[16]; /*!< OUT endpoint parameters */ 113 #endif /* defined (USB_OTG_FS) */ 114 #if defined (USB) 115 PCD_EPTypeDef IN_ep[8]; /*!< IN endpoint parameters */ 116 PCD_EPTypeDef OUT_ep[8]; /*!< OUT endpoint parameters */ 117 #endif /* defined (USB) */ 118 HAL_LockTypeDef Lock; /*!< PCD peripheral status */ 119 __IO PCD_StateTypeDef State; /*!< PCD communication state */ 120 __IO uint32_t ErrorCode; /*!< PCD Error code */ 121 uint32_t Setup[12]; /*!< Setup packet buffer */ 122 PCD_LPM_StateTypeDef LPM_State; /*!< LPM State */ 123 uint32_t BESL; 124 125 126 uint32_t lpm_active; /*!< Enable or disable the Link Power Management . 127 This parameter can be set to ENABLE or DISABLE */ 128 129 uint32_t battery_charging_active; /*!< Enable or disable Battery charging. 130 This parameter can be set to ENABLE or DISABLE */ 131 void *pData; /*!< Pointer to upper stack Handler */ 132 133 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) 134 void (* SOFCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD SOF callback */ 135 void (* SetupStageCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Setup Stage callback */ 136 void (* ResetCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Reset callback */ 137 void (* SuspendCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Suspend callback */ 138 void (* ResumeCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Resume callback */ 139 void (* ConnectCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Connect callback */ 140 void (* DisconnectCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Disconnect callback */ 141 142 void (* DataOutStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD Data OUT Stage callback */ 143 void (* DataInStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD Data IN Stage callback */ 144 void (* ISOOUTIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD ISO OUT Incomplete callback */ 145 void (* ISOINIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD ISO IN Incomplete callback */ 146 void (* BCDCallback)(struct __PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg); /*!< USB OTG PCD BCD callback */ 147 void (* LPMCallback)(struct __PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg); /*!< USB OTG PCD LPM callback */ 148 149 void (* MspInitCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Msp Init callback */ 150 void (* MspDeInitCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Msp DeInit callback */ 151 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ 152 } PCD_HandleTypeDef; 153 154 /** 155 * @} 156 */ 157 158 /* Include PCD HAL Extended module */ 159 #include "stm32l4xx_hal_pcd_ex.h" 160 161 /* Exported constants --------------------------------------------------------*/ 162 /** @defgroup PCD_Exported_Constants PCD Exported Constants 163 * @{ 164 */ 165 166 /** @defgroup PCD_Speed PCD Speed 167 * @{ 168 */ 169 #define PCD_SPEED_FULL USBD_FS_SPEED 170 /** 171 * @} 172 */ 173 174 /** @defgroup PCD_PHY_Module PCD PHY Module 175 * @{ 176 */ 177 #define PCD_PHY_ULPI 1U 178 #define PCD_PHY_EMBEDDED 2U 179 #define PCD_PHY_UTMI 3U 180 /** 181 * @} 182 */ 183 184 /** @defgroup PCD_Error_Code_definition PCD Error Code definition 185 * @brief PCD Error Code definition 186 * @{ 187 */ 188 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) 189 #define HAL_PCD_ERROR_INVALID_CALLBACK (0x00000010U) /*!< Invalid Callback error */ 190 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ 191 192 /** 193 * @} 194 */ 195 196 /** 197 * @} 198 */ 199 200 /* Exported macros -----------------------------------------------------------*/ 201 /** @defgroup PCD_Exported_Macros PCD Exported Macros 202 * @brief macros to handle interrupts and specific clock configurations 203 * @{ 204 */ 205 #if defined (USB_OTG_FS) 206 #define __HAL_PCD_ENABLE(__HANDLE__) (void)USB_EnableGlobalInt ((__HANDLE__)->Instance) 207 #define __HAL_PCD_DISABLE(__HANDLE__) (void)USB_DisableGlobalInt ((__HANDLE__)->Instance) 208 209 #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__)) 210 #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->GINTSTS) &= (__INTERRUPT__)) 211 #define __HAL_PCD_IS_INVALID_INTERRUPT(__HANDLE__) (USB_ReadInterrupts((__HANDLE__)->Instance) == 0U) 212 213 214 #define __HAL_PCD_UNGATE_PHYCLOCK(__HANDLE__) *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) &= \ 215 ~(USB_OTG_PCGCCTL_STOPCLK) 216 217 #define __HAL_PCD_GATE_PHYCLOCK(__HANDLE__) *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) |= USB_OTG_PCGCCTL_STOPCLK 218 219 #define __HAL_PCD_IS_PHY_SUSPENDED(__HANDLE__) ((*(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE)) & 0x10U) 220 221 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR1 |= USB_OTG_FS_WAKEUP_EXTI_LINE 222 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR1 &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE) 223 #endif /* defined (USB_OTG_FS) */ 224 225 #if defined (USB) 226 #define __HAL_PCD_ENABLE(__HANDLE__) (void)USB_EnableGlobalInt ((__HANDLE__)->Instance) 227 #define __HAL_PCD_DISABLE(__HANDLE__) (void)USB_DisableGlobalInt ((__HANDLE__)->Instance) 228 #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__)) 229 #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->ISTR) &= (uint16_t)(~(__INTERRUPT__))) 230 231 #define __HAL_USB_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR1 |= USB_WAKEUP_EXTI_LINE 232 #define __HAL_USB_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR1 &= ~(USB_WAKEUP_EXTI_LINE) 233 #endif /* defined (USB) */ 234 235 /** 236 * @} 237 */ 238 239 /* Exported functions --------------------------------------------------------*/ 240 /** @addtogroup PCD_Exported_Functions PCD Exported Functions 241 * @{ 242 */ 243 244 /* Initialization/de-initialization functions ********************************/ 245 /** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions 246 * @{ 247 */ 248 HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd); 249 HAL_StatusTypeDef HAL_PCD_DeInit(PCD_HandleTypeDef *hpcd); 250 void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd); 251 void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd); 252 253 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) 254 /** @defgroup HAL_PCD_Callback_ID_enumeration_definition HAL USB OTG PCD Callback ID enumeration definition 255 * @brief HAL USB OTG PCD Callback ID enumeration definition 256 * @{ 257 */ 258 typedef enum 259 { 260 HAL_PCD_SOF_CB_ID = 0x01, /*!< USB PCD SOF callback ID */ 261 HAL_PCD_SETUPSTAGE_CB_ID = 0x02, /*!< USB PCD Setup Stage callback ID */ 262 HAL_PCD_RESET_CB_ID = 0x03, /*!< USB PCD Reset callback ID */ 263 HAL_PCD_SUSPEND_CB_ID = 0x04, /*!< USB PCD Suspend callback ID */ 264 HAL_PCD_RESUME_CB_ID = 0x05, /*!< USB PCD Resume callback ID */ 265 HAL_PCD_CONNECT_CB_ID = 0x06, /*!< USB PCD Connect callback ID */ 266 HAL_PCD_DISCONNECT_CB_ID = 0x07, /*!< USB PCD Disconnect callback ID */ 267 268 HAL_PCD_MSPINIT_CB_ID = 0x08, /*!< USB PCD MspInit callback ID */ 269 HAL_PCD_MSPDEINIT_CB_ID = 0x09 /*!< USB PCD MspDeInit callback ID */ 270 271 } HAL_PCD_CallbackIDTypeDef; 272 /** 273 * @} 274 */ 275 276 /** @defgroup HAL_PCD_Callback_pointer_definition HAL USB OTG PCD Callback pointer definition 277 * @brief HAL USB OTG PCD Callback pointer definition 278 * @{ 279 */ 280 281 typedef void (*pPCD_CallbackTypeDef)(PCD_HandleTypeDef *hpcd); /*!< pointer to a common USB OTG PCD callback function */ 282 typedef void (*pPCD_DataOutStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD Data OUT Stage callback */ 283 typedef void (*pPCD_DataInStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD Data IN Stage callback */ 284 typedef void (*pPCD_IsoOutIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD ISO OUT Incomplete callback */ 285 typedef void (*pPCD_IsoInIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD ISO IN Incomplete callback */ 286 typedef void (*pPCD_LpmCallbackTypeDef)(PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg); /*!< pointer to USB OTG PCD LPM callback */ 287 typedef void (*pPCD_BcdCallbackTypeDef)(PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg); /*!< pointer to USB OTG PCD BCD callback */ 288 289 /** 290 * @} 291 */ 292 293 HAL_StatusTypeDef HAL_PCD_RegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID, pPCD_CallbackTypeDef pCallback); 294 HAL_StatusTypeDef HAL_PCD_UnRegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID); 295 296 HAL_StatusTypeDef HAL_PCD_RegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd, pPCD_DataOutStageCallbackTypeDef pCallback); 297 HAL_StatusTypeDef HAL_PCD_UnRegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd); 298 299 HAL_StatusTypeDef HAL_PCD_RegisterDataInStageCallback(PCD_HandleTypeDef *hpcd, pPCD_DataInStageCallbackTypeDef pCallback); 300 HAL_StatusTypeDef HAL_PCD_UnRegisterDataInStageCallback(PCD_HandleTypeDef *hpcd); 301 302 HAL_StatusTypeDef HAL_PCD_RegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd, pPCD_IsoOutIncpltCallbackTypeDef pCallback); 303 HAL_StatusTypeDef HAL_PCD_UnRegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd); 304 305 HAL_StatusTypeDef HAL_PCD_RegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd, pPCD_IsoInIncpltCallbackTypeDef pCallback); 306 HAL_StatusTypeDef HAL_PCD_UnRegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd); 307 308 HAL_StatusTypeDef HAL_PCD_RegisterBcdCallback(PCD_HandleTypeDef *hpcd, pPCD_BcdCallbackTypeDef pCallback); 309 HAL_StatusTypeDef HAL_PCD_UnRegisterBcdCallback(PCD_HandleTypeDef *hpcd); 310 311 HAL_StatusTypeDef HAL_PCD_RegisterLpmCallback(PCD_HandleTypeDef *hpcd, pPCD_LpmCallbackTypeDef pCallback); 312 HAL_StatusTypeDef HAL_PCD_UnRegisterLpmCallback(PCD_HandleTypeDef *hpcd); 313 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ 314 /** 315 * @} 316 */ 317 318 /* I/O operation functions ***************************************************/ 319 /* Non-Blocking mode: Interrupt */ 320 /** @addtogroup PCD_Exported_Functions_Group2 Input and Output operation functions 321 * @{ 322 */ 323 HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd); 324 HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd); 325 void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd); 326 327 void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd); 328 void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd); 329 void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd); 330 void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd); 331 void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd); 332 void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd); 333 void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd); 334 335 void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); 336 void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); 337 void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); 338 void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); 339 /** 340 * @} 341 */ 342 343 /* Peripheral Control functions **********************************************/ 344 /** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions 345 * @{ 346 */ 347 HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd); 348 HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd); 349 HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address); 350 HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type); 351 HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); 352 HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len); 353 HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len); 354 uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); 355 HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); 356 HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); 357 HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); 358 HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd); 359 HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd); 360 /** 361 * @} 362 */ 363 364 /* Peripheral State functions ************************************************/ 365 /** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions 366 * @{ 367 */ 368 PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd); 369 /** 370 * @} 371 */ 372 373 /** 374 * @} 375 */ 376 377 /* Private constants ---------------------------------------------------------*/ 378 /** @defgroup PCD_Private_Constants PCD Private Constants 379 * @{ 380 */ 381 /** @defgroup USB_EXTI_Line_Interrupt USB EXTI line interrupt 382 * @{ 383 */ 384 #if defined (USB_OTG_FS) 385 #define USB_OTG_FS_WAKEUP_EXTI_RISING_EDGE 0x08U 386 #define USB_OTG_FS_WAKEUP_EXTI_FALLING_EDGE 0x0CU 387 #define USB_OTG_FS_WAKEUP_EXTI_RISING_FALLING_EDGE 0x10U 388 389 #define USB_OTG_FS_WAKEUP_EXTI_LINE (0x1U << 17) /*!< USB FS EXTI Line WakeUp Interrupt */ 390 #endif /* defined (USB_OTG_FS) */ 391 392 #if defined (USB) 393 #define USB_WAKEUP_EXTI_LINE (0x1U << 17) /*!< USB FS EXTI Line WakeUp Interrupt */ 394 #endif /* defined (USB) */ 395 396 /** 397 * @} 398 */ 399 #if defined (USB) 400 /** @defgroup PCD_EP0_MPS PCD EP0 MPS 401 * @{ 402 */ 403 #define PCD_EP0MPS_64 DEP0CTL_MPS_64 404 #define PCD_EP0MPS_32 DEP0CTL_MPS_32 405 #define PCD_EP0MPS_16 DEP0CTL_MPS_16 406 #define PCD_EP0MPS_08 DEP0CTL_MPS_8 407 /** 408 * @} 409 */ 410 411 /** @defgroup PCD_ENDP PCD ENDP 412 * @{ 413 */ 414 #define PCD_ENDP0 0U 415 #define PCD_ENDP1 1U 416 #define PCD_ENDP2 2U 417 #define PCD_ENDP3 3U 418 #define PCD_ENDP4 4U 419 #define PCD_ENDP5 5U 420 #define PCD_ENDP6 6U 421 #define PCD_ENDP7 7U 422 /** 423 * @} 424 */ 425 426 /** @defgroup PCD_ENDP_Kind PCD Endpoint Kind 427 * @{ 428 */ 429 #define PCD_SNG_BUF 0U 430 #define PCD_DBL_BUF 1U 431 /** 432 * @} 433 */ 434 #endif /* defined (USB) */ 435 /** 436 * @} 437 */ 438 439 #if defined (USB_OTG_FS) 440 #ifndef USB_OTG_DOEPINT_OTEPSPR 441 #define USB_OTG_DOEPINT_OTEPSPR (0x1UL << 5) /*!< Status Phase Received interrupt */ 442 #endif 443 444 #ifndef USB_OTG_DOEPMSK_OTEPSPRM 445 #define USB_OTG_DOEPMSK_OTEPSPRM (0x1UL << 5) /*!< Setup Packet Received interrupt mask */ 446 #endif 447 448 #ifndef USB_OTG_DOEPINT_NAK 449 #define USB_OTG_DOEPINT_NAK (0x1UL << 13) /*!< NAK interrupt */ 450 #endif 451 452 #ifndef USB_OTG_DOEPMSK_NAKM 453 #define USB_OTG_DOEPMSK_NAKM (0x1UL << 13) /*!< OUT Packet NAK interrupt mask */ 454 #endif 455 456 #ifndef USB_OTG_DOEPINT_STPKTRX 457 #define USB_OTG_DOEPINT_STPKTRX (0x1UL << 15) /*!< Setup Packet Received interrupt */ 458 #endif 459 460 #ifndef USB_OTG_DOEPMSK_NYETM 461 #define USB_OTG_DOEPMSK_NYETM (0x1UL << 14) /*!< Setup Packet Received interrupt mask */ 462 #endif 463 #endif /* defined (USB_OTG_FS) */ 464 465 /* Private macros ------------------------------------------------------------*/ 466 /** @defgroup PCD_Private_Macros PCD Private Macros 467 * @{ 468 */ 469 #if defined (USB) 470 /******************** Bit definition for USB_COUNTn_RX register *************/ 471 #define USB_CNTRX_NBLK_MSK (0x1FU << 10) 472 #define USB_CNTRX_BLSIZE (0x1U << 15) 473 474 /* SetENDPOINT */ 475 #define PCD_SET_ENDPOINT(USBx, bEpNum, wRegValue) (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U)) = (uint16_t)(wRegValue)) 476 477 /* GetENDPOINT */ 478 #define PCD_GET_ENDPOINT(USBx, bEpNum) (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U))) 479 480 /* ENDPOINT transfer */ 481 #define USB_EP0StartXfer USB_EPStartXfer 482 483 /** 484 * @brief sets the type in the endpoint register(bits EP_TYPE[1:0]) 485 * @param USBx USB peripheral instance register address. 486 * @param bEpNum Endpoint Number. 487 * @param wType Endpoint Type. 488 * @retval None 489 */ 490 #define PCD_SET_EPTYPE(USBx, bEpNum, wType) (PCD_SET_ENDPOINT((USBx), (bEpNum), \ 491 ((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_MASK) | (wType) | USB_EP_CTR_TX | USB_EP_CTR_RX))) 492 493 /** 494 * @brief gets the type in the endpoint register(bits EP_TYPE[1:0]) 495 * @param USBx USB peripheral instance register address. 496 * @param bEpNum Endpoint Number. 497 * @retval Endpoint Type 498 */ 499 #define PCD_GET_EPTYPE(USBx, bEpNum) (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_FIELD) 500 501 /** 502 * @brief free buffer used from the application realizing it to the line 503 * toggles bit SW_BUF in the double buffered endpoint register 504 * @param USBx USB device. 505 * @param bEpNum, bDir 506 * @retval None 507 */ 508 #define PCD_FreeUserBuffer(USBx, bEpNum, bDir) do { \ 509 if ((bDir) == 0U) \ 510 { \ 511 /* OUT double buffered endpoint */ \ 512 PCD_TX_DTOG((USBx), (bEpNum)); \ 513 } \ 514 else if ((bDir) == 1U) \ 515 { \ 516 /* IN double buffered endpoint */ \ 517 PCD_RX_DTOG((USBx), (bEpNum)); \ 518 } \ 519 } while(0) 520 521 /** 522 * @brief sets the status for tx transfer (bits STAT_TX[1:0]). 523 * @param USBx USB peripheral instance register address. 524 * @param bEpNum Endpoint Number. 525 * @param wState new state 526 * @retval None 527 */ 528 #define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) do { \ 529 register uint16_t _wRegVal; \ 530 \ 531 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_DTOGMASK; \ 532 /* toggle first bit ? */ \ 533 if ((USB_EPTX_DTOG1 & (wState))!= 0U) \ 534 { \ 535 _wRegVal ^= USB_EPTX_DTOG1; \ 536 } \ 537 /* toggle second bit ? */ \ 538 if ((USB_EPTX_DTOG2 & (wState))!= 0U) \ 539 { \ 540 _wRegVal ^= USB_EPTX_DTOG2; \ 541 } \ 542 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ 543 } while(0) /* PCD_SET_EP_TX_STATUS */ 544 545 /** 546 * @brief sets the status for rx transfer (bits STAT_TX[1:0]) 547 * @param USBx USB peripheral instance register address. 548 * @param bEpNum Endpoint Number. 549 * @param wState new state 550 * @retval None 551 */ 552 #define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) do { \ 553 register uint16_t _wRegVal; \ 554 \ 555 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_DTOGMASK; \ 556 /* toggle first bit ? */ \ 557 if ((USB_EPRX_DTOG1 & (wState))!= 0U) \ 558 { \ 559 _wRegVal ^= USB_EPRX_DTOG1; \ 560 } \ 561 /* toggle second bit ? */ \ 562 if ((USB_EPRX_DTOG2 & (wState))!= 0U) \ 563 { \ 564 _wRegVal ^= USB_EPRX_DTOG2; \ 565 } \ 566 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ 567 } while(0) /* PCD_SET_EP_RX_STATUS */ 568 569 /** 570 * @brief sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0]) 571 * @param USBx USB peripheral instance register address. 572 * @param bEpNum Endpoint Number. 573 * @param wStaterx new state. 574 * @param wStatetx new state. 575 * @retval None 576 */ 577 #define PCD_SET_EP_TXRX_STATUS(USBx, bEpNum, wStaterx, wStatetx) do { \ 578 register uint16_t _wRegVal; \ 579 \ 580 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK | USB_EPTX_STAT); \ 581 /* toggle first bit ? */ \ 582 if ((USB_EPRX_DTOG1 & (wStaterx))!= 0U) \ 583 { \ 584 _wRegVal ^= USB_EPRX_DTOG1; \ 585 } \ 586 /* toggle second bit ? */ \ 587 if ((USB_EPRX_DTOG2 & (wStaterx))!= 0U) \ 588 { \ 589 _wRegVal ^= USB_EPRX_DTOG2; \ 590 } \ 591 /* toggle first bit ? */ \ 592 if ((USB_EPTX_DTOG1 & (wStatetx))!= 0U) \ 593 { \ 594 _wRegVal ^= USB_EPTX_DTOG1; \ 595 } \ 596 /* toggle second bit ? */ \ 597 if ((USB_EPTX_DTOG2 & (wStatetx))!= 0U) \ 598 { \ 599 _wRegVal ^= USB_EPTX_DTOG2; \ 600 } \ 601 \ 602 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ 603 } while(0) /* PCD_SET_EP_TXRX_STATUS */ 604 605 /** 606 * @brief gets the status for tx/rx transfer (bits STAT_TX[1:0] 607 * /STAT_RX[1:0]) 608 * @param USBx USB peripheral instance register address. 609 * @param bEpNum Endpoint Number. 610 * @retval status 611 */ 612 #define PCD_GET_EP_TX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_STAT) 613 #define PCD_GET_EP_RX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_STAT) 614 615 /** 616 * @brief sets directly the VALID tx/rx-status into the endpoint register 617 * @param USBx USB peripheral instance register address. 618 * @param bEpNum Endpoint Number. 619 * @retval None 620 */ 621 #define PCD_SET_EP_TX_VALID(USBx, bEpNum) (PCD_SET_EP_TX_STATUS((USBx), (bEpNum), USB_EP_TX_VALID)) 622 #define PCD_SET_EP_RX_VALID(USBx, bEpNum) (PCD_SET_EP_RX_STATUS((USBx), (bEpNum), USB_EP_RX_VALID)) 623 624 /** 625 * @brief checks stall condition in an endpoint. 626 * @param USBx USB peripheral instance register address. 627 * @param bEpNum Endpoint Number. 628 * @retval TRUE = endpoint in stall condition. 629 */ 630 #define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) \ 631 == USB_EP_TX_STALL) 632 #define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) \ 633 == USB_EP_RX_STALL) 634 635 /** 636 * @brief set & clear EP_KIND bit. 637 * @param USBx USB peripheral instance register address. 638 * @param bEpNum Endpoint Number. 639 * @retval None 640 */ 641 #define PCD_SET_EP_KIND(USBx, bEpNum) do { \ 642 register uint16_t _wRegVal; \ 643 \ 644 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \ 645 \ 646 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_KIND)); \ 647 } while(0) /* PCD_SET_EP_KIND */ 648 649 #define PCD_CLEAR_EP_KIND(USBx, bEpNum) do { \ 650 register uint16_t _wRegVal; \ 651 \ 652 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPKIND_MASK; \ 653 \ 654 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ 655 } while(0) /* PCD_CLEAR_EP_KIND */ 656 657 /** 658 * @brief Sets/clears directly STATUS_OUT bit in the endpoint register. 659 * @param USBx USB peripheral instance register address. 660 * @param bEpNum Endpoint Number. 661 * @retval None 662 */ 663 #define PCD_SET_OUT_STATUS(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum)) 664 #define PCD_CLEAR_OUT_STATUS(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum)) 665 666 /** 667 * @brief Sets/clears directly EP_KIND bit in the endpoint register. 668 * @param USBx USB peripheral instance register address. 669 * @param bEpNum Endpoint Number. 670 * @retval None 671 */ 672 #define PCD_SET_EP_DBUF(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum)) 673 #define PCD_CLEAR_EP_DBUF(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum)) 674 675 /** 676 * @brief Clears bit CTR_RX / CTR_TX in the endpoint register. 677 * @param USBx USB peripheral instance register address. 678 * @param bEpNum Endpoint Number. 679 * @retval None 680 */ 681 #define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) do { \ 682 register uint16_t _wRegVal; \ 683 \ 684 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0x7FFFU & USB_EPREG_MASK); \ 685 \ 686 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_TX)); \ 687 } while(0) /* PCD_CLEAR_RX_EP_CTR */ 688 689 #define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) do { \ 690 register uint16_t _wRegVal; \ 691 \ 692 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0xFF7FU & USB_EPREG_MASK); \ 693 \ 694 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX)); \ 695 } while(0) /* PCD_CLEAR_TX_EP_CTR */ 696 697 /** 698 * @brief Toggles DTOG_RX / DTOG_TX bit in the endpoint register. 699 * @param USBx USB peripheral instance register address. 700 * @param bEpNum Endpoint Number. 701 * @retval None 702 */ 703 #define PCD_RX_DTOG(USBx, bEpNum) do { \ 704 register uint16_t _wEPVal; \ 705 \ 706 _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \ 707 \ 708 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_RX)); \ 709 } while(0) /* PCD_RX_DTOG */ 710 711 #define PCD_TX_DTOG(USBx, bEpNum) do { \ 712 register uint16_t _wEPVal; \ 713 \ 714 _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \ 715 \ 716 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_TX)); \ 717 } while(0) /* PCD_TX_DTOG */ 718 /** 719 * @brief Clears DTOG_RX / DTOG_TX bit in the endpoint register. 720 * @param USBx USB peripheral instance register address. 721 * @param bEpNum Endpoint Number. 722 * @retval None 723 */ 724 #define PCD_CLEAR_RX_DTOG(USBx, bEpNum) do { \ 725 register uint16_t _wRegVal; \ 726 \ 727 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \ 728 \ 729 if ((_wRegVal & USB_EP_DTOG_RX) != 0U)\ 730 { \ 731 PCD_RX_DTOG((USBx), (bEpNum)); \ 732 } \ 733 } while(0) /* PCD_CLEAR_RX_DTOG */ 734 735 #define PCD_CLEAR_TX_DTOG(USBx, bEpNum) do { \ 736 register uint16_t _wRegVal; \ 737 \ 738 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \ 739 \ 740 if ((_wRegVal & USB_EP_DTOG_TX) != 0U)\ 741 { \ 742 PCD_TX_DTOG((USBx), (bEpNum)); \ 743 } \ 744 } while(0) /* PCD_CLEAR_TX_DTOG */ 745 746 /** 747 * @brief Sets address in an endpoint register. 748 * @param USBx USB peripheral instance register address. 749 * @param bEpNum Endpoint Number. 750 * @param bAddr Address. 751 * @retval None 752 */ 753 #define PCD_SET_EP_ADDRESS(USBx, bEpNum, bAddr) do { \ 754 register uint16_t _wRegVal; \ 755 \ 756 _wRegVal = (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK) | (bAddr); \ 757 \ 758 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ 759 } while(0) /* PCD_SET_EP_ADDRESS */ 760 761 /** 762 * @brief Gets address in an endpoint register. 763 * @param USBx USB peripheral instance register address. 764 * @param bEpNum Endpoint Number. 765 * @retval None 766 */ 767 #define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD)) 768 769 #define PCD_EP_TX_CNT(USBx, bEpNum) ((uint16_t *)((((uint32_t)(USBx)->BTABLE + ((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U))) 770 #define PCD_EP_RX_CNT(USBx, bEpNum) ((uint16_t *)((((uint32_t)(USBx)->BTABLE + ((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U))) 771 772 /** 773 * @brief sets address of the tx/rx buffer. 774 * @param USBx USB peripheral instance register address. 775 * @param bEpNum Endpoint Number. 776 * @param wAddr address to be set (must be word aligned). 777 * @retval None 778 */ 779 #define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum, wAddr) do { \ 780 register __IO uint16_t *_wRegVal; \ 781 register uint32_t _wRegBase = (uint32_t)USBx; \ 782 \ 783 _wRegBase += (uint32_t)(USBx)->BTABLE; \ 784 _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + (((uint32_t)(bEpNum) * 8U) * PMA_ACCESS)); \ 785 *_wRegVal = ((wAddr) >> 1) << 1; \ 786 } while(0) /* PCD_SET_EP_TX_ADDRESS */ 787 788 #define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum, wAddr) do { \ 789 register __IO uint16_t *_wRegVal; \ 790 register uint32_t _wRegBase = (uint32_t)USBx; \ 791 \ 792 _wRegBase += (uint32_t)(USBx)->BTABLE; \ 793 _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 4U) * PMA_ACCESS)); \ 794 *_wRegVal = ((wAddr) >> 1) << 1; \ 795 } while(0) /* PCD_SET_EP_RX_ADDRESS */ 796 797 /** 798 * @brief Gets address of the tx/rx buffer. 799 * @param USBx USB peripheral instance register address. 800 * @param bEpNum Endpoint Number. 801 * @retval address of the buffer. 802 */ 803 #define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS((USBx), (bEpNum))) 804 #define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS((USBx), (bEpNum))) 805 806 /** 807 * @brief Sets counter of rx buffer with no. of blocks. 808 * @param pdwReg Register pointer 809 * @param wCount Counter. 810 * @param wNBlocks no. of Blocks. 811 * @retval None 812 */ 813 #define PCD_CALC_BLK32(pdwReg, wCount, wNBlocks) do { \ 814 (wNBlocks) = (wCount) >> 5; \ 815 if (((wCount) & 0x1fU) == 0U) \ 816 { \ 817 (wNBlocks)--; \ 818 } \ 819 *(pdwReg) = (uint16_t)(((wNBlocks) << 10) | USB_CNTRX_BLSIZE); \ 820 } while(0) /* PCD_CALC_BLK32 */ 821 822 #define PCD_CALC_BLK2(pdwReg, wCount, wNBlocks) do { \ 823 (wNBlocks) = (wCount) >> 1; \ 824 if (((wCount) & 0x1U) != 0U) \ 825 { \ 826 (wNBlocks)++; \ 827 } \ 828 *(pdwReg) = (uint16_t)((wNBlocks) << 10); \ 829 } while(0) /* PCD_CALC_BLK2 */ 830 831 #define PCD_SET_EP_CNT_RX_REG(pdwReg, wCount) do { \ 832 uint32_t wNBlocks; \ 833 if ((wCount) == 0U) \ 834 { \ 835 *(pdwReg) &= (uint16_t)~USB_CNTRX_NBLK_MSK; \ 836 *(pdwReg) |= USB_CNTRX_BLSIZE; \ 837 } \ 838 else if((wCount) <= 62U) \ 839 { \ 840 PCD_CALC_BLK2((pdwReg), (wCount), wNBlocks); \ 841 } \ 842 else \ 843 { \ 844 PCD_CALC_BLK32((pdwReg), (wCount), wNBlocks); \ 845 } \ 846 } while(0) /* PCD_SET_EP_CNT_RX_REG */ 847 848 #define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum, wCount) do { \ 849 register uint32_t _wRegBase = (uint32_t)(USBx); \ 850 register __IO uint16_t *pdwReg; \ 851 \ 852 _wRegBase += (uint32_t)(USBx)->BTABLE; \ 853 pdwReg = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \ 854 PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount)); \ 855 } while(0) 856 857 /** 858 * @brief sets counter for the tx/rx buffer. 859 * @param USBx USB peripheral instance register address. 860 * @param bEpNum Endpoint Number. 861 * @param wCount Counter value. 862 * @retval None 863 */ 864 #define PCD_SET_EP_TX_CNT(USBx, bEpNum, wCount) do { \ 865 register uint32_t _wRegBase = (uint32_t)(USBx); \ 866 register __IO uint16_t *_wRegVal; \ 867 \ 868 _wRegBase += (uint32_t)(USBx)->BTABLE; \ 869 _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \ 870 *_wRegVal = (uint16_t)(wCount); \ 871 } while(0) 872 873 #define PCD_SET_EP_RX_CNT(USBx, bEpNum, wCount) do { \ 874 register uint32_t _wRegBase = (uint32_t)(USBx); \ 875 register __IO uint16_t *_wRegVal; \ 876 \ 877 _wRegBase += (uint32_t)(USBx)->BTABLE; \ 878 _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \ 879 PCD_SET_EP_CNT_RX_REG(_wRegVal, (wCount)); \ 880 } while(0) 881 882 /** 883 * @brief gets counter of the tx buffer. 884 * @param USBx USB peripheral instance register address. 885 * @param bEpNum Endpoint Number. 886 * @retval Counter value 887 */ 888 #define PCD_GET_EP_TX_CNT(USBx, bEpNum) ((uint32_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x3ffU) 889 #define PCD_GET_EP_RX_CNT(USBx, bEpNum) ((uint32_t)(*PCD_EP_RX_CNT((USBx), (bEpNum))) & 0x3ffU) 890 891 /** 892 * @brief Sets buffer 0/1 address in a double buffer endpoint. 893 * @param USBx USB peripheral instance register address. 894 * @param bEpNum Endpoint Number. 895 * @param wBuf0Addr buffer 0 address. 896 * @retval Counter value 897 */ 898 #define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum, wBuf0Addr) do { \ 899 PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr)); \ 900 } while(0) /* PCD_SET_EP_DBUF0_ADDR */ 901 #define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum, wBuf1Addr) do { \ 902 PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr)); \ 903 } while(0) /* PCD_SET_EP_DBUF1_ADDR */ 904 905 /** 906 * @brief Sets addresses in a double buffer endpoint. 907 * @param USBx USB peripheral instance register address. 908 * @param bEpNum Endpoint Number. 909 * @param wBuf0Addr: buffer 0 address. 910 * @param wBuf1Addr = buffer 1 address. 911 * @retval None 912 */ 913 #define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum, wBuf0Addr, wBuf1Addr) do { \ 914 PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr)); \ 915 PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr)); \ 916 } while(0) /* PCD_SET_EP_DBUF_ADDR */ 917 918 /** 919 * @brief Gets buffer 0/1 address of a double buffer endpoint. 920 * @param USBx USB peripheral instance register address. 921 * @param bEpNum Endpoint Number. 922 * @retval None 923 */ 924 #define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum) (PCD_GET_EP_TX_ADDRESS((USBx), (bEpNum))) 925 #define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum) (PCD_GET_EP_RX_ADDRESS((USBx), (bEpNum))) 926 927 /** 928 * @brief Gets buffer 0/1 address of a double buffer endpoint. 929 * @param USBx USB peripheral instance register address. 930 * @param bEpNum Endpoint Number. 931 * @param bDir endpoint dir EP_DBUF_OUT = OUT 932 * EP_DBUF_IN = IN 933 * @param wCount: Counter value 934 * @retval None 935 */ 936 #define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) do { \ 937 if ((bDir) == 0U) \ 938 /* OUT endpoint */ \ 939 { \ 940 PCD_SET_EP_RX_DBUF0_CNT((USBx), (bEpNum), (wCount)); \ 941 } \ 942 else \ 943 { \ 944 if ((bDir) == 1U) \ 945 { \ 946 /* IN endpoint */ \ 947 PCD_SET_EP_TX_CNT((USBx), (bEpNum), (wCount)); \ 948 } \ 949 } \ 950 } while(0) /* SetEPDblBuf0Count*/ 951 952 #define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) do { \ 953 register uint32_t _wBase = (uint32_t)(USBx); \ 954 __IO uint16_t *_wEPRegVal; \ 955 \ 956 if ((bDir) == 0U) \ 957 { \ 958 /* OUT endpoint */ \ 959 PCD_SET_EP_RX_CNT((USBx), (bEpNum), (wCount)); \ 960 } \ 961 else \ 962 { \ 963 if ((bDir) == 1U) \ 964 { \ 965 /* IN endpoint */ \ 966 _wBase += (uint32_t)(USBx)->BTABLE; \ 967 _wEPRegVal = (__IO uint16_t *)(_wBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \ 968 *_wEPRegVal = (uint16_t)(wCount); \ 969 } \ 970 } \ 971 } while(0) /* SetEPDblBuf1Count */ 972 973 #define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) do { \ 974 PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)); \ 975 PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)); \ 976 } while(0) /* PCD_SET_EP_DBUF_CNT */ 977 978 /** 979 * @brief Gets buffer 0/1 rx/tx counter for double buffering. 980 * @param USBx USB peripheral instance register address. 981 * @param bEpNum Endpoint Number. 982 * @retval None 983 */ 984 #define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum) (PCD_GET_EP_TX_CNT((USBx), (bEpNum))) 985 #define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum) (PCD_GET_EP_RX_CNT((USBx), (bEpNum))) 986 987 #endif /* defined (USB) */ 988 989 /** 990 * @} 991 */ 992 993 /** 994 * @} 995 */ 996 997 /** 998 * @} 999 */ 1000 #endif /* defined (USB) || defined (USB_OTG_FS) */ 1001 1002 #ifdef __cplusplus 1003 } 1004 #endif 1005 1006 #endif /* STM32L4xx_HAL_PCD_H */ 1007 1008 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 1009