1 /** 2 ****************************************************************************** 3 * @file stm32l4xx_hal_mmc.h 4 * @author MCD Application Team 5 * @brief Header file of MMC HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * <h2><center>© Copyright (c) 2019 STMicroelectronics. 10 * All rights reserved.</center></h2> 11 * 12 * This software component is licensed by ST under BSD 3-Clause license, 13 * the "License"; You may not use this file except in compliance with the 14 * License. You may obtain a copy of the License at: 15 * opensource.org/licenses/BSD-3-Clause 16 * 17 ****************************************************************************** 18 */ 19 20 /* Define to prevent recursive inclusion -------------------------------------*/ 21 #ifndef STM32L4xx_HAL_MMC_H 22 #define STM32L4xx_HAL_MMC_H 23 24 #ifdef __cplusplus 25 extern "C" { 26 #endif 27 28 /* Includes ------------------------------------------------------------------*/ 29 #include "stm32l4xx_ll_sdmmc.h" 30 31 /** @addtogroup STM32L4xx_HAL_Driver 32 * @{ 33 */ 34 35 #if defined(SDMMC1) 36 37 /** @addtogroup MMC 38 * @brief MMC HAL module driver 39 * @{ 40 */ 41 42 /* Exported types ------------------------------------------------------------*/ 43 /** @defgroup MMC_Exported_Types MMC Exported Types 44 * @{ 45 */ 46 47 /** @defgroup MMC_Exported_Types_Group1 MMC State enumeration structure 48 * @{ 49 */ 50 typedef enum 51 { 52 HAL_MMC_STATE_RESET = ((uint32_t)0x00000000U), /*!< MMC not yet initialized or disabled */ 53 HAL_MMC_STATE_READY = ((uint32_t)0x00000001U), /*!< MMC initialized and ready for use */ 54 HAL_MMC_STATE_TIMEOUT = ((uint32_t)0x00000002U), /*!< MMC Timeout state */ 55 HAL_MMC_STATE_BUSY = ((uint32_t)0x00000003U), /*!< MMC process ongoing */ 56 HAL_MMC_STATE_PROGRAMMING = ((uint32_t)0x00000004U), /*!< MMC Programming State */ 57 HAL_MMC_STATE_RECEIVING = ((uint32_t)0x00000005U), /*!< MMC Receinving State */ 58 HAL_MMC_STATE_TRANSFER = ((uint32_t)0x00000006U), /*!< MMC Transfert State */ 59 HAL_MMC_STATE_ERROR = ((uint32_t)0x0000000FU) /*!< MMC is in error state */ 60 }HAL_MMC_StateTypeDef; 61 /** 62 * @} 63 */ 64 65 /** @defgroup MMC_Exported_Types_Group2 MMC Card State enumeration structure 66 * @{ 67 */ 68 typedef uint32_t HAL_MMC_CardStateTypeDef; 69 70 #define HAL_MMC_CARD_READY 0x00000001U /*!< Card state is ready */ 71 #define HAL_MMC_CARD_IDENTIFICATION 0x00000002U /*!< Card is in identification state */ 72 #define HAL_MMC_CARD_STANDBY 0x00000003U /*!< Card is in standby state */ 73 #define HAL_MMC_CARD_TRANSFER 0x00000004U /*!< Card is in transfer state */ 74 #define HAL_MMC_CARD_SENDING 0x00000005U /*!< Card is sending an operation */ 75 #define HAL_MMC_CARD_RECEIVING 0x00000006U /*!< Card is receiving operation information */ 76 #define HAL_MMC_CARD_PROGRAMMING 0x00000007U /*!< Card is in programming state */ 77 #define HAL_MMC_CARD_DISCONNECTED 0x00000008U /*!< Card is disconnected */ 78 #define HAL_MMC_CARD_ERROR 0x000000FFU /*!< Card response Error */ 79 /** 80 * @} 81 */ 82 83 /** @defgroup MMC_Exported_Types_Group3 MMC Handle Structure definition 84 * @{ 85 */ 86 #define MMC_InitTypeDef SDMMC_InitTypeDef 87 #define MMC_TypeDef SDMMC_TypeDef 88 89 /** 90 * @brief MMC Card Information Structure definition 91 */ 92 typedef struct 93 { 94 uint32_t CardType; /*!< Specifies the card Type */ 95 96 uint32_t Class; /*!< Specifies the class of the card class */ 97 98 uint32_t RelCardAdd; /*!< Specifies the Relative Card Address */ 99 100 uint32_t BlockNbr; /*!< Specifies the Card Capacity in blocks */ 101 102 uint32_t BlockSize; /*!< Specifies one block size in bytes */ 103 104 uint32_t LogBlockNbr; /*!< Specifies the Card logical Capacity in blocks */ 105 106 uint32_t LogBlockSize; /*!< Specifies logical block size in bytes */ 107 108 }HAL_MMC_CardInfoTypeDef; 109 110 /** 111 * @brief MMC handle Structure definition 112 */ 113 #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) 114 typedef struct __MMC_HandleTypeDef 115 #else 116 typedef struct 117 #endif /* USE_HAL_MMC_REGISTER_CALLBACKS */ 118 { 119 MMC_TypeDef *Instance; /*!< MMC registers base address */ 120 121 MMC_InitTypeDef Init; /*!< MMC required parameters */ 122 123 HAL_LockTypeDef Lock; /*!< MMC locking object */ 124 125 uint8_t *pTxBuffPtr; /*!< Pointer to MMC Tx transfer Buffer */ 126 127 uint32_t TxXferSize; /*!< MMC Tx Transfer size */ 128 129 uint8_t *pRxBuffPtr; /*!< Pointer to MMC Rx transfer Buffer */ 130 131 uint32_t RxXferSize; /*!< MMC Rx Transfer size */ 132 133 __IO uint32_t Context; /*!< MMC transfer context */ 134 135 __IO HAL_MMC_StateTypeDef State; /*!< MMC card State */ 136 137 __IO uint32_t ErrorCode; /*!< MMC Card Error codes */ 138 139 #if !defined(STM32L4P5xx) && !defined(STM32L4Q5xx) && !defined(STM32L4R5xx) && !defined(STM32L4R7xx) && !defined(STM32L4R9xx) && !defined(STM32L4S5xx) && !defined(STM32L4S7xx) && !defined(STM32L4S9xx) 140 DMA_HandleTypeDef *hdmarx; /*!< MMC Rx DMA handle parameters */ 141 142 DMA_HandleTypeDef *hdmatx; /*!< MMC Tx DMA handle parameters */ 143 #endif /* !STM32L4P5xx && !STM32L4Q5xx && !STM32L4R5xx && !STM32L4R7xx && !STM32L4R9xx && !STM32L4S5xx && !STM32L4S7xx && !STM32L4S9xx */ 144 145 HAL_MMC_CardInfoTypeDef MmcCard; /*!< MMC Card information */ 146 147 uint32_t CSD[4U]; /*!< MMC card specific data table */ 148 149 uint32_t CID[4U]; /*!< MMC card identification number table */ 150 151 uint32_t Ext_CSD[128]; 152 153 #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) 154 void (* TxCpltCallback) (struct __MMC_HandleTypeDef *hmmc); 155 void (* RxCpltCallback) (struct __MMC_HandleTypeDef *hmmc); 156 void (* ErrorCallback) (struct __MMC_HandleTypeDef *hmmc); 157 void (* AbortCpltCallback) (struct __MMC_HandleTypeDef *hmmc); 158 #if defined(STM32L4P5xx) || defined(STM32L4Q5xx) || defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) 159 void (* Read_DMADblBuf0CpltCallback) (struct __MMC_HandleTypeDef *hmmc); 160 void (* Read_DMADblBuf1CpltCallback) (struct __MMC_HandleTypeDef *hmmc); 161 void (* Write_DMADblBuf0CpltCallback) (struct __MMC_HandleTypeDef *hmmc); 162 void (* Write_DMADblBuf1CpltCallback) (struct __MMC_HandleTypeDef *hmmc); 163 #endif 164 165 void (* MspInitCallback) (struct __MMC_HandleTypeDef *hmmc); 166 void (* MspDeInitCallback) (struct __MMC_HandleTypeDef *hmmc); 167 #endif 168 }MMC_HandleTypeDef; 169 170 171 /** 172 * @} 173 */ 174 175 /** @defgroup MMC_Exported_Types_Group4 Card Specific Data: CSD Register 176 * @{ 177 */ 178 typedef struct 179 { 180 __IO uint8_t CSDStruct; /*!< CSD structure */ 181 __IO uint8_t SysSpecVersion; /*!< System specification version */ 182 __IO uint8_t Reserved1; /*!< Reserved */ 183 __IO uint8_t TAAC; /*!< Data read access time 1 */ 184 __IO uint8_t NSAC; /*!< Data read access time 2 in CLK cycles */ 185 __IO uint8_t MaxBusClkFrec; /*!< Max. bus clock frequency */ 186 __IO uint16_t CardComdClasses; /*!< Card command classes */ 187 __IO uint8_t RdBlockLen; /*!< Max. read data block length */ 188 __IO uint8_t PartBlockRead; /*!< Partial blocks for read allowed */ 189 __IO uint8_t WrBlockMisalign; /*!< Write block misalignment */ 190 __IO uint8_t RdBlockMisalign; /*!< Read block misalignment */ 191 __IO uint8_t DSRImpl; /*!< DSR implemented */ 192 __IO uint8_t Reserved2; /*!< Reserved */ 193 __IO uint32_t DeviceSize; /*!< Device Size */ 194 __IO uint8_t MaxRdCurrentVDDMin; /*!< Max. read current @ VDD min */ 195 __IO uint8_t MaxRdCurrentVDDMax; /*!< Max. read current @ VDD max */ 196 __IO uint8_t MaxWrCurrentVDDMin; /*!< Max. write current @ VDD min */ 197 __IO uint8_t MaxWrCurrentVDDMax; /*!< Max. write current @ VDD max */ 198 __IO uint8_t DeviceSizeMul; /*!< Device size multiplier */ 199 __IO uint8_t EraseGrSize; /*!< Erase group size */ 200 __IO uint8_t EraseGrMul; /*!< Erase group size multiplier */ 201 __IO uint8_t WrProtectGrSize; /*!< Write protect group size */ 202 __IO uint8_t WrProtectGrEnable; /*!< Write protect group enable */ 203 __IO uint8_t ManDeflECC; /*!< Manufacturer default ECC */ 204 __IO uint8_t WrSpeedFact; /*!< Write speed factor */ 205 __IO uint8_t MaxWrBlockLen; /*!< Max. write data block length */ 206 __IO uint8_t WriteBlockPaPartial; /*!< Partial blocks for write allowed */ 207 __IO uint8_t Reserved3; /*!< Reserved */ 208 __IO uint8_t ContentProtectAppli; /*!< Content protection application */ 209 __IO uint8_t FileFormatGroup; /*!< File format group */ 210 __IO uint8_t CopyFlag; /*!< Copy flag (OTP) */ 211 __IO uint8_t PermWrProtect; /*!< Permanent write protection */ 212 __IO uint8_t TempWrProtect; /*!< Temporary write protection */ 213 __IO uint8_t FileFormat; /*!< File format */ 214 __IO uint8_t ECC; /*!< ECC code */ 215 __IO uint8_t CSD_CRC; /*!< CSD CRC */ 216 __IO uint8_t Reserved4; /*!< Always 1 */ 217 218 }HAL_MMC_CardCSDTypeDef; 219 /** 220 * @} 221 */ 222 223 /** @defgroup MMC_Exported_Types_Group5 Card Identification Data: CID Register 224 * @{ 225 */ 226 typedef struct 227 { 228 __IO uint8_t ManufacturerID; /*!< Manufacturer ID */ 229 __IO uint16_t OEM_AppliID; /*!< OEM/Application ID */ 230 __IO uint32_t ProdName1; /*!< Product Name part1 */ 231 __IO uint8_t ProdName2; /*!< Product Name part2 */ 232 __IO uint8_t ProdRev; /*!< Product Revision */ 233 __IO uint32_t ProdSN; /*!< Product Serial Number */ 234 __IO uint8_t Reserved1; /*!< Reserved1 */ 235 __IO uint16_t ManufactDate; /*!< Manufacturing Date */ 236 __IO uint8_t CID_CRC; /*!< CID CRC */ 237 __IO uint8_t Reserved2; /*!< Always 1 */ 238 239 }HAL_MMC_CardCIDTypeDef; 240 /** 241 * @} 242 */ 243 244 #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) 245 /** @defgroup MMC_Exported_Types_Group6 MMC Callback ID enumeration definition 246 * @{ 247 */ 248 typedef enum 249 { 250 HAL_MMC_TX_CPLT_CB_ID = 0x00U, /*!< MMC Tx Complete Callback ID */ 251 HAL_MMC_RX_CPLT_CB_ID = 0x01U, /*!< MMC Rx Complete Callback ID */ 252 HAL_MMC_ERROR_CB_ID = 0x02U, /*!< MMC Error Callback ID */ 253 HAL_MMC_ABORT_CB_ID = 0x03U, /*!< MMC Abort Callback ID */ 254 #if defined(STM32L4P5xx) || defined(STM32L4Q5xx) || defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) 255 HAL_MMC_READ_DMA_DBL_BUF0_CPLT_CB_ID = 0x04U, /*!< MMC Rx DMA Double Buffer 0 Complete Callback ID */ 256 HAL_MMC_READ_DMA_DBL_BUF1_CPLT_CB_ID = 0x05U, /*!< MMC Rx DMA Double Buffer 1 Complete Callback ID */ 257 HAL_MMC_WRITE_DMA_DBL_BUF0_CPLT_CB_ID = 0x06U, /*!< MMC Tx DMA Double Buffer 0 Complete Callback ID */ 258 HAL_MMC_WRITE_DMA_DBL_BUF1_CPLT_CB_ID = 0x07U, /*!< MMC Tx DMA Double Buffer 1 Complete Callback ID */ 259 #endif 260 261 HAL_MMC_MSP_INIT_CB_ID = 0x10U, /*!< MMC MspInit Callback ID */ 262 HAL_MMC_MSP_DEINIT_CB_ID = 0x11U /*!< MMC MspDeInit Callback ID */ 263 }HAL_MMC_CallbackIDTypeDef; 264 /** 265 * @} 266 */ 267 268 /** @defgroup MMC_Exported_Types_Group7 MMC Callback pointer definition 269 * @{ 270 */ 271 typedef void (*pMMC_CallbackTypeDef) (MMC_HandleTypeDef *hmmc); 272 /** 273 * @} 274 */ 275 #endif 276 /** 277 * @} 278 */ 279 280 /* Exported constants --------------------------------------------------------*/ 281 /** @defgroup MMC_Exported_Constants Exported Constants 282 * @{ 283 */ 284 285 #define MMC_BLOCKSIZE ((uint32_t)512U) /*!< Block size is 512 bytes */ 286 287 /** @defgroup MMC_Exported_Constansts_Group1 MMC Error status enumeration Structure definition 288 * @{ 289 */ 290 #define HAL_MMC_ERROR_NONE SDMMC_ERROR_NONE /*!< No error */ 291 #define HAL_MMC_ERROR_CMD_CRC_FAIL SDMMC_ERROR_CMD_CRC_FAIL /*!< Command response received (but CRC check failed) */ 292 #define HAL_MMC_ERROR_DATA_CRC_FAIL SDMMC_ERROR_DATA_CRC_FAIL /*!< Data block sent/received (CRC check failed) */ 293 #define HAL_MMC_ERROR_CMD_RSP_TIMEOUT SDMMC_ERROR_CMD_RSP_TIMEOUT /*!< Command response timeout */ 294 #define HAL_MMC_ERROR_DATA_TIMEOUT SDMMC_ERROR_DATA_TIMEOUT /*!< Data timeout */ 295 #define HAL_MMC_ERROR_TX_UNDERRUN SDMMC_ERROR_TX_UNDERRUN /*!< Transmit FIFO underrun */ 296 #define HAL_MMC_ERROR_RX_OVERRUN SDMMC_ERROR_RX_OVERRUN /*!< Receive FIFO overrun */ 297 #define HAL_MMC_ERROR_ADDR_MISALIGNED SDMMC_ERROR_ADDR_MISALIGNED /*!< Misaligned address */ 298 #define HAL_MMC_ERROR_BLOCK_LEN_ERR SDMMC_ERROR_BLOCK_LEN_ERR /*!< Transferred block length is not allowed for the card or the 299 number of transferred bytes does not match the block length */ 300 #define HAL_MMC_ERROR_ERASE_SEQ_ERR SDMMC_ERROR_ERASE_SEQ_ERR /*!< An error in the sequence of erase command occurs */ 301 #define HAL_MMC_ERROR_BAD_ERASE_PARAM SDMMC_ERROR_BAD_ERASE_PARAM /*!< An invalid selection for erase groups */ 302 #define HAL_MMC_ERROR_WRITE_PROT_VIOLATION SDMMC_ERROR_WRITE_PROT_VIOLATION /*!< Attempt to program a write protect block */ 303 #define HAL_MMC_ERROR_LOCK_UNLOCK_FAILED SDMMC_ERROR_LOCK_UNLOCK_FAILED /*!< Sequence or password error has been detected in unlock 304 command or if there was an attempt to access a locked card */ 305 #define HAL_MMC_ERROR_COM_CRC_FAILED SDMMC_ERROR_COM_CRC_FAILED /*!< CRC check of the previous command failed */ 306 #define HAL_MMC_ERROR_ILLEGAL_CMD SDMMC_ERROR_ILLEGAL_CMD /*!< Command is not legal for the card state */ 307 #define HAL_MMC_ERROR_CARD_ECC_FAILED SDMMC_ERROR_CARD_ECC_FAILED /*!< Card internal ECC was applied but failed to correct the data */ 308 #define HAL_MMC_ERROR_CC_ERR SDMMC_ERROR_CC_ERR /*!< Internal card controller error */ 309 #define HAL_MMC_ERROR_GENERAL_UNKNOWN_ERR SDMMC_ERROR_GENERAL_UNKNOWN_ERR /*!< General or unknown error */ 310 #define HAL_MMC_ERROR_STREAM_READ_UNDERRUN SDMMC_ERROR_STREAM_READ_UNDERRUN /*!< The card could not sustain data reading in stream rmode */ 311 #define HAL_MMC_ERROR_STREAM_WRITE_OVERRUN SDMMC_ERROR_STREAM_WRITE_OVERRUN /*!< The card could not sustain data programming in stream mode */ 312 #define HAL_MMC_ERROR_CID_CSD_OVERWRITE SDMMC_ERROR_CID_CSD_OVERWRITE /*!< CID/CSD overwrite error */ 313 #define HAL_MMC_ERROR_WP_ERASE_SKIP SDMMC_ERROR_WP_ERASE_SKIP /*!< Only partial address space was erased */ 314 #define HAL_MMC_ERROR_CARD_ECC_DISABLED SDMMC_ERROR_CARD_ECC_DISABLED /*!< Command has been executed without using internal ECC */ 315 #define HAL_MMC_ERROR_ERASE_RESET SDMMC_ERROR_ERASE_RESET /*!< Erase sequence was cleared before executing because an out 316 of erase sequence command was received */ 317 #define HAL_MMC_ERROR_AKE_SEQ_ERR SDMMC_ERROR_AKE_SEQ_ERR /*!< Error in sequence of authentication */ 318 #define HAL_MMC_ERROR_INVALID_VOLTRANGE SDMMC_ERROR_INVALID_VOLTRANGE /*!< Error in case of invalid voltage range */ 319 #define HAL_MMC_ERROR_ADDR_OUT_OF_RANGE SDMMC_ERROR_ADDR_OUT_OF_RANGE /*!< Error when addressed block is out of range */ 320 #define HAL_MMC_ERROR_REQUEST_NOT_APPLICABLE SDMMC_ERROR_REQUEST_NOT_APPLICABLE /*!< Error when command request is not applicable */ 321 #define HAL_MMC_ERROR_PARAM SDMMC_ERROR_INVALID_PARAMETER /*!< the used parameter is not valid */ 322 #define HAL_MMC_ERROR_UNSUPPORTED_FEATURE SDMMC_ERROR_UNSUPPORTED_FEATURE /*!< Error when feature is not insupported */ 323 #define HAL_MMC_ERROR_BUSY SDMMC_ERROR_BUSY /*!< Error when transfer process is busy */ 324 #define HAL_MMC_ERROR_DMA SDMMC_ERROR_DMA /*!< Error while DMA transfer */ 325 #define HAL_MMC_ERROR_TIMEOUT SDMMC_ERROR_TIMEOUT /*!< Timeout error */ 326 327 #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) 328 #define HAL_MMC_ERROR_INVALID_CALLBACK SDMMC_ERROR_INVALID_PARAMETER /*!< Invalid callback error */ 329 #endif 330 /** 331 * @} 332 */ 333 334 /** @defgroup MMC_Exported_Constansts_Group2 MMC context enumeration 335 * @{ 336 */ 337 #define MMC_CONTEXT_NONE ((uint32_t)0x00000000U) /*!< None */ 338 #define MMC_CONTEXT_READ_SINGLE_BLOCK ((uint32_t)0x00000001U) /*!< Read single block operation */ 339 #define MMC_CONTEXT_READ_MULTIPLE_BLOCK ((uint32_t)0x00000002U) /*!< Read multiple blocks operation */ 340 #define MMC_CONTEXT_WRITE_SINGLE_BLOCK ((uint32_t)0x00000010U) /*!< Write single block operation */ 341 #define MMC_CONTEXT_WRITE_MULTIPLE_BLOCK ((uint32_t)0x00000020U) /*!< Write multiple blocks operation */ 342 #define MMC_CONTEXT_IT ((uint32_t)0x00000008U) /*!< Process in Interrupt mode */ 343 #define MMC_CONTEXT_DMA ((uint32_t)0x00000080U) /*!< Process in DMA mode */ 344 345 /** 346 * @} 347 */ 348 349 /** @defgroup MMC_Exported_Constansts_Group3 MMC Voltage mode 350 * @{ 351 */ 352 /** 353 * @brief 354 */ 355 #define MMC_HIGH_VOLTAGE_RANGE 0x80FF8000U /*!< VALUE OF ARGUMENT */ 356 #define MMC_DUAL_VOLTAGE_RANGE 0x80FF8080U /*!< VALUE OF ARGUMENT */ 357 #define eMMC_HIGH_VOLTAGE_RANGE 0xC0FF8000U /*!< for eMMC > 2Gb sector mode */ 358 #define eMMC_DUAL_VOLTAGE_RANGE 0xC0FF8080U /*!< for eMMC > 2Gb sector mode */ 359 #define MMC_INVALID_VOLTAGE_RANGE 0x0001FF01U 360 /** 361 * @} 362 */ 363 364 /** @defgroup MMC_Exported_Constansts_Group4 MMC Memory Cards 365 * @{ 366 */ 367 #define MMC_LOW_CAPACITY_CARD ((uint32_t)0x00000000U) /*!< MMC Card Capacity <=2Gbytes */ 368 #define MMC_HIGH_CAPACITY_CARD ((uint32_t)0x00000001U) /*!< MMC Card Capacity >2Gbytes and <2Tbytes */ 369 370 /** 371 * @} 372 */ 373 374 /** 375 * @} 376 */ 377 378 /* Exported macro ------------------------------------------------------------*/ 379 /** @defgroup MMC_Exported_macros MMC Exported Macros 380 * @brief macros to handle interrupts and specific clock configurations 381 * @{ 382 */ 383 /** @brief Reset MMC handle state. 384 * @param __HANDLE__ : MMC handle. 385 * @retval None 386 */ 387 #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) 388 #define __HAL_MMC_RESET_HANDLE_STATE(__HANDLE__) do { \ 389 (__HANDLE__)->State = HAL_MMC_STATE_RESET; \ 390 (__HANDLE__)->MspInitCallback = NULL; \ 391 (__HANDLE__)->MspDeInitCallback = NULL; \ 392 } while(0) 393 #else 394 #define __HAL_MMC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_MMC_STATE_RESET) 395 #endif 396 397 #if !defined(STM32L4P5xx) && !defined(STM32L4Q5xx) && !defined(STM32L4R5xx) && !defined(STM32L4R7xx) && !defined(STM32L4R9xx) && !defined(STM32L4S5xx) && !defined(STM32L4S7xx) && !defined(STM32L4S9xx) 398 /** 399 * @brief Enable the MMC device. 400 * @retval None 401 */ 402 #define __HAL_MMC_ENABLE(__HANDLE__) __SDMMC_ENABLE((__HANDLE__)->Instance) 403 404 /** 405 * @brief Disable the MMC device. 406 * @retval None 407 */ 408 #define __HAL_MMC_DISABLE(__HANDLE__) __SDMMC_DISABLE((__HANDLE__)->Instance) 409 410 /** 411 * @brief Enable the SDMMC DMA transfer. 412 * @retval None 413 */ 414 #define __HAL_MMC_DMA_ENABLE(__HANDLE__) __SDMMC_DMA_ENABLE((__HANDLE__)->Instance) 415 416 /** 417 * @brief Disable the SDMMC DMA transfer. 418 * @retval None 419 */ 420 #define __HAL_MMC_DMA_DISABLE(__HANDLE__) __SDMMC_DMA_DISABLE((__HANDLE__)->Instance) 421 #endif 422 423 /** 424 * @brief Enable the MMC device interrupt. 425 * @param __HANDLE__ MMC Handle 426 * @param __INTERRUPT__ specifies the SDMMC interrupt sources to be enabled. 427 * This parameter can be one or a combination of the following values: 428 * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt 429 * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt 430 * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt 431 * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt 432 * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt 433 * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt 434 * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt 435 * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt 436 * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt 437 * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt 438 * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt 439 * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt 440 * @arg SDMMC_IT_CMDACT: Command transfer in progress interrupt 441 * @arg SDMMC_IT_TXACT: Data transmit in progress interrupt 442 * @arg SDMMC_IT_RXACT: Data receive in progress interrupt 443 * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt 444 * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt 445 * @arg SDMMC_IT_TXFIFOF: Transmit FIFO full interrupt 446 * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt 447 * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt 448 * @arg SDMMC_IT_RXFIFOE: Receive FIFO empty interrupt 449 * @arg SDMMC_IT_TXDAVL: Data available in transmit FIFO interrupt 450 * @arg SDMMC_IT_RXDAVL: Data available in receive FIFO interrupt 451 * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt 452 * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt 453 * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt 454 * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt 455 * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt 456 * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt 457 * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt 458 * @retval None 459 */ 460 #define __HAL_MMC_ENABLE_IT(__HANDLE__, __INTERRUPT__) __SDMMC_ENABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__)) 461 462 /** 463 * @brief Disable the MMC device interrupt. 464 * @param __HANDLE__ MMC Handle 465 * @param __INTERRUPT__ specifies the SDMMC interrupt sources to be disabled. 466 * This parameter can be one or a combination of the following values: 467 * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt 468 * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt 469 * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt 470 * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt 471 * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt 472 * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt 473 * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt 474 * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt 475 * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt 476 * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt 477 * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt 478 * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt 479 * @arg SDMMC_IT_CMDACT: Command transfer in progress interrupt 480 * @arg SDMMC_IT_TXACT: Data transmit in progress interrupt 481 * @arg SDMMC_IT_RXACT: Data receive in progress interrupt 482 * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt 483 * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt 484 * @arg SDMMC_IT_TXFIFOF: Transmit FIFO full interrupt 485 * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt 486 * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt 487 * @arg SDMMC_IT_RXFIFOE: Receive FIFO empty interrupt 488 * @arg SDMMC_IT_TXDAVL: Data available in transmit FIFO interrupt 489 * @arg SDMMC_IT_RXDAVL: Data available in receive FIFO interrupt 490 * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt 491 * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt 492 * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt 493 * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt 494 * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt 495 * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt 496 * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt 497 * @retval None 498 */ 499 #define __HAL_MMC_DISABLE_IT(__HANDLE__, __INTERRUPT__) __SDMMC_DISABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__)) 500 501 /** 502 * @brief Check whether the specified MMC flag is set or not. 503 * @param __HANDLE__ MMC Handle 504 * @param __FLAG__ specifies the flag to check. 505 * This parameter can be one of the following values: 506 * @arg SDMMC_FLAG_CCRCFAIL: Command response received (CRC check failed) 507 * @arg SDMMC_FLAG_DCRCFAIL: Data block sent/received (CRC check failed) 508 * @arg SDMMC_FLAG_CTIMEOUT: Command response timeout 509 * @arg SDMMC_FLAG_DTIMEOUT: Data timeout 510 * @arg SDMMC_FLAG_TXUNDERR: Transmit FIFO underrun error 511 * @arg SDMMC_FLAG_RXOVERR: Received FIFO overrun error 512 * @arg SDMMC_FLAG_CMDREND: Command response received (CRC check passed) 513 * @arg SDMMC_FLAG_CMDSENT: Command sent (no response required) 514 * @arg SDMMC_FLAG_DATAEND: Data end (data counter, DATACOUNT, is zero) 515 * @arg SDMMC_FLAG_DHOLD: Data transfer Hold 516 * @arg SDMMC_FLAG_DBCKEND: Data block sent/received (CRC check passed) 517 * @arg SDMMC_FLAG_DABORT: Data transfer aborted by CMD12 518 * @arg SDMMC_FLAG_DPSMACT: Data path state machine active 519 * @arg SDMMC_FLAG_CPSMACT: Command path state machine active 520 * @arg SDMMC_FLAG_CMDACT: Command transfer in progress 521 * @arg SDMMC_FLAG_TXACT: Data transmit in progress 522 * @arg SDMMC_FLAG_RXACT: Data receive in progress 523 * @arg SDMMC_FLAG_TXFIFOHE: Transmit FIFO Half Empty 524 * @arg SDMMC_FLAG_RXFIFOHF: Receive FIFO Half Full 525 * @arg SDMMC_FLAG_TXFIFOF: Transmit FIFO full 526 * @arg SDMMC_FLAG_RXFIFOF: Receive FIFO full 527 * @arg SDMMC_FLAG_TXFIFOE: Transmit FIFO empty 528 * @arg SDMMC_FLAG_RXFIFOE: Receive FIFO empty 529 * @arg SDMMC_FLAG_BUSYD0: Inverted value of SDMMC_D0 line (Busy) 530 * @arg SDMMC_FLAG_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected 531 * @arg SDMMC_FLAG_TXDAVL: Data available in transmit FIFO 532 * @arg SDMMC_FLAG_RXDAVL: Data available in receive FIFO 533 * @arg SDMMC_FLAG_SDIOIT: SD I/O interrupt received 534 * @arg SDMMC_FLAG_ACKFAIL: Boot Acknowledgment received 535 * @arg SDMMC_FLAG_ACKTIMEOUT: Boot Acknowledgment timeout 536 * @arg SDMMC_FLAG_VSWEND: Voltage switch critical timing section completion 537 * @arg SDMMC_FLAG_CKSTOP: SDMMC_CK stopped in Voltage switch procedure 538 * @arg SDMMC_FLAG_IDMATE: IDMA transfer error 539 * @arg SDMMC_FLAG_IDMABTC: IDMA buffer transfer complete 540 * @retval The new state of MMC FLAG (SET or RESET). 541 */ 542 #define __HAL_MMC_GET_FLAG(__HANDLE__, __FLAG__) __SDMMC_GET_FLAG((__HANDLE__)->Instance, (__FLAG__)) 543 544 /** 545 * @brief Clear the MMC's pending flags. 546 * @param __HANDLE__ MMC Handle 547 * @param __FLAG__ specifies the flag to clear. 548 * This parameter can be one or a combination of the following values: 549 * @arg SDMMC_FLAG_CCRCFAIL: Command response received (CRC check failed) 550 * @arg SDMMC_FLAG_DCRCFAIL: Data block sent/received (CRC check failed) 551 * @arg SDMMC_FLAG_CTIMEOUT: Command response timeout 552 * @arg SDMMC_FLAG_DTIMEOUT: Data timeout 553 * @arg SDMMC_FLAG_TXUNDERR: Transmit FIFO underrun error 554 * @arg SDMMC_FLAG_RXOVERR: Received FIFO overrun error 555 * @arg SDMMC_FLAG_CMDREND: Command response received (CRC check passed) 556 * @arg SDMMC_FLAG_CMDSENT: Command sent (no response required) 557 * @arg SDMMC_FLAG_DATAEND: Data end (data counter, DATACOUNT, is zero) 558 * @arg SDMMC_FLAG_DHOLD: Data transfer Hold 559 * @arg SDMMC_FLAG_DBCKEND: Data block sent/received (CRC check passed) 560 * @arg SDMMC_FLAG_DABORT: Data transfer aborted by CMD12 561 * @arg SDMMC_FLAG_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected 562 * @arg SDMMC_FLAG_SDIOIT: SD I/O interrupt received 563 * @arg SDMMC_FLAG_ACKFAIL: Boot Acknowledgment received 564 * @arg SDMMC_FLAG_ACKTIMEOUT: Boot Acknowledgment timeout 565 * @arg SDMMC_FLAG_VSWEND: Voltage switch critical timing section completion 566 * @arg SDMMC_FLAG_CKSTOP: SDMMC_CK stopped in Voltage switch procedure 567 * @arg SDMMC_FLAG_IDMATE: IDMA transfer error 568 * @arg SDMMC_FLAG_IDMABTC: IDMA buffer transfer complete 569 * @retval None 570 */ 571 #define __HAL_MMC_CLEAR_FLAG(__HANDLE__, __FLAG__) __SDMMC_CLEAR_FLAG((__HANDLE__)->Instance, (__FLAG__)) 572 573 /** 574 * @brief Check whether the specified MMC interrupt has occurred or not. 575 * @param __HANDLE__ MMC Handle 576 * @param __INTERRUPT__ specifies the SDMMC interrupt source to check. 577 * This parameter can be one of the following values: 578 * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt 579 * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt 580 * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt 581 * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt 582 * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt 583 * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt 584 * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt 585 * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt 586 * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt 587 * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt 588 * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt 589 * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt 590 * @arg SDMMC_IT_CMDACT: Command transfer in progress interrupt 591 * @arg SDMMC_IT_TXACT: Data transmit in progress interrupt 592 * @arg SDMMC_IT_RXACT: Data receive in progress interrupt 593 * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt 594 * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt 595 * @arg SDMMC_IT_TXFIFOF: Transmit FIFO full interrupt 596 * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt 597 * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt 598 * @arg SDMMC_IT_RXFIFOE: Receive FIFO empty interrupt 599 * @arg SDMMC_IT_TXDAVL: Data available in transmit FIFO interrupt 600 * @arg SDMMC_IT_RXDAVL: Data available in receive FIFO interrupt 601 * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt 602 * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt 603 * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt 604 * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt 605 * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt 606 * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt 607 * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt 608 * @retval The new state of MMC IT (SET or RESET). 609 */ 610 #define __HAL_MMC_GET_IT(__HANDLE__, __INTERRUPT__) __SDMMC_GET_IT((__HANDLE__)->Instance, (__INTERRUPT__)) 611 612 /** 613 * @brief Clear the MMC's interrupt pending bits. 614 * @param __HANDLE__ MMC Handle 615 * @param __INTERRUPT__ specifies the interrupt pending bit to clear. 616 * This parameter can be one or a combination of the following values: 617 * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt 618 * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt 619 * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt 620 * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt 621 * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt 622 * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt 623 * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt 624 * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt 625 * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt 626 * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt 627 * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt 628 * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt 629 * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt 630 * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt 631 * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt 632 * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt 633 * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt 634 * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt 635 * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt 636 * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt 637 * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt 638 * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt 639 * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt 640 * @retval None 641 */ 642 #define __HAL_MMC_CLEAR_IT(__HANDLE__, __INTERRUPT__) __SDMMC_CLEAR_IT((__HANDLE__)->Instance, (__INTERRUPT__)) 643 644 /** 645 * @} 646 */ 647 648 #if defined(STM32L4P5xx) || defined(STM32L4Q5xx) || defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) 649 /* Include MMC HAL Extension module */ 650 #include "stm32l4xx_hal_mmc_ex.h" 651 #endif 652 653 /* Exported functions --------------------------------------------------------*/ 654 /** @addtogroup MMC_Exported_Functions 655 * @{ 656 */ 657 658 /** @addtogroup MMC_Exported_Functions_Group1 659 * @{ 660 */ 661 HAL_StatusTypeDef HAL_MMC_Init(MMC_HandleTypeDef *hmmc); 662 HAL_StatusTypeDef HAL_MMC_InitCard(MMC_HandleTypeDef *hmmc); 663 HAL_StatusTypeDef HAL_MMC_DeInit (MMC_HandleTypeDef *hmmc); 664 void HAL_MMC_MspInit(MMC_HandleTypeDef *hmmc); 665 void HAL_MMC_MspDeInit(MMC_HandleTypeDef *hmmc); 666 667 /** 668 * @} 669 */ 670 671 /** @defgroup MMC_Exported_Functions_Group2 Input and Output operation functions 672 * @{ 673 */ 674 /* Blocking mode: Polling */ 675 HAL_StatusTypeDef HAL_MMC_ReadBlocks(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks, uint32_t Timeout); 676 HAL_StatusTypeDef HAL_MMC_WriteBlocks(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks, uint32_t Timeout); 677 HAL_StatusTypeDef HAL_MMC_Erase(MMC_HandleTypeDef *hmmc, uint32_t BlockStartAdd, uint32_t BlockEndAdd); 678 /* Non-Blocking mode: IT */ 679 HAL_StatusTypeDef HAL_MMC_ReadBlocks_IT(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks); 680 HAL_StatusTypeDef HAL_MMC_WriteBlocks_IT(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks); 681 /* Non-Blocking mode: DMA */ 682 HAL_StatusTypeDef HAL_MMC_ReadBlocks_DMA(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks); 683 HAL_StatusTypeDef HAL_MMC_WriteBlocks_DMA(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks); 684 685 void HAL_MMC_IRQHandler(MMC_HandleTypeDef *hmmc); 686 687 /* Callback in non blocking modes (DMA) */ 688 void HAL_MMC_TxCpltCallback(MMC_HandleTypeDef *hmmc); 689 void HAL_MMC_RxCpltCallback(MMC_HandleTypeDef *hmmc); 690 void HAL_MMC_ErrorCallback(MMC_HandleTypeDef *hmmc); 691 void HAL_MMC_AbortCallback(MMC_HandleTypeDef *hmmc); 692 693 #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) 694 /* MMC callback registering/unregistering */ 695 HAL_StatusTypeDef HAL_MMC_RegisterCallback (MMC_HandleTypeDef *hmmc, HAL_MMC_CallbackIDTypeDef CallbackId, pMMC_CallbackTypeDef pCallback); 696 HAL_StatusTypeDef HAL_MMC_UnRegisterCallback(MMC_HandleTypeDef *hmmc, HAL_MMC_CallbackIDTypeDef CallbackId); 697 #endif 698 /** 699 * @} 700 */ 701 702 /** @defgroup MMC_Exported_Functions_Group3 Peripheral Control functions 703 * @{ 704 */ 705 HAL_StatusTypeDef HAL_MMC_ConfigWideBusOperation(MMC_HandleTypeDef *hmmc, uint32_t WideMode); 706 #if defined(STM32L4P5xx) || defined(STM32L4Q5xx) || defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) 707 HAL_StatusTypeDef HAL_MMC_ConfigSpeedBusOperation(MMC_HandleTypeDef *hmmc, uint32_t SpeedMode); 708 #endif 709 /** 710 * @} 711 */ 712 713 /** @defgroup MMC_Exported_Functions_Group4 MMC card related functions 714 * @{ 715 */ 716 HAL_MMC_CardStateTypeDef HAL_MMC_GetCardState(MMC_HandleTypeDef *hmmc); 717 HAL_StatusTypeDef HAL_MMC_GetCardCID(MMC_HandleTypeDef *hmmc, HAL_MMC_CardCIDTypeDef *pCID); 718 HAL_StatusTypeDef HAL_MMC_GetCardCSD(MMC_HandleTypeDef *hmmc, HAL_MMC_CardCSDTypeDef *pCSD); 719 HAL_StatusTypeDef HAL_MMC_GetCardInfo(MMC_HandleTypeDef *hmmc, HAL_MMC_CardInfoTypeDef *pCardInfo); 720 /** 721 * @} 722 */ 723 724 /** @defgroup MMC_Exported_Functions_Group5 Peripheral State and Errors functions 725 * @{ 726 */ 727 HAL_MMC_StateTypeDef HAL_MMC_GetState(MMC_HandleTypeDef *hmmc); 728 uint32_t HAL_MMC_GetError(MMC_HandleTypeDef *hmmc); 729 /** 730 * @} 731 */ 732 733 /** @defgroup MMC_Exported_Functions_Group6 Perioheral Abort management 734 * @{ 735 */ 736 HAL_StatusTypeDef HAL_MMC_Abort(MMC_HandleTypeDef *hmmc); 737 HAL_StatusTypeDef HAL_MMC_Abort_IT(MMC_HandleTypeDef *hmmc); 738 /** 739 * @} 740 */ 741 742 /** 743 * @} 744 */ 745 746 /* Private types -------------------------------------------------------------*/ 747 /** @defgroup MMC_Private_Types MMC Private Types 748 * @{ 749 */ 750 751 /** 752 * @} 753 */ 754 755 /* Private defines -----------------------------------------------------------*/ 756 /** @defgroup MMC_Private_Defines MMC Private Defines 757 * @{ 758 */ 759 760 /** 761 * @} 762 */ 763 764 /* Private variables ---------------------------------------------------------*/ 765 /** @defgroup MMC_Private_Variables MMC Private Variables 766 * @{ 767 */ 768 769 /** 770 * @} 771 */ 772 773 /* Private constants ---------------------------------------------------------*/ 774 /** @defgroup MMC_Private_Constants MMC Private Constants 775 * @{ 776 */ 777 778 /** 779 * @} 780 */ 781 782 /* Private macros ------------------------------------------------------------*/ 783 /** @defgroup MMC_Private_Macros MMC Private Macros 784 * @{ 785 */ 786 787 /** 788 * @} 789 */ 790 791 /* Private functions prototypes ----------------------------------------------*/ 792 /** @defgroup MMC_Private_Functions_Prototypes MMC Private Functions Prototypes 793 * @{ 794 */ 795 796 /** 797 * @} 798 */ 799 800 /* Private functions ---------------------------------------------------------*/ 801 /** @defgroup MMC_Private_Functions MMC Private Functions 802 * @{ 803 */ 804 805 /** 806 * @} 807 */ 808 809 810 /** 811 * @} 812 */ 813 814 /** 815 * @} 816 */ 817 818 #endif /* SDMMC1 */ 819 820 /** 821 * @} 822 */ 823 824 #ifdef __cplusplus 825 } 826 #endif 827 828 829 #endif /* STM32L4xx_HAL_MMC_H */ 830 831 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 832