1 /** 2 ****************************************************************************** 3 * @file stm32l4xx_hal_cryp.h 4 * @author MCD Application Team 5 * @brief Header file of CRYP HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * <h2><center>© Copyright (c) 2017 STMicroelectronics. 10 * All rights reserved.</center></h2> 11 * 12 * This software component is licensed by ST under BSD 3-Clause license, 13 * the "License"; You may not use this file except in compliance with the 14 * License. You may obtain a copy of the License at: 15 * opensource.org/licenses/BSD-3-Clause 16 * 17 ****************************************************************************** 18 */ 19 20 /* Define to prevent recursive inclusion -------------------------------------*/ 21 #ifndef STM32L4xx_HAL_CRYP_H 22 #define STM32L4xx_HAL_CRYP_H 23 24 #ifdef __cplusplus 25 extern "C" { 26 #endif 27 28 /* Includes ------------------------------------------------------------------*/ 29 #include "stm32l4xx_hal_def.h" 30 31 /** @addtogroup STM32L4xx_HAL_Driver 32 * @{ 33 */ 34 35 #if defined(AES) 36 37 /** @addtogroup CRYP 38 * @{ 39 */ 40 41 /* Exported types ------------------------------------------------------------*/ 42 /** @defgroup CRYP_Exported_Types CRYP Exported Types 43 * @{ 44 */ 45 46 /** 47 * @brief CRYP Configuration Structure definition 48 */ 49 typedef struct 50 { 51 uint32_t DataType; /*!< 32-bit data, 16-bit data, 8-bit data or 1-bit string. 52 This parameter can be a value of @ref CRYP_Data_Type */ 53 54 uint32_t KeySize; /*!< 128 or 256-bit key length. 55 This parameter can be a value of @ref CRYP_Key_Size */ 56 57 uint32_t OperatingMode; /*!< AES operating mode. 58 This parameter can be a value of @ref CRYP_AES_OperatingMode */ 59 60 uint32_t ChainingMode; /*!< AES chaining mode. 61 This parameter can be a value of @ref CRYP_AES_ChainingMode */ 62 63 uint32_t KeyWriteFlag; /*!< Allows to bypass or not key write-up before decryption. 64 This parameter can be a value of @ref CRYP_Key_Write */ 65 66 uint32_t GCMCMACPhase; /*!< Indicates the processing phase of the Galois Counter Mode (GCM), 67 Galois Message Authentication Code (GMAC), Cipher Message 68 Authentication Code (CMAC) (when applicable) or Counter with Cipher 69 Mode (CCM) (when applicable). 70 This parameter can be a value of @ref CRYP_GCM_CMAC_Phase */ 71 72 uint8_t* pKey; /*!< Encryption/Decryption Key */ 73 74 uint8_t* pInitVect; /*!< Initialization Vector used for CTR, CBC, GCM/GMAC, CMAC (when applicable) 75 and CCM (when applicable) modes */ 76 77 uint8_t* Header; /*!< Header used in GCM/GMAC, CMAC (when applicable) and CCM (when applicable) modes */ 78 79 uint64_t HeaderSize; /*!< Header size in bytes */ 80 81 }CRYP_InitTypeDef; 82 83 /** 84 * @brief HAL CRYP State structures definition 85 */ 86 typedef enum 87 { 88 HAL_CRYP_STATE_RESET = 0x00, /*!< CRYP not yet initialized or disabled */ 89 HAL_CRYP_STATE_READY = 0x01, /*!< CRYP initialized and ready for use */ 90 HAL_CRYP_STATE_BUSY = 0x02, /*!< CRYP internal processing is ongoing */ 91 HAL_CRYP_STATE_TIMEOUT = 0x03, /*!< CRYP timeout state */ 92 HAL_CRYP_STATE_ERROR = 0x04, /*!< CRYP error state */ 93 HAL_CRYP_STATE_SUSPENDED = 0x05 /*!< CRYP suspended */ 94 }HAL_CRYP_STATETypeDef; 95 96 /** 97 * @brief HAL CRYP phase structures definition 98 */ 99 typedef enum 100 { 101 HAL_CRYP_PHASE_READY = 0x01, /*!< CRYP peripheral is ready for initialization. */ 102 HAL_CRYP_PHASE_PROCESS = 0x02, /*!< CRYP peripheral is in processing phase */ 103 HAL_CRYP_PHASE_START = 0x03, /*!< CRYP peripheral has been initialized but 104 GCM/GMAC(/CMAC)(/CCM) initialization phase has not started */ 105 HAL_CRYP_PHASE_INIT_OVER = 0x04, /*!< GCM/GMAC(/CMAC)(/CCM) init phase has been carried out */ 106 HAL_CRYP_PHASE_HEADER_OVER = 0x05, /*!< GCM/GMAC(/CMAC)(/CCM) header phase has been carried out */ 107 HAL_CRYP_PHASE_PAYLOAD_OVER = 0x06, /*!< GCM(/CCM) payload phase has been carried out */ 108 HAL_CRYP_PHASE_FINAL_OVER = 0x07, /*!< GCM/GMAC(/CMAC)(/CCM) final phase has been carried out */ 109 HAL_CRYP_PHASE_HEADER_SUSPENDED = 0x08, /*!< GCM/GMAC(/CMAC)(/CCM) header phase has been suspended */ 110 HAL_CRYP_PHASE_PAYLOAD_SUSPENDED = 0x09, /*!< GCM(/CCM) payload phase has been suspended */ 111 HAL_CRYP_PHASE_NOT_USED = 0x0a /*!< Phase is irrelevant to the current chaining mode */ 112 }HAL_PhaseTypeDef; 113 114 /** 115 * @brief HAL CRYP mode suspend definitions 116 */ 117 typedef enum 118 { 119 HAL_CRYP_SUSPEND_NONE = 0x00, /*!< CRYP peripheral suspension not requested */ 120 HAL_CRYP_SUSPEND = 0x01 /*!< CRYP peripheral suspension requested */ 121 }HAL_SuspendTypeDef; 122 123 124 /** 125 * @brief HAL CRYP Error Codes definition 126 */ 127 #define HAL_CRYP_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */ 128 #define HAL_CRYP_WRITE_ERROR ((uint32_t)0x00000001) /*!< Write error */ 129 #define HAL_CRYP_READ_ERROR ((uint32_t)0x00000002) /*!< Read error */ 130 #define HAL_CRYP_DMA_ERROR ((uint32_t)0x00000004) /*!< DMA error */ 131 #define HAL_CRYP_BUSY_ERROR ((uint32_t)0x00000008) /*!< Busy flag error */ 132 #if (USE_HAL_CRYP_REGISTER_CALLBACKS == 1) 133 #define HAL_CRYP_ERROR_INVALID_CALLBACK ((uint32_t)0x00000010U) /*!< Invalid Callback error */ 134 #endif /* USE_HAL_CRYP_REGISTER_CALLBACKS */ 135 136 #if (USE_HAL_CRYP_REGISTER_CALLBACKS == 1) 137 /** 138 * @brief HAL CRYP common Callback ID enumeration definition 139 */ 140 typedef enum 141 { 142 HAL_CRYP_INPUTCPLT_CB_ID = 0x01U, /*!< CRYP input DMA transfer completion callback ID */ 143 HAL_CRYP_OUTPUTCPLT_CB_ID = 0x02U, /*!< CRYP output DMA transfer completion callback ID */ 144 HAL_CRYP_COMPCPLT_CB_ID = 0x03U, /*!< CRYP computation completion callback ID */ 145 HAL_CRYP_ERROR_CB_ID = 0x04U, /*!< CRYP error callback ID */ 146 HAL_CRYP_MSPINIT_CB_ID = 0x05U, /*!< CRYP MspInit callback ID */ 147 HAL_CRYP_MSPDEINIT_CB_ID = 0x06U, /*!< CRYP MspDeInit callback ID */ 148 }HAL_CRYP_CallbackIDTypeDef; 149 #endif /* USE_HAL_CRYP_REGISTER_CALLBACKS */ 150 151 /** 152 * @brief CRYP handle Structure definition 153 */ 154 typedef struct __CRYP_HandleTypeDef 155 { 156 AES_TypeDef *Instance; /*!< Register base address */ 157 158 CRYP_InitTypeDef Init; /*!< CRYP initialization parameters */ 159 160 uint8_t *pCrypInBuffPtr; /*!< Pointer to CRYP processing (encryption, decryption,...) input buffer */ 161 162 uint8_t *pCrypOutBuffPtr; /*!< Pointer to CRYP processing (encryption, decryption,...) output buffer */ 163 164 uint32_t CrypInCount; /*!< Input data size in bytes or, after suspension, the remaining 165 number of bytes to process */ 166 167 uint32_t CrypOutCount; /*!< Output data size in bytes */ 168 169 HAL_PhaseTypeDef Phase; /*!< CRYP peripheral processing phase for GCM, GMAC, CMAC (when applicable) 170 or CCM (when applicable) modes. 171 Indicates the last phase carried out to ease 172 phase transitions */ 173 174 DMA_HandleTypeDef *hdmain; /*!< CRYP peripheral Input DMA handle parameters */ 175 176 DMA_HandleTypeDef *hdmaout; /*!< CRYP peripheral Output DMA handle parameters */ 177 178 HAL_LockTypeDef Lock; /*!< CRYP locking object */ 179 180 __IO HAL_CRYP_STATETypeDef State; /*!< CRYP peripheral state */ 181 182 __IO uint32_t ErrorCode; /*!< CRYP peripheral error code */ 183 184 HAL_SuspendTypeDef SuspendRequest; /*!< CRYP peripheral suspension request flag */ 185 186 #if (USE_HAL_CRYP_REGISTER_CALLBACKS == 1) 187 void (* InCpltCallback)( struct __CRYP_HandleTypeDef * hcryp); /*!< CRYP input DMA transfer completion callback */ 188 189 void (* OutCpltCallback)( struct __CRYP_HandleTypeDef * hcryp); /*!< CRYP output DMA transfer completion callback */ 190 191 void (* CompCpltCallback)( struct __CRYP_HandleTypeDef * hcryp); /*!< CRYP computation completion callback */ 192 193 void (* ErrorCallback)( struct __CRYP_HandleTypeDef * hcryp); /*!< CRYP error callback */ 194 195 void (* MspInitCallback)( struct __CRYP_HandleTypeDef * hcryp); /*!< CRYP Msp Init callback */ 196 197 void (* MspDeInitCallback)( struct __CRYP_HandleTypeDef * hcryp); /*!< CRYP Msp DeInit callback */ 198 199 #endif /* (USE_HAL_CRYP_REGISTER_CALLBACKS) */ 200 }CRYP_HandleTypeDef; 201 202 203 #if (USE_HAL_CRYP_REGISTER_CALLBACKS == 1) 204 /** 205 * @brief HAL CRYP Callback pointer definition 206 */ 207 typedef void (*pCRYP_CallbackTypeDef)(CRYP_HandleTypeDef * hcryp); /*!< pointer to a CRYP common callback functions */ 208 #endif /* USE_HAL_CRYP_REGISTER_CALLBACKS */ 209 /** 210 * @} 211 */ 212 213 214 /* Exported constants --------------------------------------------------------*/ 215 /** @defgroup CRYP_Exported_Constants CRYP Exported Constants 216 * @{ 217 */ 218 219 /** @defgroup CRYP_Key_Size Key size selection 220 * @{ 221 */ 222 #define CRYP_KEYSIZE_128B ((uint32_t)0x00000000) /*!< 128-bit long key */ 223 #define CRYP_KEYSIZE_256B AES_CR_KEYSIZE /*!< 256-bit long key */ 224 /** 225 * @} 226 */ 227 228 /** @defgroup CRYP_Data_Type AES Data Type selection 229 * @{ 230 */ 231 #define CRYP_DATATYPE_32B ((uint32_t)0x00000000) /*!< 32-bit data type (no swapping) */ 232 #define CRYP_DATATYPE_16B AES_CR_DATATYPE_0 /*!< 16-bit data type (half-word swapping) */ 233 #define CRYP_DATATYPE_8B AES_CR_DATATYPE_1 /*!< 8-bit data type (byte swapping) */ 234 #define CRYP_DATATYPE_1B AES_CR_DATATYPE /*!< 1-bit data type (bit swapping) */ 235 /** 236 * @} 237 */ 238 239 /** @defgroup CRYP_AES_State AES Enable state 240 * @{ 241 */ 242 #define CRYP_AES_DISABLE ((uint32_t)0x00000000) /*!< Disable AES */ 243 #define CRYP_AES_ENABLE AES_CR_EN /*!< Enable AES */ 244 /** 245 * @} 246 */ 247 248 /** @defgroup CRYP_AES_OperatingMode AES operating mode 249 * @{ 250 */ 251 #define CRYP_ALGOMODE_ENCRYPT ((uint32_t)0x00000000) /*!< Encryption mode */ 252 #define CRYP_ALGOMODE_KEYDERIVATION AES_CR_MODE_0 /*!< Key derivation mode */ 253 #define CRYP_ALGOMODE_DECRYPT AES_CR_MODE_1 /*!< Decryption */ 254 #define CRYP_ALGOMODE_KEYDERIVATION_DECRYPT AES_CR_MODE /*!< Key derivation and decryption */ 255 #define CRYP_ALGOMODE_TAG_GENERATION ((uint32_t)0x00000000) /*!< GMAC or CMAC (when applicable) authentication tag generation */ 256 /** 257 * @} 258 */ 259 260 /** @defgroup CRYP_AES_ChainingMode AES chaining mode 261 * @{ 262 */ 263 #define CRYP_CHAINMODE_AES_ECB ((uint32_t)0x00000000) /*!< Electronic codebook chaining algorithm */ 264 #define CRYP_CHAINMODE_AES_CBC AES_CR_CHMOD_0 /*!< Cipher block chaining algorithm */ 265 #define CRYP_CHAINMODE_AES_CTR AES_CR_CHMOD_1 /*!< Counter mode chaining algorithm */ 266 #define CRYP_CHAINMODE_AES_GCM_GMAC (AES_CR_CHMOD_0 | AES_CR_CHMOD_1) /*!< Galois counter mode - Galois message authentication code */ 267 #if defined(AES_CR_NPBLB) 268 #define CRYP_CHAINMODE_AES_CCM AES_CR_CHMOD_2 /*!< Counter with Cipher Mode */ 269 #else 270 #define CRYP_CHAINMODE_AES_CMAC AES_CR_CHMOD_2 /*!< Cipher message authentication code */ 271 #endif 272 /** 273 * @} 274 */ 275 276 /** @defgroup CRYP_Key_Write AES decryption key write-up flag 277 * @{ 278 */ 279 #define CRYP_KEY_WRITE_ENABLE ((uint32_t)0x00000000) /*!< Enable decryption key writing */ 280 #define CRYP_KEY_WRITE_DISABLE ((uint32_t)0x00000001) /*!< Disable decryption key writing */ 281 /** 282 * @} 283 */ 284 285 /** @defgroup CRYP_DMAIN DMA Input phase management enable state 286 * @{ 287 */ 288 #define CRYP_DMAIN_DISABLE ((uint32_t)0x00000000) /*!< Disable DMA Input phase management */ 289 #define CRYP_DMAIN_ENABLE AES_CR_DMAINEN /*!< Enable DMA Input phase management */ 290 /** 291 * @} 292 */ 293 294 /** @defgroup CRYP_DMAOUT DMA Output phase management enable state 295 * @{ 296 */ 297 #define CRYP_DMAOUT_DISABLE ((uint32_t)0x00000000) /*!< Disable DMA Output phase management */ 298 #define CRYP_DMAOUT_ENABLE AES_CR_DMAOUTEN /*!< Enable DMA Output phase management */ 299 /** 300 * @} 301 */ 302 303 304 /** @defgroup CRYP_GCM_CMAC_Phase GCM/GMAC and CCM/CMAC (when applicable) processing phase selection 305 * @{ 306 */ 307 #define CRYP_GCM_INIT_PHASE ((uint32_t)0x00000000) /*!< GCM/GMAC (or CCM) init phase */ 308 #define CRYP_GCMCMAC_HEADER_PHASE AES_CR_GCMPH_0 /*!< GCM/GMAC/CCM/CMAC header phase */ 309 #define CRYP_GCM_PAYLOAD_PHASE AES_CR_GCMPH_1 /*!< GCM/CCM payload phase */ 310 #define CRYP_GCMCMAC_FINAL_PHASE AES_CR_GCMPH /*!< GCM/GMAC/CCM/CMAC final phase */ 311 /* Definitions duplication for code readibility's sake: 312 supported or not supported chain modes are not specified for each phase */ 313 #define CRYP_INIT_PHASE ((uint32_t)0x00000000) /*!< Init phase */ 314 #define CRYP_HEADER_PHASE AES_CR_GCMPH_0 /*!< Header phase */ 315 #define CRYP_PAYLOAD_PHASE AES_CR_GCMPH_1 /*!< Payload phase */ 316 #define CRYP_FINAL_PHASE AES_CR_GCMPH /*!< Final phase */ 317 /** 318 * @} 319 */ 320 321 /** @defgroup CRYP_Flags AES status flags 322 * @{ 323 */ 324 325 #define CRYP_FLAG_BUSY AES_SR_BUSY /*!< GCM process suspension forbidden */ 326 #define CRYP_FLAG_WRERR AES_SR_WRERR /*!< Write Error */ 327 #define CRYP_FLAG_RDERR AES_SR_RDERR /*!< Read error */ 328 #define CRYP_FLAG_CCF AES_SR_CCF /*!< Computation completed */ 329 /** 330 * @} 331 */ 332 333 /** @defgroup CRYP_Clear_Flags AES clearing flags 334 * @{ 335 */ 336 337 #define CRYP_CCF_CLEAR AES_CR_CCFC /*!< Computation Complete Flag Clear */ 338 #define CRYP_ERR_CLEAR AES_CR_ERRC /*!< Error Flag Clear */ 339 /** 340 * @} 341 */ 342 343 /** @defgroup AES_Interrupts_Enable AES Interrupts Enable bits 344 * @{ 345 */ 346 #define CRYP_IT_CCFIE AES_CR_CCFIE /*!< Computation Complete interrupt enable */ 347 #define CRYP_IT_ERRIE AES_CR_ERRIE /*!< Error interrupt enable */ 348 /** 349 * @} 350 */ 351 352 /** @defgroup CRYP_Interrupts_Flags AES Interrupts flags 353 * @{ 354 */ 355 #define CRYP_IT_WRERR AES_SR_WRERR /*!< Write Error */ 356 #define CRYP_IT_RDERR AES_SR_RDERR /*!< Read Error */ 357 #define CRYP_IT_CCF AES_SR_CCF /*!< Computation completed */ 358 /** 359 * @} 360 */ 361 362 /** 363 * @} 364 */ 365 366 /* Exported macros -----------------------------------------------------------*/ 367 /** @defgroup CRYP_Exported_Macros CRYP Exported Macros 368 * @{ 369 */ 370 371 /** @brief Reset CRYP handle state. 372 * @param __HANDLE__ specifies the CRYP handle. 373 * @retval None 374 */ 375 #if (USE_HAL_CRYP_REGISTER_CALLBACKS == 1) 376 #define __HAL_CRYP_RESET_HANDLE_STATE(__HANDLE__) do{\ 377 (__HANDLE__)->State = HAL_CRYP_STATE_RESET;\ 378 (__HANDLE__)->MspInitCallback = NULL; \ 379 (__HANDLE__)->MspDeInitCallback = NULL; \ 380 }while(0) 381 #else 382 #define __HAL_CRYP_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CRYP_STATE_RESET) 383 #endif /* USE_HAL_CRYP_REGISTER_CALLBACKS */ 384 385 /** 386 * @brief Enable the CRYP AES peripheral. 387 * @param __HANDLE__ specifies the CRYP handle. 388 * @retval None 389 */ 390 #define __HAL_CRYP_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= AES_CR_EN) 391 392 /** 393 * @brief Disable the CRYP AES peripheral. 394 * @param __HANDLE__ specifies the CRYP handle. 395 * @retval None 396 */ 397 #define __HAL_CRYP_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~AES_CR_EN) 398 399 /** 400 * @brief Set the algorithm operating mode. 401 * @param __HANDLE__ specifies the CRYP handle. 402 * @param __OPERATING_MODE__ specifies the operating mode 403 * This parameter can be one of the following values: 404 * @arg @ref CRYP_ALGOMODE_ENCRYPT encryption 405 * @arg @ref CRYP_ALGOMODE_KEYDERIVATION key derivation 406 * @arg @ref CRYP_ALGOMODE_DECRYPT decryption 407 * @arg @ref CRYP_ALGOMODE_KEYDERIVATION_DECRYPT key derivation and decryption 408 * @retval None 409 */ 410 #define __HAL_CRYP_SET_OPERATINGMODE(__HANDLE__, __OPERATING_MODE__) MODIFY_REG((__HANDLE__)->Instance->CR, AES_CR_MODE, (__OPERATING_MODE__)) 411 412 413 /** 414 * @brief Set the algorithm chaining mode. 415 * @param __HANDLE__ specifies the CRYP handle. 416 * @param __CHAINING_MODE__ specifies the chaining mode 417 * This parameter can be one of the following values: 418 * @arg @ref CRYP_CHAINMODE_AES_ECB Electronic CodeBook 419 * @arg @ref CRYP_CHAINMODE_AES_CBC Cipher Block Chaining 420 * @arg @ref CRYP_CHAINMODE_AES_CTR CounTeR mode 421 * @arg @ref CRYP_CHAINMODE_AES_GCM_GMAC Galois Counter Mode or Galois Message Authentication Code 422 * @arg @ref CRYP_CHAINMODE_AES_CMAC Cipher Message Authentication Code (or Counter with Cipher Mode when applicable) 423 * @retval None 424 */ 425 #define __HAL_CRYP_SET_CHAININGMODE(__HANDLE__, __CHAINING_MODE__) MODIFY_REG((__HANDLE__)->Instance->CR, AES_CR_CHMOD, (__CHAINING_MODE__)) 426 427 428 429 /** @brief Check whether the specified CRYP status flag is set or not. 430 * @param __HANDLE__ specifies the CRYP handle. 431 * @param __FLAG__ specifies the flag to check. 432 * This parameter can be one of the following values: 433 * @arg @ref CRYP_FLAG_BUSY GCM process suspension forbidden 434 * @arg @ref CRYP_IT_WRERR Write Error 435 * @arg @ref CRYP_IT_RDERR Read Error 436 * @arg @ref CRYP_IT_CCF Computation Complete 437 * @retval The state of __FLAG__ (TRUE or FALSE). 438 */ 439 #define __HAL_CRYP_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__)) 440 441 442 /** @brief Clear the CRYP pending status flag. 443 * @param __HANDLE__ specifies the CRYP handle. 444 * @param __FLAG__ specifies the flag to clear. 445 * This parameter can be one of the following values: 446 * @arg @ref CRYP_ERR_CLEAR Read (RDERR) or Write Error (WRERR) Flag Clear 447 * @arg @ref CRYP_CCF_CLEAR Computation Complete Flag (CCF) Clear 448 * @retval None 449 */ 450 #define __HAL_CRYP_CLEAR_FLAG(__HANDLE__, __FLAG__) SET_BIT((__HANDLE__)->Instance->CR, (__FLAG__)) 451 452 453 454 /** @brief Check whether the specified CRYP interrupt source is enabled or not. 455 * @param __HANDLE__ specifies the CRYP handle. 456 * @param __INTERRUPT__ CRYP interrupt source to check 457 * This parameter can be one of the following values: 458 * @arg @ref CRYP_IT_ERRIE Error interrupt (used for RDERR and WRERR) 459 * @arg @ref CRYP_IT_CCFIE Computation Complete interrupt 460 * @retval State of interruption (TRUE or FALSE). 461 */ 462 #define __HAL_CRYP_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR & (__INTERRUPT__)) == (__INTERRUPT__)) 463 464 465 /** @brief Check whether the specified CRYP interrupt is set or not. 466 * @param __HANDLE__ specifies the CRYP handle. 467 * @param __INTERRUPT__ specifies the interrupt to check. 468 * This parameter can be one of the following values: 469 * @arg @ref CRYP_IT_WRERR Write Error 470 * @arg @ref CRYP_IT_RDERR Read Error 471 * @arg @ref CRYP_IT_CCF Computation Complete 472 * @retval The state of __INTERRUPT__ (TRUE or FALSE). 473 */ 474 #define __HAL_CRYP_GET_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->SR & (__INTERRUPT__)) == (__INTERRUPT__)) 475 476 477 478 /** @brief Clear the CRYP pending interrupt. 479 * @param __HANDLE__ specifies the CRYP handle. 480 * @param __INTERRUPT__ specifies the IT to clear. 481 * This parameter can be one of the following values: 482 * @arg @ref CRYP_ERR_CLEAR Read (RDERR) or Write Error (WRERR) Flag Clear 483 * @arg @ref CRYP_CCF_CLEAR Computation Complete Flag (CCF) Clear 484 * @retval None 485 */ 486 #define __HAL_CRYP_CLEAR_IT(__HANDLE__, __INTERRUPT__) SET_BIT((__HANDLE__)->Instance->CR, (__INTERRUPT__)) 487 488 489 /** 490 * @brief Enable the CRYP interrupt. 491 * @param __HANDLE__ specifies the CRYP handle. 492 * @param __INTERRUPT__ CRYP Interrupt. 493 * This parameter can be one of the following values: 494 * @arg @ref CRYP_IT_ERRIE Error interrupt (used for RDERR and WRERR) 495 * @arg @ref CRYP_IT_CCFIE Computation Complete interrupt 496 * @retval None 497 */ 498 #define __HAL_CRYP_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) |= (__INTERRUPT__)) 499 500 501 /** 502 * @brief Disable the CRYP interrupt. 503 * @param __HANDLE__ specifies the CRYP handle. 504 * @param __INTERRUPT__ CRYP Interrupt. 505 * This parameter can be one of the following values: 506 * @arg @ref CRYP_IT_ERRIE Error interrupt (used for RDERR and WRERR) 507 * @arg @ref CRYP_IT_CCFIE Computation Complete interrupt 508 * @retval None 509 */ 510 #define __HAL_CRYP_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) &= ~(__INTERRUPT__)) 511 512 /** 513 * @} 514 */ 515 516 /* Private macros --------------------------------------------------------*/ 517 /** @addtogroup CRYP_Private_Macros CRYP Private Macros 518 * @{ 519 */ 520 521 /** 522 * @brief Verify the key size length. 523 * @param __KEYSIZE__ Ciphering/deciphering algorithm key size. 524 * @retval SET (__KEYSIZE__ is a valid value) or RESET (__KEYSIZE__ is invalid) 525 */ 526 #define IS_CRYP_KEYSIZE(__KEYSIZE__) (((__KEYSIZE__) == CRYP_KEYSIZE_128B) || \ 527 ((__KEYSIZE__) == CRYP_KEYSIZE_256B)) 528 529 /** 530 * @brief Verify the input data type. 531 * @param __DATATYPE__ Ciphering/deciphering algorithm input data type. 532 * @retval SET (__DATATYPE__ is valid) or RESET (__DATATYPE__ is invalid) 533 */ 534 #define IS_CRYP_DATATYPE(__DATATYPE__) (((__DATATYPE__) == CRYP_DATATYPE_32B) || \ 535 ((__DATATYPE__) == CRYP_DATATYPE_16B) || \ 536 ((__DATATYPE__) == CRYP_DATATYPE_8B) || \ 537 ((__DATATYPE__) == CRYP_DATATYPE_1B)) 538 539 /** 540 * @brief Verify the CRYP AES IP running mode. 541 * @param __MODE__ CRYP AES IP running mode. 542 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) 543 */ 544 #define IS_CRYP_AES(__MODE__) (((__MODE__) == CRYP_AES_DISABLE) || \ 545 ((__MODE__) == CRYP_AES_ENABLE)) 546 547 /** 548 * @brief Verify the selected CRYP algorithm. 549 * @param __ALGOMODE__ Selected CRYP algorithm (ciphering, deciphering, key derivation or a combination of the latter). 550 * @retval SET (__ALGOMODE__ is valid) or RESET (__ALGOMODE__ is invalid) 551 */ 552 #define IS_CRYP_ALGOMODE(__ALGOMODE__) (((__ALGOMODE__) == CRYP_ALGOMODE_ENCRYPT) || \ 553 ((__ALGOMODE__) == CRYP_ALGOMODE_KEYDERIVATION) || \ 554 ((__ALGOMODE__) == CRYP_ALGOMODE_DECRYPT) || \ 555 ((__ALGOMODE__) == CRYP_ALGOMODE_TAG_GENERATION) || \ 556 ((__ALGOMODE__) == CRYP_ALGOMODE_KEYDERIVATION_DECRYPT)) 557 558 /** 559 * @brief Verify the selected CRYP chaining algorithm. 560 * @param __CHAINMODE__ Selected CRYP chaining algorithm. 561 * @retval SET (__CHAINMODE__ is valid) or RESET (__CHAINMODE__ is invalid) 562 */ 563 #if defined(AES_CR_NPBLB) 564 #define IS_CRYP_CHAINMODE(__CHAINMODE__) (((__CHAINMODE__) == CRYP_CHAINMODE_AES_ECB) || \ 565 ((__CHAINMODE__) == CRYP_CHAINMODE_AES_CBC) || \ 566 ((__CHAINMODE__) == CRYP_CHAINMODE_AES_CTR) || \ 567 ((__CHAINMODE__) == CRYP_CHAINMODE_AES_GCM_GMAC) || \ 568 ((__CHAINMODE__) == CRYP_CHAINMODE_AES_CCM)) 569 #else 570 #define IS_CRYP_CHAINMODE(__CHAINMODE__) (((__CHAINMODE__) == CRYP_CHAINMODE_AES_ECB) || \ 571 ((__CHAINMODE__) == CRYP_CHAINMODE_AES_CBC) || \ 572 ((__CHAINMODE__) == CRYP_CHAINMODE_AES_CTR) || \ 573 ((__CHAINMODE__) == CRYP_CHAINMODE_AES_GCM_GMAC) || \ 574 ((__CHAINMODE__) == CRYP_CHAINMODE_AES_CMAC)) 575 #endif 576 577 /** 578 * @brief Verify the deciphering key write option. 579 * @param __WRITE__ deciphering key write option. 580 * @retval SET (__WRITE__ is valid) or RESET (__WRITE__ is invalid) 581 */ 582 #define IS_CRYP_WRITE(__WRITE__) (((__WRITE__) == CRYP_KEY_WRITE_ENABLE) || \ 583 ((__WRITE__) == CRYP_KEY_WRITE_DISABLE)) 584 585 /** 586 * @brief Verify the CRYP input data DMA mode. 587 * @param __MODE__ CRYP input data DMA mode. 588 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) 589 */ 590 #define IS_CRYP_DMAIN(__MODE__) (((__MODE__) == CRYP_DMAIN_DISABLE) || \ 591 ((__MODE__) == CRYP_DMAIN_ENABLE)) 592 593 /** 594 * @brief Verify the CRYP output data DMA mode. 595 * @param __MODE__ CRYP output data DMA mode. 596 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) 597 */ 598 #define IS_CRYP_DMAOUT(__MODE__) (((__MODE__) == CRYP_DMAOUT_DISABLE) || \ 599 ((__MODE__) == CRYP_DMAOUT_ENABLE)) 600 601 /** 602 * @brief Verify the CRYP AES ciphering/deciphering/authentication algorithm phase. 603 * @param __PHASE__ CRYP AES ciphering/deciphering/authentication algorithm phase. 604 * @retval SET (__PHASE__ is valid) or RESET (__PHASE__ is invalid) 605 */ 606 #define IS_CRYP_GCMCMAC_PHASE(__PHASE__) (((__PHASE__) == CRYP_INIT_PHASE) || \ 607 ((__PHASE__) == CRYP_HEADER_PHASE) || \ 608 ((__PHASE__) == CRYP_PAYLOAD_PHASE) || \ 609 ((__PHASE__) == CRYP_FINAL_PHASE)) 610 611 /** 612 * @} 613 */ 614 615 /* Include CRYP HAL Extended module */ 616 #include "stm32l4xx_hal_cryp_ex.h" 617 618 /* Exported functions --------------------------------------------------------*/ 619 /** @addtogroup CRYP_Exported_Functions CRYP Exported Functions 620 * @{ 621 */ 622 623 /** @addtogroup CRYP_Exported_Functions_Group1 Initialization and deinitialization functions 624 * @{ 625 */ 626 627 /* Initialization/de-initialization functions ********************************/ 628 HAL_StatusTypeDef HAL_CRYP_Init(CRYP_HandleTypeDef *hcryp); 629 HAL_StatusTypeDef HAL_CRYP_DeInit(CRYP_HandleTypeDef *hcryp); 630 631 /* MSP initialization/de-initialization functions ****************************/ 632 void HAL_CRYP_MspInit(CRYP_HandleTypeDef *hcryp); 633 void HAL_CRYP_MspDeInit(CRYP_HandleTypeDef *hcryp); 634 635 /** 636 * @} 637 */ 638 639 /** @addtogroup CRYP_Exported_Functions_Group2 AES processing functions 640 * @{ 641 */ 642 643 /* AES encryption/decryption processing functions ****************************/ 644 645 /* AES encryption/decryption using polling ***********************************/ 646 HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout); 647 HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout); 648 HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout); 649 HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout); 650 HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout); 651 HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout); 652 653 /* AES encryption/decryption using interrupt *********************************/ 654 HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData); 655 HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData); 656 HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData); 657 HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData); 658 HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData); 659 HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData); 660 661 /* AES encryption/decryption using DMA ***************************************/ 662 HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData); 663 HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData); 664 HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData); 665 HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData); 666 HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData); 667 HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData); 668 669 /** 670 * @} 671 */ 672 673 /** @addtogroup CRYP_Exported_Functions_Group3 Callback functions 674 * @{ 675 */ 676 /* CallBack functions ********************************************************/ 677 void HAL_CRYP_InCpltCallback(CRYP_HandleTypeDef *hcryp); 678 void HAL_CRYP_OutCpltCallback(CRYP_HandleTypeDef *hcryp); 679 void HAL_CRYP_ErrorCallback(CRYP_HandleTypeDef *hcryp); 680 /* Callbacks Register/UnRegister functions ***********************************/ 681 #if (USE_HAL_CRYP_REGISTER_CALLBACKS == 1) 682 HAL_StatusTypeDef HAL_CRYP_RegisterCallback(CRYP_HandleTypeDef *hcryp, HAL_CRYP_CallbackIDTypeDef CallbackID, pCRYP_CallbackTypeDef pCallback); 683 HAL_StatusTypeDef HAL_CRYP_UnRegisterCallback(CRYP_HandleTypeDef *hcryp, HAL_CRYP_CallbackIDTypeDef CallbackID); 684 #endif /* USE_HAL_CRYP_REGISTER_CALLBACKS */ 685 686 /** 687 * @} 688 */ 689 690 /** @addtogroup CRYP_Exported_Functions_Group4 CRYP IRQ handler 691 * @{ 692 */ 693 694 /* AES interrupt handling function *******************************************/ 695 void HAL_CRYP_IRQHandler(CRYP_HandleTypeDef *hcryp); 696 697 /** 698 * @} 699 */ 700 701 /** @addtogroup CRYP_Exported_Functions_Group5 Peripheral State functions 702 * @{ 703 */ 704 705 /* Peripheral State functions ************************************************/ 706 HAL_CRYP_STATETypeDef HAL_CRYP_GetState(CRYP_HandleTypeDef *hcryp); 707 uint32_t HAL_CRYP_GetError(CRYP_HandleTypeDef *hcryp); 708 709 /** 710 * @} 711 */ 712 713 /** 714 * @} 715 */ 716 717 /** 718 * @} 719 */ 720 721 #endif /* AES */ 722 723 /** 724 * @} 725 */ 726 727 #ifdef __cplusplus 728 } 729 #endif 730 731 #endif /* STM32L4xx_HAL_CRYP_H */ 732 733 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 734