1 /** 2 ****************************************************************************** 3 * @file stm32f4xx_hal_sai.h 4 * @author MCD Application Team 5 * @brief Header file of SAI HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * <h2><center>© Copyright (c) 2017 STMicroelectronics. 10 * All rights reserved.</center></h2> 11 * 12 * This software component is licensed by ST under BSD 3-Clause license, 13 * the "License"; You may not use this file except in compliance with the 14 * License. You may obtain a copy of the License at: 15 * opensource.org/licenses/BSD-3-Clause 16 * 17 ****************************************************************************** 18 */ 19 20 /* Define to prevent recursive inclusion -------------------------------------*/ 21 #ifndef __STM32F4xx_HAL_SAI_H 22 #define __STM32F4xx_HAL_SAI_H 23 24 #ifdef __cplusplus 25 extern "C" { 26 #endif 27 28 /* Includes ------------------------------------------------------------------*/ 29 #include "stm32f4xx_hal_def.h" 30 31 /** @addtogroup STM32F4xx_HAL_Driver 32 * @{ 33 */ 34 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \ 35 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F413xx) || \ 36 defined(STM32F423xx) 37 38 /** @addtogroup SAI 39 * @{ 40 */ 41 42 /* Exported types ------------------------------------------------------------*/ 43 /** @defgroup SAI_Exported_Types SAI Exported Types 44 * @{ 45 */ 46 47 /** 48 * @brief HAL State structures definition 49 */ 50 typedef enum 51 { 52 HAL_SAI_STATE_RESET = 0x00U, /*!< SAI not yet initialized or disabled */ 53 HAL_SAI_STATE_READY = 0x01U, /*!< SAI initialized and ready for use */ 54 HAL_SAI_STATE_BUSY = 0x02U, /*!< SAI internal process is ongoing */ 55 HAL_SAI_STATE_BUSY_TX = 0x12U, /*!< Data transmission process is ongoing */ 56 HAL_SAI_STATE_BUSY_RX = 0x22U, /*!< Data reception process is ongoing */ 57 HAL_SAI_STATE_TIMEOUT = 0x03U, /*!< SAI timeout state */ 58 HAL_SAI_STATE_ERROR = 0x04U /*!< SAI error state */ 59 }HAL_SAI_StateTypeDef; 60 61 /** 62 * @brief SAI Callback prototype 63 */ 64 typedef void (*SAIcallback)(void); 65 66 /** @defgroup SAI_Init_Structure_definition SAI Init Structure definition 67 * @brief SAI Init Structure definition 68 * @{ 69 */ 70 typedef struct 71 { 72 uint32_t AudioMode; /*!< Specifies the SAI Block audio Mode. 73 This parameter can be a value of @ref SAI_Block_Mode */ 74 75 uint32_t Synchro; /*!< Specifies SAI Block synchronization 76 This parameter can be a value of @ref SAI_Block_Synchronization */ 77 78 uint32_t SynchroExt; /*!< Specifies SAI external output synchronization, this setup is common 79 for BlockA and BlockB 80 This parameter can be a value of @ref SAI_Block_SyncExt 81 @note: If both audio blocks of same SAI are used, this parameter has 82 to be set to the same value for each audio block */ 83 84 uint32_t OutputDrive; /*!< Specifies when SAI Block outputs are driven. 85 This parameter can be a value of @ref SAI_Block_Output_Drive 86 @note this value has to be set before enabling the audio block 87 but after the audio block configuration. */ 88 89 uint32_t NoDivider; /*!< Specifies whether master clock will be divided or not. 90 This parameter can be a value of @ref SAI_Block_NoDivider 91 @note If bit NODIV in the SAI_xCR1 register is cleared, the frame length 92 should be aligned to a number equal to a power of 2, from 8 to 256. 93 If bit NODIV in the SAI_xCR1 register is set, the frame length can 94 take any of the values without constraint since the input clock of 95 the audio block should be equal to the bit clock. 96 There is no MCLK_x clock which can be output. */ 97 98 uint32_t FIFOThreshold; /*!< Specifies SAI Block FIFO threshold. 99 This parameter can be a value of @ref SAI_Block_Fifo_Threshold */ 100 101 uint32_t ClockSource; /*!< Specifies the SAI Block x Clock source. 102 This parameter is not used for STM32F446xx devices. */ 103 104 uint32_t AudioFrequency; /*!< Specifies the audio frequency sampling. 105 This parameter can be a value of @ref SAI_Audio_Frequency */ 106 107 uint32_t Mckdiv; /*!< Specifies the master clock divider. 108 This parameter must be a number between Min_Data = 0 and Max_Data = 15. 109 @note This parameter is used only if AudioFrequency is set to 110 SAI_AUDIO_FREQUENCY_MCKDIV otherwise it is internally computed. */ 111 112 uint32_t MonoStereoMode; /*!< Specifies if the mono or stereo mode is selected. 113 This parameter can be a value of @ref SAI_Mono_Stereo_Mode */ 114 115 uint32_t CompandingMode; /*!< Specifies the companding mode type. 116 This parameter can be a value of @ref SAI_Block_Companding_Mode */ 117 118 uint32_t TriState; /*!< Specifies the companding mode type. 119 This parameter can be a value of @ref SAI_TRIState_Management */ 120 121 /* This part of the structure is automatically filled if your are using the high level intialisation 122 function HAL_SAI_InitProtocol */ 123 124 uint32_t Protocol; /*!< Specifies the SAI Block protocol. 125 This parameter can be a value of @ref SAI_Block_Protocol */ 126 127 uint32_t DataSize; /*!< Specifies the SAI Block data size. 128 This parameter can be a value of @ref SAI_Block_Data_Size */ 129 130 uint32_t FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit. 131 This parameter can be a value of @ref SAI_Block_MSB_LSB_transmission */ 132 133 uint32_t ClockStrobing; /*!< Specifies the SAI Block clock strobing edge sensitivity. 134 This parameter can be a value of @ref SAI_Block_Clock_Strobing */ 135 }SAI_InitTypeDef; 136 /** 137 * @} 138 */ 139 140 /** @defgroup SAI_Frame_Structure_definition SAI Frame Structure definition 141 * @brief SAI Frame Init structure definition 142 * @{ 143 */ 144 typedef struct 145 { 146 uint32_t FrameLength; /*!< Specifies the Frame length, the number of SCK clocks for each audio frame. 147 This parameter must be a number between Min_Data = 8 and Max_Data = 256. 148 @note If master clock MCLK_x pin is declared as an output, the frame length 149 should be aligned to a number equal to power of 2 in order to keep 150 in an audio frame, an integer number of MCLK pulses by bit Clock. */ 151 152 uint32_t ActiveFrameLength; /*!< Specifies the Frame synchronization active level length. 153 This Parameter specifies the length in number of bit clock (SCK + 1) 154 of the active level of FS signal in audio frame. 155 This parameter must be a number between Min_Data = 1 and Max_Data = 128 */ 156 157 uint32_t FSDefinition; /*!< Specifies the Frame synchronization definition. 158 This parameter can be a value of @ref SAI_Block_FS_Definition */ 159 160 uint32_t FSPolarity; /*!< Specifies the Frame synchronization Polarity. 161 This parameter can be a value of @ref SAI_Block_FS_Polarity */ 162 163 uint32_t FSOffset; /*!< Specifies the Frame synchronization Offset. 164 This parameter can be a value of @ref SAI_Block_FS_Offset */ 165 }SAI_FrameInitTypeDef; 166 /** 167 * @} 168 */ 169 170 /** @defgroup SAI_Slot_Structure_definition SAI Slot Structure definition 171 * @brief SAI Block Slot Init Structure definition 172 * @{ 173 */ 174 typedef struct 175 { 176 uint32_t FirstBitOffset; /*!< Specifies the position of first data transfer bit in the slot. 177 This parameter must be a number between Min_Data = 0 and Max_Data = 24 */ 178 179 uint32_t SlotSize; /*!< Specifies the Slot Size. 180 This parameter can be a value of @ref SAI_Block_Slot_Size */ 181 182 uint32_t SlotNumber; /*!< Specifies the number of slot in the audio frame. 183 This parameter must be a number between Min_Data = 1 and Max_Data = 16 */ 184 185 uint32_t SlotActive; /*!< Specifies the slots in audio frame that will be activated. 186 This parameter can be a value of @ref SAI_Block_Slot_Active */ 187 }SAI_SlotInitTypeDef; 188 /** 189 * @} 190 */ 191 192 /** @defgroup SAI_Handle_Structure_definition SAI Handle Structure definition 193 * @brief SAI handle Structure definition 194 * @{ 195 */ 196 typedef struct __SAI_HandleTypeDef 197 { 198 SAI_Block_TypeDef *Instance; /*!< SAI Blockx registers base address */ 199 200 SAI_InitTypeDef Init; /*!< SAI communication parameters */ 201 202 SAI_FrameInitTypeDef FrameInit; /*!< SAI Frame configuration parameters */ 203 204 SAI_SlotInitTypeDef SlotInit; /*!< SAI Slot configuration parameters */ 205 206 uint8_t *pBuffPtr; /*!< Pointer to SAI transfer Buffer */ 207 208 uint16_t XferSize; /*!< SAI transfer size */ 209 210 uint16_t XferCount; /*!< SAI transfer counter */ 211 212 DMA_HandleTypeDef *hdmatx; /*!< SAI Tx DMA handle parameters */ 213 214 DMA_HandleTypeDef *hdmarx; /*!< SAI Rx DMA handle parameters */ 215 216 SAIcallback mutecallback;/*!< SAI mute callback */ 217 218 void (*InterruptServiceRoutine)(struct __SAI_HandleTypeDef *hsai); /* function pointer for IRQ handler */ 219 220 HAL_LockTypeDef Lock; /*!< SAI locking object */ 221 222 __IO HAL_SAI_StateTypeDef State; /*!< SAI communication state */ 223 224 __IO uint32_t ErrorCode; /*!< SAI Error code */ 225 226 #if (USE_HAL_SAI_REGISTER_CALLBACKS == 1) 227 void (*RxCpltCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI receive complete callback */ 228 void (*RxHalfCpltCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI receive half complete callback */ 229 void (*TxCpltCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI transmit complete callback */ 230 void (*TxHalfCpltCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI transmit half complete callback */ 231 void (*ErrorCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI error callback */ 232 void (*MspInitCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI MSP init callback */ 233 void (*MspDeInitCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI MSP de-init callback */ 234 #endif /* USE_HAL_SAI_REGISTER_CALLBACKS */ 235 } SAI_HandleTypeDef; 236 /** 237 * @} 238 */ 239 240 #if (USE_HAL_SAI_REGISTER_CALLBACKS == 1) 241 /** 242 * @brief SAI callback ID enumeration definition 243 */ 244 typedef enum 245 { 246 HAL_SAI_RX_COMPLETE_CB_ID = 0x00U, /*!< SAI receive complete callback ID */ 247 HAL_SAI_RX_HALFCOMPLETE_CB_ID = 0x01U, /*!< SAI receive half complete callback ID */ 248 HAL_SAI_TX_COMPLETE_CB_ID = 0x02U, /*!< SAI transmit complete callback ID */ 249 HAL_SAI_TX_HALFCOMPLETE_CB_ID = 0x03U, /*!< SAI transmit half complete callback ID */ 250 HAL_SAI_ERROR_CB_ID = 0x04U, /*!< SAI error callback ID */ 251 HAL_SAI_MSPINIT_CB_ID = 0x05U, /*!< SAI MSP init callback ID */ 252 HAL_SAI_MSPDEINIT_CB_ID = 0x06U /*!< SAI MSP de-init callback ID */ 253 } HAL_SAI_CallbackIDTypeDef; 254 255 /** 256 * @brief SAI callback pointer definition 257 */ 258 typedef void (*pSAI_CallbackTypeDef)(SAI_HandleTypeDef *hsai); 259 #endif /* USE_HAL_SAI_REGISTER_CALLBACKS */ 260 261 /** 262 * @} 263 */ 264 265 /* Exported constants --------------------------------------------------------*/ 266 /** @defgroup SAI_Exported_Constants SAI Exported Constants 267 * @{ 268 */ 269 270 /** @defgroup SAI_Error_Code SAI Error Code 271 * @{ 272 */ 273 #define HAL_SAI_ERROR_NONE 0x00000000U /*!< No error */ 274 #define HAL_SAI_ERROR_OVR 0x00000001U /*!< Overrun Error */ 275 #define HAL_SAI_ERROR_UDR 0x00000002U /*!< Underrun error */ 276 #define HAL_SAI_ERROR_AFSDET 0x00000004U /*!< Anticipated Frame synchronisation detection */ 277 #define HAL_SAI_ERROR_LFSDET 0x00000008U /*!< Late Frame synchronisation detection */ 278 #define HAL_SAI_ERROR_CNREADY 0x00000010U /*!< codec not ready */ 279 #define HAL_SAI_ERROR_WCKCFG 0x00000020U /*!< Wrong clock configuration */ 280 #define HAL_SAI_ERROR_TIMEOUT 0x00000040U /*!< Timeout error */ 281 #define HAL_SAI_ERROR_DMA 0x00000080U /*!< DMA error */ 282 #if (USE_HAL_SAI_REGISTER_CALLBACKS == 1) 283 #define HAL_SAI_ERROR_INVALID_CALLBACK 0x00000100U /*!< Invalid callback error */ 284 #endif /* USE_HAL_SAI_REGISTER_CALLBACKS */ 285 /** 286 * @} 287 */ 288 289 /** @defgroup SAI_Block_SyncExt SAI External synchronisation 290 * @{ 291 */ 292 #define SAI_SYNCEXT_DISABLE 0U 293 #define SAI_SYNCEXT_OUTBLOCKA_ENABLE 1U 294 #define SAI_SYNCEXT_OUTBLOCKB_ENABLE 2U 295 /** 296 * @} 297 */ 298 299 /** @defgroup SAI_Protocol SAI Supported protocol 300 * @{ 301 */ 302 #define SAI_I2S_STANDARD 0U 303 #define SAI_I2S_MSBJUSTIFIED 1U 304 #define SAI_I2S_LSBJUSTIFIED 2U 305 #define SAI_PCM_LONG 3U 306 #define SAI_PCM_SHORT 4U 307 /** 308 * @} 309 */ 310 311 /** @defgroup SAI_Protocol_DataSize SAI protocol data size 312 * @{ 313 */ 314 #define SAI_PROTOCOL_DATASIZE_16BIT 0U 315 #define SAI_PROTOCOL_DATASIZE_16BITEXTENDED 1U 316 #define SAI_PROTOCOL_DATASIZE_24BIT 2U 317 #define SAI_PROTOCOL_DATASIZE_32BIT 3U 318 /** 319 * @} 320 */ 321 322 /** @defgroup SAI_Audio_Frequency SAI Audio Frequency 323 * @{ 324 */ 325 #define SAI_AUDIO_FREQUENCY_192K 192000U 326 #define SAI_AUDIO_FREQUENCY_96K 96000U 327 #define SAI_AUDIO_FREQUENCY_48K 48000U 328 #define SAI_AUDIO_FREQUENCY_44K 44100U 329 #define SAI_AUDIO_FREQUENCY_32K 32000U 330 #define SAI_AUDIO_FREQUENCY_22K 22050U 331 #define SAI_AUDIO_FREQUENCY_16K 16000U 332 #define SAI_AUDIO_FREQUENCY_11K 11025U 333 #define SAI_AUDIO_FREQUENCY_8K 8000U 334 #define SAI_AUDIO_FREQUENCY_MCKDIV 0U 335 /** 336 * @} 337 */ 338 339 /** @defgroup SAI_Block_Mode SAI Block Mode 340 * @{ 341 */ 342 #define SAI_MODEMASTER_TX 0x00000000U 343 #define SAI_MODEMASTER_RX ((uint32_t)SAI_xCR1_MODE_0) 344 #define SAI_MODESLAVE_TX ((uint32_t)SAI_xCR1_MODE_1) 345 #define SAI_MODESLAVE_RX ((uint32_t)(SAI_xCR1_MODE_1 | SAI_xCR1_MODE_0)) 346 /** 347 * @} 348 */ 349 350 /** @defgroup SAI_Block_Protocol SAI Block Protocol 351 * @{ 352 */ 353 #define SAI_FREE_PROTOCOL 0x00000000U 354 #define SAI_SPDIF_PROTOCOL ((uint32_t)SAI_xCR1_PRTCFG_0) 355 #define SAI_AC97_PROTOCOL ((uint32_t)SAI_xCR1_PRTCFG_1) 356 /** 357 * @} 358 */ 359 360 /** @defgroup SAI_Block_Data_Size SAI Block Data Size 361 * @{ 362 */ 363 #define SAI_DATASIZE_8 ((uint32_t)SAI_xCR1_DS_1) 364 #define SAI_DATASIZE_10 ((uint32_t)(SAI_xCR1_DS_1 | SAI_xCR1_DS_0)) 365 #define SAI_DATASIZE_16 ((uint32_t)SAI_xCR1_DS_2) 366 #define SAI_DATASIZE_20 ((uint32_t)(SAI_xCR1_DS_2 | SAI_xCR1_DS_0)) 367 #define SAI_DATASIZE_24 ((uint32_t)(SAI_xCR1_DS_2 | SAI_xCR1_DS_1)) 368 #define SAI_DATASIZE_32 ((uint32_t)(SAI_xCR1_DS_2 | SAI_xCR1_DS_1 | SAI_xCR1_DS_0)) 369 /** 370 * @} 371 */ 372 373 /** @defgroup SAI_Block_MSB_LSB_transmission SAI Block MSB LSB transmission 374 * @{ 375 */ 376 #define SAI_FIRSTBIT_MSB 0x00000000U 377 #define SAI_FIRSTBIT_LSB ((uint32_t)SAI_xCR1_LSBFIRST) 378 /** 379 * @} 380 */ 381 382 /** @defgroup SAI_Block_Clock_Strobing SAI Block Clock Strobing 383 * @{ 384 */ 385 #define SAI_CLOCKSTROBING_FALLINGEDGE 0U 386 #define SAI_CLOCKSTROBING_RISINGEDGE 1U 387 /** 388 * @} 389 */ 390 391 /** @defgroup SAI_Block_Synchronization SAI Block Synchronization 392 * @{ 393 */ 394 #define SAI_ASYNCHRONOUS 0U /*!< Asynchronous */ 395 #define SAI_SYNCHRONOUS 1U /*!< Synchronous with other block of same SAI */ 396 #define SAI_SYNCHRONOUS_EXT_SAI1 2U /*!< Synchronous with other SAI, SAI1 */ 397 #define SAI_SYNCHRONOUS_EXT_SAI2 3U /*!< Synchronous with other SAI, SAI2 */ 398 /** 399 * @} 400 */ 401 402 /** @defgroup SAI_Block_Output_Drive SAI Block Output Drive 403 * @{ 404 */ 405 #define SAI_OUTPUTDRIVE_DISABLE 0x00000000U 406 #define SAI_OUTPUTDRIVE_ENABLE ((uint32_t)SAI_xCR1_OUTDRIV) 407 /** 408 * @} 409 */ 410 411 /** @defgroup SAI_Block_NoDivider SAI Block NoDivider 412 * @{ 413 */ 414 #define SAI_MASTERDIVIDER_ENABLE 0x00000000U 415 #define SAI_MASTERDIVIDER_DISABLE ((uint32_t)SAI_xCR1_NODIV) 416 /** 417 * @} 418 */ 419 420 /** @defgroup SAI_Block_FS_Definition SAI Block FS Definition 421 * @{ 422 */ 423 #define SAI_FS_STARTFRAME 0x00000000U 424 #define SAI_FS_CHANNEL_IDENTIFICATION ((uint32_t)SAI_xFRCR_FSDEF) 425 /** 426 * @} 427 */ 428 429 /** @defgroup SAI_Block_FS_Polarity SAI Block FS Polarity 430 * @{ 431 */ 432 #define SAI_FS_ACTIVE_LOW 0x00000000U 433 #define SAI_FS_ACTIVE_HIGH ((uint32_t)SAI_xFRCR_FSPOL) 434 /** 435 * @} 436 */ 437 438 /** @defgroup SAI_Block_FS_Offset SAI Block FS Offset 439 * @{ 440 */ 441 #define SAI_FS_FIRSTBIT 0x00000000U 442 #define SAI_FS_BEFOREFIRSTBIT ((uint32_t)SAI_xFRCR_FSOFF) 443 /** 444 * @} 445 */ 446 447 /** @defgroup SAI_Block_Slot_Size SAI Block Slot Size 448 * @{ 449 */ 450 #define SAI_SLOTSIZE_DATASIZE 0x00000000U 451 #define SAI_SLOTSIZE_16B ((uint32_t)SAI_xSLOTR_SLOTSZ_0) 452 #define SAI_SLOTSIZE_32B ((uint32_t)SAI_xSLOTR_SLOTSZ_1) 453 /** 454 * @} 455 */ 456 457 /** @defgroup SAI_Block_Slot_Active SAI Block Slot Active 458 * @{ 459 */ 460 #define SAI_SLOT_NOTACTIVE 0x00000000U 461 #define SAI_SLOTACTIVE_0 0x00000001U 462 #define SAI_SLOTACTIVE_1 0x00000002U 463 #define SAI_SLOTACTIVE_2 0x00000004U 464 #define SAI_SLOTACTIVE_3 0x00000008U 465 #define SAI_SLOTACTIVE_4 0x00000010U 466 #define SAI_SLOTACTIVE_5 0x00000020U 467 #define SAI_SLOTACTIVE_6 0x00000040U 468 #define SAI_SLOTACTIVE_7 0x00000080U 469 #define SAI_SLOTACTIVE_8 0x00000100U 470 #define SAI_SLOTACTIVE_9 0x00000200U 471 #define SAI_SLOTACTIVE_10 0x00000400U 472 #define SAI_SLOTACTIVE_11 0x00000800U 473 #define SAI_SLOTACTIVE_12 0x00001000U 474 #define SAI_SLOTACTIVE_13 0x00002000U 475 #define SAI_SLOTACTIVE_14 0x00004000U 476 #define SAI_SLOTACTIVE_15 0x00008000U 477 #define SAI_SLOTACTIVE_ALL 0x0000FFFFU 478 /** 479 * @} 480 */ 481 482 /** @defgroup SAI_Mono_Stereo_Mode SAI Mono Stereo Mode 483 * @{ 484 */ 485 #define SAI_STEREOMODE 0x00000000U 486 #define SAI_MONOMODE ((uint32_t)SAI_xCR1_MONO) 487 /** 488 * @} 489 */ 490 491 /** @defgroup SAI_TRIState_Management SAI TRIState Management 492 * @{ 493 */ 494 #define SAI_OUTPUT_NOTRELEASED 0x00000000U 495 #define SAI_OUTPUT_RELEASED ((uint32_t)SAI_xCR2_TRIS) 496 /** 497 * @} 498 */ 499 500 /** @defgroup SAI_Block_Fifo_Threshold SAI Block Fifo Threshold 501 * @{ 502 */ 503 #define SAI_FIFOTHRESHOLD_EMPTY 0x00000000U 504 #define SAI_FIFOTHRESHOLD_1QF ((uint32_t)(SAI_xCR2_FTH_0)) 505 #define SAI_FIFOTHRESHOLD_HF ((uint32_t)(SAI_xCR2_FTH_1)) 506 #define SAI_FIFOTHRESHOLD_3QF ((uint32_t)(SAI_xCR2_FTH_1 | SAI_xCR2_FTH_0)) 507 #define SAI_FIFOTHRESHOLD_FULL ((uint32_t)(SAI_xCR2_FTH_2)) 508 /** 509 * @} 510 */ 511 512 /** @defgroup SAI_Block_Companding_Mode SAI Block Companding Mode 513 * @{ 514 */ 515 #define SAI_NOCOMPANDING 0x00000000U 516 #define SAI_ULAW_1CPL_COMPANDING ((uint32_t)(SAI_xCR2_COMP_1)) 517 #define SAI_ALAW_1CPL_COMPANDING ((uint32_t)(SAI_xCR2_COMP_1 | SAI_xCR2_COMP_0)) 518 #define SAI_ULAW_2CPL_COMPANDING ((uint32_t)(SAI_xCR2_COMP_1 | SAI_xCR2_CPL)) 519 #define SAI_ALAW_2CPL_COMPANDING ((uint32_t)(SAI_xCR2_COMP_1 | SAI_xCR2_COMP_0 | SAI_xCR2_CPL)) 520 /** 521 * @} 522 */ 523 524 /** @defgroup SAI_Block_Mute_Value SAI Block Mute Value 525 * @{ 526 */ 527 #define SAI_ZERO_VALUE 0x00000000U 528 #define SAI_LAST_SENT_VALUE ((uint32_t)SAI_xCR2_MUTEVAL) 529 /** 530 * @} 531 */ 532 533 /** @defgroup SAI_Block_Interrupts_Definition SAI Block Interrupts Definition 534 * @{ 535 */ 536 #define SAI_IT_OVRUDR ((uint32_t)SAI_xIMR_OVRUDRIE) 537 #define SAI_IT_MUTEDET ((uint32_t)SAI_xIMR_MUTEDETIE) 538 #define SAI_IT_WCKCFG ((uint32_t)SAI_xIMR_WCKCFGIE) 539 #define SAI_IT_FREQ ((uint32_t)SAI_xIMR_FREQIE) 540 #define SAI_IT_CNRDY ((uint32_t)SAI_xIMR_CNRDYIE) 541 #define SAI_IT_AFSDET ((uint32_t)SAI_xIMR_AFSDETIE) 542 #define SAI_IT_LFSDET ((uint32_t)SAI_xIMR_LFSDETIE) 543 /** 544 * @} 545 */ 546 547 /** @defgroup SAI_Block_Flags_Definition SAI Block Flags Definition 548 * @{ 549 */ 550 #define SAI_FLAG_OVRUDR ((uint32_t)SAI_xSR_OVRUDR) 551 #define SAI_FLAG_MUTEDET ((uint32_t)SAI_xSR_MUTEDET) 552 #define SAI_FLAG_WCKCFG ((uint32_t)SAI_xSR_WCKCFG) 553 #define SAI_FLAG_FREQ ((uint32_t)SAI_xSR_FREQ) 554 #define SAI_FLAG_CNRDY ((uint32_t)SAI_xSR_CNRDY) 555 #define SAI_FLAG_AFSDET ((uint32_t)SAI_xSR_AFSDET) 556 #define SAI_FLAG_LFSDET ((uint32_t)SAI_xSR_LFSDET) 557 /** 558 * @} 559 */ 560 561 /** @defgroup SAI_Block_Fifo_Status_Level SAI Block Fifo Status Level 562 * @{ 563 */ 564 #define SAI_FIFOSTATUS_EMPTY 0x00000000U 565 #define SAI_FIFOSTATUS_LESS1QUARTERFULL 0x00010000U 566 #define SAI_FIFOSTATUS_1QUARTERFULL 0x00020000U 567 #define SAI_FIFOSTATUS_HALFFULL 0x00030000U 568 #define SAI_FIFOSTATUS_3QUARTERFULL 0x00040000U 569 #define SAI_FIFOSTATUS_FULL 0x00050000U 570 /** 571 * @} 572 */ 573 574 /** 575 * @} 576 */ 577 578 /* Exported macro ------------------------------------------------------------*/ 579 /** @defgroup SAI_Exported_Macros SAI Exported Macros 580 * @brief macros to handle interrupts and specific configurations 581 * @{ 582 */ 583 584 /** @brief Reset SAI handle state 585 * @param __HANDLE__ specifies the SAI Handle. 586 * @retval None 587 */ 588 #if (USE_HAL_SAI_REGISTER_CALLBACKS == 1) 589 #define __HAL_SAI_RESET_HANDLE_STATE(__HANDLE__) do{ \ 590 (__HANDLE__)->State = HAL_SAI_STATE_RESET; \ 591 (__HANDLE__)->MspInitCallback = NULL; \ 592 (__HANDLE__)->MspDeInitCallback = NULL; \ 593 } while(0U) 594 #else 595 #define __HAL_SAI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SAI_STATE_RESET) 596 #endif /* USE_HAL_SAI_REGISTER_CALLBACKS */ 597 598 /** @brief Enable or disable the specified SAI interrupts. 599 * @param __HANDLE__ specifies the SAI Handle. 600 * @param __INTERRUPT__ specifies the interrupt source to enable or disable. 601 * This parameter can be one of the following values: 602 * @arg SAI_IT_OVRUDR: Overrun underrun interrupt enable 603 * @arg SAI_IT_MUTEDET: Mute detection interrupt enable 604 * @arg SAI_IT_WCKCFG: Wrong Clock Configuration interrupt enable 605 * @arg SAI_IT_FREQ: FIFO request interrupt enable 606 * @arg SAI_IT_CNRDY: Codec not ready interrupt enable 607 * @arg SAI_IT_AFSDET: Anticipated frame synchronization detection interrupt enable 608 * @arg SAI_IT_LFSDET: Late frame synchronization detection interrupt enable 609 * @retval None 610 */ 611 #define __HAL_SAI_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IMR |= (__INTERRUPT__)) 612 #define __HAL_SAI_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IMR &= (~(__INTERRUPT__))) 613 614 /** @brief Check if the specified SAI interrupt source is enabled or disabled. 615 * @param __HANDLE__ specifies the SAI Handle. 616 * This parameter can be SAI where x: 1, 2, or 3 to select the SAI peripheral. 617 * @param __INTERRUPT__ specifies the SAI interrupt source to check. 618 * This parameter can be one of the following values: 619 * @arg SAI_IT_OVRUDR: Overrun underrun interrupt enable 620 * @arg SAI_IT_MUTEDET: Mute detection interrupt enable 621 * @arg SAI_IT_WCKCFG: Wrong Clock Configuration interrupt enable 622 * @arg SAI_IT_FREQ: FIFO request interrupt enable 623 * @arg SAI_IT_CNRDY: Codec not ready interrupt enable 624 * @arg SAI_IT_AFSDET: Anticipated frame synchronization detection interrupt enable 625 * @arg SAI_IT_LFSDET: Late frame synchronization detection interrupt enable 626 * @retval The new state of __INTERRUPT__ (TRUE or FALSE). 627 */ 628 #define __HAL_SAI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IMR & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) 629 630 /** @brief Check whether the specified SAI flag is set or not. 631 * @param __HANDLE__ specifies the SAI Handle. 632 * @param __FLAG__ specifies the flag to check. 633 * This parameter can be one of the following values: 634 * @arg SAI_FLAG_OVRUDR: Overrun underrun flag. 635 * @arg SAI_FLAG_MUTEDET: Mute detection flag. 636 * @arg SAI_FLAG_WCKCFG: Wrong Clock Configuration flag. 637 * @arg SAI_FLAG_FREQ: FIFO request flag. 638 * @arg SAI_FLAG_CNRDY: Codec not ready flag. 639 * @arg SAI_FLAG_AFSDET: Anticipated frame synchronization detection flag. 640 * @arg SAI_FLAG_LFSDET: Late frame synchronization detection flag. 641 * @retval The new state of __FLAG__ (TRUE or FALSE). 642 */ 643 #define __HAL_SAI_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) 644 645 /** @brief Clear the specified SAI pending flag. 646 * @param __HANDLE__ specifies the SAI Handle. 647 * @param __FLAG__ specifies the flag to check. 648 * This parameter can be any combination of the following values: 649 * @arg SAI_FLAG_OVRUDR: Clear Overrun underrun 650 * @arg SAI_FLAG_MUTEDET: Clear Mute detection 651 * @arg SAI_FLAG_WCKCFG: Clear Wrong Clock Configuration 652 * @arg SAI_FLAG_FREQ: Clear FIFO request 653 * @arg SAI_FLAG_CNRDY: Clear Codec not ready 654 * @arg SAI_FLAG_AFSDET: Clear Anticipated frame synchronization detection 655 * @arg SAI_FLAG_LFSDET: Clear Late frame synchronization detection 656 * @retval None 657 */ 658 #define __HAL_SAI_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->CLRFR = (__FLAG__)) 659 660 /** @brief Enable SAI 661 * @param __HANDLE__ specifies the SAI Handle. 662 * @retval None 663 */ 664 #define __HAL_SAI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SAI_xCR1_SAIEN) 665 666 /** @brief Disable SAI 667 * @param __HANDLE__ specifies the SAI Handle. 668 * @retval None 669 */ 670 #define __HAL_SAI_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~SAI_xCR1_SAIEN) 671 672 /** 673 * @} 674 */ 675 676 /* Include HAL SAI Extension module */ 677 #include "stm32f4xx_hal_sai_ex.h" 678 679 /* Exported functions --------------------------------------------------------*/ 680 /** @addtogroup SAI_Exported_Functions 681 * @{ 682 */ 683 684 /* Initialization/de-initialization functions **********************************/ 685 /** @addtogroup SAI_Exported_Functions_Group1 686 * @{ 687 */ 688 HAL_StatusTypeDef HAL_SAI_InitProtocol(SAI_HandleTypeDef *hsai, uint32_t protocol, uint32_t datasize, uint32_t nbslot); 689 HAL_StatusTypeDef HAL_SAI_Init(SAI_HandleTypeDef *hsai); 690 HAL_StatusTypeDef HAL_SAI_DeInit(SAI_HandleTypeDef *hsai); 691 void HAL_SAI_MspInit(SAI_HandleTypeDef *hsai); 692 void HAL_SAI_MspDeInit(SAI_HandleTypeDef *hsai); 693 694 #if (USE_HAL_SAI_REGISTER_CALLBACKS == 1) 695 /* SAI callbacks register/unregister functions ********************************/ 696 HAL_StatusTypeDef HAL_SAI_RegisterCallback(SAI_HandleTypeDef *hsai, 697 HAL_SAI_CallbackIDTypeDef CallbackID, 698 pSAI_CallbackTypeDef pCallback); 699 HAL_StatusTypeDef HAL_SAI_UnRegisterCallback(SAI_HandleTypeDef *hsai, 700 HAL_SAI_CallbackIDTypeDef CallbackID); 701 #endif /* USE_HAL_SAI_REGISTER_CALLBACKS */ 702 /** 703 * @} 704 */ 705 706 /* I/O operation functions *****************************************************/ 707 /** @addtogroup SAI_Exported_Functions_Group2 708 * @{ 709 */ 710 /* Blocking mode: Polling */ 711 HAL_StatusTypeDef HAL_SAI_Transmit(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size, uint32_t Timeout); 712 HAL_StatusTypeDef HAL_SAI_Receive(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size, uint32_t Timeout); 713 714 /* Non-Blocking mode: Interrupt */ 715 HAL_StatusTypeDef HAL_SAI_Transmit_IT(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size); 716 HAL_StatusTypeDef HAL_SAI_Receive_IT(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size); 717 718 /* Non-Blocking mode: DMA */ 719 HAL_StatusTypeDef HAL_SAI_Transmit_DMA(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size); 720 HAL_StatusTypeDef HAL_SAI_Receive_DMA(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size); 721 HAL_StatusTypeDef HAL_SAI_DMAPause(SAI_HandleTypeDef *hsai); 722 HAL_StatusTypeDef HAL_SAI_DMAResume(SAI_HandleTypeDef *hsai); 723 HAL_StatusTypeDef HAL_SAI_DMAStop(SAI_HandleTypeDef *hsai); 724 725 /* Abort function */ 726 HAL_StatusTypeDef HAL_SAI_Abort(SAI_HandleTypeDef *hsai); 727 728 /* Mute management */ 729 HAL_StatusTypeDef HAL_SAI_EnableTxMuteMode(SAI_HandleTypeDef *hsai, uint16_t val); 730 HAL_StatusTypeDef HAL_SAI_DisableTxMuteMode(SAI_HandleTypeDef *hsai); 731 HAL_StatusTypeDef HAL_SAI_EnableRxMuteMode(SAI_HandleTypeDef *hsai, SAIcallback callback, uint16_t counter); 732 HAL_StatusTypeDef HAL_SAI_DisableRxMuteMode(SAI_HandleTypeDef *hsai); 733 734 /* SAI IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */ 735 void HAL_SAI_IRQHandler(SAI_HandleTypeDef *hsai); 736 void HAL_SAI_TxHalfCpltCallback(SAI_HandleTypeDef *hsai); 737 void HAL_SAI_TxCpltCallback(SAI_HandleTypeDef *hsai); 738 void HAL_SAI_RxHalfCpltCallback(SAI_HandleTypeDef *hsai); 739 void HAL_SAI_RxCpltCallback(SAI_HandleTypeDef *hsai); 740 void HAL_SAI_ErrorCallback(SAI_HandleTypeDef *hsai); 741 /** 742 * @} 743 */ 744 745 /** @addtogroup SAI_Exported_Functions_Group3 746 * @{ 747 */ 748 /* Peripheral State functions ************************************************/ 749 HAL_SAI_StateTypeDef HAL_SAI_GetState(SAI_HandleTypeDef *hsai); 750 uint32_t HAL_SAI_GetError(SAI_HandleTypeDef *hsai); 751 /** 752 * @} 753 */ 754 755 /** 756 * @} 757 */ 758 759 /* Private macros ------------------------------------------------------------*/ 760 /** @addtogroup SAI_Private_Macros 761 * @{ 762 */ 763 #define IS_SAI_BLOCK_SYNCEXT(STATE) (((STATE) == SAI_SYNCEXT_DISABLE) ||\ 764 ((STATE) == SAI_SYNCEXT_OUTBLOCKA_ENABLE) ||\ 765 ((STATE) == SAI_SYNCEXT_OUTBLOCKB_ENABLE)) 766 767 #define IS_SAI_SUPPORTED_PROTOCOL(PROTOCOL) (((PROTOCOL) == SAI_I2S_STANDARD) ||\ 768 ((PROTOCOL) == SAI_I2S_MSBJUSTIFIED) ||\ 769 ((PROTOCOL) == SAI_I2S_LSBJUSTIFIED) ||\ 770 ((PROTOCOL) == SAI_PCM_LONG) ||\ 771 ((PROTOCOL) == SAI_PCM_SHORT)) 772 773 #define IS_SAI_PROTOCOL_DATASIZE(DATASIZE) (((DATASIZE) == SAI_PROTOCOL_DATASIZE_16BIT) ||\ 774 ((DATASIZE) == SAI_PROTOCOL_DATASIZE_16BITEXTENDED) ||\ 775 ((DATASIZE) == SAI_PROTOCOL_DATASIZE_24BIT) ||\ 776 ((DATASIZE) == SAI_PROTOCOL_DATASIZE_32BIT)) 777 778 #define IS_SAI_AUDIO_FREQUENCY(AUDIO) (((AUDIO) == SAI_AUDIO_FREQUENCY_192K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_96K) || \ 779 ((AUDIO) == SAI_AUDIO_FREQUENCY_48K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_44K) || \ 780 ((AUDIO) == SAI_AUDIO_FREQUENCY_32K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_22K) || \ 781 ((AUDIO) == SAI_AUDIO_FREQUENCY_16K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_11K) || \ 782 ((AUDIO) == SAI_AUDIO_FREQUENCY_8K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_MCKDIV)) 783 784 #define IS_SAI_BLOCK_MODE(MODE) (((MODE) == SAI_MODEMASTER_TX) || \ 785 ((MODE) == SAI_MODEMASTER_RX) || \ 786 ((MODE) == SAI_MODESLAVE_TX) || \ 787 ((MODE) == SAI_MODESLAVE_RX)) 788 789 #define IS_SAI_BLOCK_PROTOCOL(PROTOCOL) (((PROTOCOL) == SAI_FREE_PROTOCOL) || \ 790 ((PROTOCOL) == SAI_AC97_PROTOCOL) || \ 791 ((PROTOCOL) == SAI_SPDIF_PROTOCOL)) 792 793 #define IS_SAI_BLOCK_DATASIZE(DATASIZE) (((DATASIZE) == SAI_DATASIZE_8) || \ 794 ((DATASIZE) == SAI_DATASIZE_10) || \ 795 ((DATASIZE) == SAI_DATASIZE_16) || \ 796 ((DATASIZE) == SAI_DATASIZE_20) || \ 797 ((DATASIZE) == SAI_DATASIZE_24) || \ 798 ((DATASIZE) == SAI_DATASIZE_32)) 799 800 #define IS_SAI_BLOCK_FIRST_BIT(BIT) (((BIT) == SAI_FIRSTBIT_MSB) || \ 801 ((BIT) == SAI_FIRSTBIT_LSB)) 802 803 #define IS_SAI_BLOCK_CLOCK_STROBING(CLOCK) (((CLOCK) == SAI_CLOCKSTROBING_FALLINGEDGE) || \ 804 ((CLOCK) == SAI_CLOCKSTROBING_RISINGEDGE)) 805 806 #define IS_SAI_BLOCK_SYNCHRO(SYNCHRO) (((SYNCHRO) == SAI_ASYNCHRONOUS) || \ 807 ((SYNCHRO) == SAI_SYNCHRONOUS) || \ 808 ((SYNCHRO) == SAI_SYNCHRONOUS_EXT_SAI1) ||\ 809 ((SYNCHRO) == SAI_SYNCHRONOUS_EXT_SAI2)) 810 811 #define IS_SAI_BLOCK_OUTPUT_DRIVE(DRIVE) (((DRIVE) == SAI_OUTPUTDRIVE_DISABLE) || \ 812 ((DRIVE) == SAI_OUTPUTDRIVE_ENABLE)) 813 814 #define IS_SAI_BLOCK_NODIVIDER(NODIVIDER) (((NODIVIDER) == SAI_MASTERDIVIDER_ENABLE) || \ 815 ((NODIVIDER) == SAI_MASTERDIVIDER_DISABLE)) 816 817 #define IS_SAI_BLOCK_MUTE_COUNTER(COUNTER) ((COUNTER) <= 63U) 818 819 #define IS_SAI_BLOCK_MUTE_VALUE(VALUE) (((VALUE) == SAI_ZERO_VALUE) || \ 820 ((VALUE) == SAI_LAST_SENT_VALUE)) 821 822 #define IS_SAI_BLOCK_COMPANDING_MODE(MODE) (((MODE) == SAI_NOCOMPANDING) || \ 823 ((MODE) == SAI_ULAW_1CPL_COMPANDING) || \ 824 ((MODE) == SAI_ALAW_1CPL_COMPANDING) || \ 825 ((MODE) == SAI_ULAW_2CPL_COMPANDING) || \ 826 ((MODE) == SAI_ALAW_2CPL_COMPANDING)) 827 828 #define IS_SAI_BLOCK_FIFO_THRESHOLD(THRESHOLD) (((THRESHOLD) == SAI_FIFOTHRESHOLD_EMPTY) || \ 829 ((THRESHOLD) == SAI_FIFOTHRESHOLD_1QF) || \ 830 ((THRESHOLD) == SAI_FIFOTHRESHOLD_HF) || \ 831 ((THRESHOLD) == SAI_FIFOTHRESHOLD_3QF) || \ 832 ((THRESHOLD) == SAI_FIFOTHRESHOLD_FULL)) 833 834 #define IS_SAI_BLOCK_TRISTATE_MANAGEMENT(STATE) (((STATE) == SAI_OUTPUT_NOTRELEASED) ||\ 835 ((STATE) == SAI_OUTPUT_RELEASED)) 836 837 #define IS_SAI_MONO_STEREO_MODE(MODE) (((MODE) == SAI_MONOMODE) ||\ 838 ((MODE) == SAI_STEREOMODE)) 839 840 #define IS_SAI_SLOT_ACTIVE(ACTIVE) ((ACTIVE) <= SAI_SLOTACTIVE_ALL) 841 842 #define IS_SAI_BLOCK_SLOT_NUMBER(NUMBER) ((1U <= (NUMBER)) && ((NUMBER) <= 16U)) 843 844 #define IS_SAI_BLOCK_SLOT_SIZE(SIZE) (((SIZE) == SAI_SLOTSIZE_DATASIZE) || \ 845 ((SIZE) == SAI_SLOTSIZE_16B) || \ 846 ((SIZE) == SAI_SLOTSIZE_32B)) 847 848 #define IS_SAI_BLOCK_FIRSTBIT_OFFSET(OFFSET) ((OFFSET) <= 24U) 849 850 #define IS_SAI_BLOCK_FS_OFFSET(OFFSET) (((OFFSET) == SAI_FS_FIRSTBIT) || \ 851 ((OFFSET) == SAI_FS_BEFOREFIRSTBIT)) 852 853 #define IS_SAI_BLOCK_FS_POLARITY(POLARITY) (((POLARITY) == SAI_FS_ACTIVE_LOW) || \ 854 ((POLARITY) == SAI_FS_ACTIVE_HIGH)) 855 856 #define IS_SAI_BLOCK_FS_DEFINITION(DEFINITION) (((DEFINITION) == SAI_FS_STARTFRAME) || \ 857 ((DEFINITION) == SAI_FS_CHANNEL_IDENTIFICATION)) 858 859 #define IS_SAI_BLOCK_MASTER_DIVIDER(DIVIDER) ((DIVIDER) <= 15U) 860 861 #define IS_SAI_BLOCK_FRAME_LENGTH(LENGTH) ((8U <= (LENGTH)) && ((LENGTH) <= 256U)) 862 863 #define IS_SAI_BLOCK_ACTIVE_FRAME(LENGTH) ((1U <= (LENGTH)) && ((LENGTH) <= 128U)) 864 865 /** 866 * @} 867 */ 868 869 /* Private functions ---------------------------------------------------------*/ 870 /** @defgroup SAI_Private_Functions SAI Private Functions 871 * @{ 872 */ 873 874 /** 875 * @} 876 */ 877 878 /** 879 * @} 880 */ 881 882 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx || STM32F413xx || STM32F423xx */ 883 884 /** 885 * @} 886 */ 887 888 #ifdef __cplusplus 889 } 890 #endif 891 892 #endif /* __STM32F4xx_HAL_SAI_H */ 893 894 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 895