xref: /aosp_15_r20/external/XNNPACK/src/qu8-vmul/gen/minmax-rndnu-neon-ld128-x16.c (revision 4bdc94577ba0e567308109d787f7fec7b531ce36) 
1 // Auto-generated file. Do not edit!
2 //   Template: src/qs8-vmul/neon.c.in
3 //   Generator: tools/xngen
4 //
5 // Copyright 2021 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9 
10 #include <assert.h>
11 
12 #include <arm_neon.h>
13 
14 #include <xnnpack/vmul.h>
15 
16 
xnn_qu8_vmul_minmax_rndnu_ukernel__neon_ld128_x16(size_t n,const uint8_t * input_a,const uint8_t * input_b,uint8_t * output,const union xnn_qu8_mul_minmax_params params[restrict XNN_MIN_ELEMENTS (1)])17 void xnn_qu8_vmul_minmax_rndnu_ukernel__neon_ld128_x16(
18     size_t n,
19     const uint8_t* input_a,
20     const uint8_t* input_b,
21     uint8_t* output,
22     const union xnn_qu8_mul_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
23 {
24   #if XNN_ARCH_ARM64
25     const uint8x16_t va_zero_point = vld1q_dup_u8(params->rndnu_neon.a_zero_point);
26     const uint8x16_t vb_zero_point = vld1q_dup_u8(params->rndnu_neon.b_zero_point);
27   #else
28     const uint8x8_t va_zero_point = vld1_dup_u8(params->rndnu_neon.a_zero_point);
29     const uint8x8_t vb_zero_point = vld1_dup_u8(params->rndnu_neon.b_zero_point);
30   #endif
31   const int32x4_t vleft_pre_shift = vld1q_dup_s32(&params->rndnu_neon.left_pre_shift);
32   const int32x4_t vmultiplier = vld1q_dup_s32(&params->rndnu_neon.multiplier);
33   const int32x4_t vleft_post_shift = vld1q_dup_s32(&params->rndnu_neon.left_post_shift);
34   const int16x8_t voutput_zero_point = vld1q_dup_s16(&params->rndnu_neon.output_zero_point);
35   const uint8x16_t voutput_min = vld1q_dup_u8(&params->rndnu_neon.output_min);
36   const uint8x16_t voutput_max = vld1q_dup_u8(&params->rndnu_neon.output_max);
37 
38   for (; n >= 16 * sizeof(uint8_t); n -= 16 * sizeof(uint8_t)) {
39     const uint8x16_t va0123456789ABCDEF = vld1q_u8(input_a); input_a += 16;
40     const uint8x16_t vb0123456789ABCDEF = vld1q_u8(input_b); input_b += 16;
41 
42     #if XNN_ARCH_ARM64
43       const int16x8_t vxa01234567 = vreinterpretq_s16_u16(vsubl_u8(vget_low_u8(va0123456789ABCDEF), vget_low_u8(va_zero_point)));
44       const int16x8_t vxa89ABCDEF = vreinterpretq_s16_u16(vsubl_high_u8(va0123456789ABCDEF, va_zero_point));
45       const int16x8_t vxb01234567 = vreinterpretq_s16_u16(vsubl_u8(vget_low_u8(vb0123456789ABCDEF), vget_low_u8(vb_zero_point)));
46       const int16x8_t vxb89ABCDEF = vreinterpretq_s16_u16(vsubl_high_u8(vb0123456789ABCDEF, vb_zero_point));
47     #else  // !XNN_ARCH_ARM64
48       const int16x8_t vxa01234567 = vreinterpretq_s16_u16(vsubl_u8(vget_low_u8(va0123456789ABCDEF), va_zero_point));
49       const int16x8_t vxa89ABCDEF = vreinterpretq_s16_u16(vsubl_u8(vget_high_u8(va0123456789ABCDEF), va_zero_point));
50       const int16x8_t vxb01234567 = vreinterpretq_s16_u16(vsubl_u8(vget_low_u8(vb0123456789ABCDEF), vb_zero_point));
51       const int16x8_t vxb89ABCDEF = vreinterpretq_s16_u16(vsubl_u8(vget_high_u8(vb0123456789ABCDEF), vb_zero_point));
52     #endif  // XNN_ARCH_ARM64
53 
54     int32x4_t vacc0123 = vmull_s16(vget_low_s16(vxa01234567), vget_low_s16(vxb01234567));
55     int32x4_t vacc4567 = vmull_s16(vget_high_s16(vxa01234567), vget_high_s16(vxb01234567));
56     int32x4_t vacc89AB = vmull_s16(vget_low_s16(vxa89ABCDEF), vget_low_s16(vxb89ABCDEF));
57     int32x4_t vaccCDEF = vmull_s16(vget_high_s16(vxa89ABCDEF), vget_high_s16(vxb89ABCDEF));
58 
59     vacc0123 = vqshlq_s32(vacc0123, vleft_pre_shift);
60     vacc4567 = vqshlq_s32(vacc4567, vleft_pre_shift);
61     vacc89AB = vqshlq_s32(vacc89AB, vleft_pre_shift);
62     vaccCDEF = vqshlq_s32(vaccCDEF, vleft_pre_shift);
63 
64     vacc0123 = vqdmulhq_s32(vacc0123, vmultiplier);
65     vacc4567 = vqdmulhq_s32(vacc4567, vmultiplier);
66     vacc89AB = vqdmulhq_s32(vacc89AB, vmultiplier);
67     vaccCDEF = vqdmulhq_s32(vaccCDEF, vmultiplier);
68 
69     vacc0123 = vrshlq_s32(vacc0123, vleft_post_shift);
70     vacc4567 = vrshlq_s32(vacc4567, vleft_post_shift);
71     vacc89AB = vrshlq_s32(vacc89AB, vleft_post_shift);
72     vaccCDEF = vrshlq_s32(vaccCDEF, vleft_post_shift);
73 
74     #if XNN_ARCH_ARM64
75       int16x8_t vacc01234567 = vqmovn_high_s32(vqmovn_s32(vacc0123), vacc4567);
76       int16x8_t vacc89ABCDEF = vqmovn_high_s32(vqmovn_s32(vacc89AB), vaccCDEF);
77     #else
78       int16x8_t vacc01234567 = vcombine_s16(vqmovn_s32(vacc0123), vqmovn_s32(vacc4567));
79       int16x8_t vacc89ABCDEF = vcombine_s16(vqmovn_s32(vacc89AB), vqmovn_s32(vaccCDEF));
80     #endif
81 
82     vacc01234567 = vqaddq_s16(vacc01234567, voutput_zero_point);
83     vacc89ABCDEF = vqaddq_s16(vacc89ABCDEF, voutput_zero_point);
84 
85     #if XNN_ARCH_ARM64
86       uint8x16_t vout0123456789ABCDEF = vqmovun_high_s16(vqmovun_s16(vacc01234567), vacc89ABCDEF);
87     #else
88       uint8x16_t vout0123456789ABCDEF = vcombine_u8(vqmovun_s16(vacc01234567), vqmovun_s16(vacc89ABCDEF));
89     #endif
90 
91     vout0123456789ABCDEF = vmaxq_u8(vout0123456789ABCDEF, voutput_min);
92 
93     vout0123456789ABCDEF = vminq_u8(vout0123456789ABCDEF, voutput_max);
94 
95     vst1q_u8(output, vout0123456789ABCDEF); output += 16;
96   }
97   if XNN_UNLIKELY(n != 0) {
98     do {
99       const uint8x8_t va01234567 = vld1_u8(input_a); input_a += 8;
100       const uint8x8_t vb01234567 = vld1_u8(input_b); input_b += 8;
101 
102       #if XNN_ARCH_ARM64
103         const int16x8_t vxa01234567 = vreinterpretq_s16_u16(vsubl_u8(va01234567, vget_low_u8(va_zero_point)));
104         const int16x8_t vxb01234567 = vreinterpretq_s16_u16(vsubl_u8(vb01234567, vget_low_u8(vb_zero_point)));
105       #else  // !XNN_ARCH_ARM64
106         const int16x8_t vxa01234567 = vreinterpretq_s16_u16(vsubl_u8(va01234567, va_zero_point));
107         const int16x8_t vxb01234567 = vreinterpretq_s16_u16(vsubl_u8(vb01234567, vb_zero_point));
108       #endif  // XNN_ARCH_ARM64
109 
110       int32x4_t vacc0123 = vmull_s16(vget_low_s16(vxa01234567), vget_low_s16(vxb01234567));
111       int32x4_t vacc4567 = vmull_s16(vget_high_s16(vxa01234567), vget_high_s16(vxb01234567));
112 
113       vacc0123 = vqshlq_s32(vacc0123, vleft_pre_shift);
114       vacc4567 = vqshlq_s32(vacc4567, vleft_pre_shift);
115 
116       vacc0123 = vqdmulhq_s32(vacc0123, vmultiplier);
117       vacc4567 = vqdmulhq_s32(vacc4567, vmultiplier);
118 
119       vacc0123 = vrshlq_s32(vacc0123, vleft_post_shift);
120       vacc4567 = vrshlq_s32(vacc4567, vleft_post_shift);
121 
122       #if XNN_ARCH_ARM64
123         int16x8_t vacc01234567 = vqmovn_high_s32(vqmovn_s32(vacc0123), vacc4567);
124       #else
125         int16x8_t vacc01234567 = vcombine_s16(vqmovn_s32(vacc0123), vqmovn_s32(vacc4567));
126       #endif
127 
128       vacc01234567 = vqaddq_s16(vacc01234567, voutput_zero_point);
129 
130       uint8x8_t vout01234567 = vqmovun_s16(vacc01234567);
131 
132       vout01234567 = vmax_u8(vout01234567, vget_low_u8(voutput_min));
133       vout01234567 = vmin_u8(vout01234567, vget_low_u8(voutput_max));
134       if XNN_LIKELY(n >= (8 * sizeof(uint8_t))) {
135         vst1_u8(output, vout01234567); output += 8;
136         n -= 8 * sizeof(uint8_t);
137       } else {
138         if (n & (4 * sizeof(uint8_t))) {
139           vst1_lane_u32((void*) output, vreinterpret_u32_u8(vout01234567), 0); output += 4;
140           vout01234567 = vext_u8(vout01234567, vout01234567, 4);
141         }
142         if (n & (2 * sizeof(uint8_t))) {
143           vst1_lane_u16((void*) output, vreinterpret_u16_u8(vout01234567), 0); output += 2;
144           vout01234567 = vext_u8(vout01234567, vout01234567, 2);
145         }
146         if (n & (1 * sizeof(uint8_t))) {
147           vst1_lane_u8(output, vout01234567, 0);
148         }
149         n = 0;
150       }
151     } while (n != 0);
152   }
153 }
154