xref: /aosp_15_r20/external/XNNPACK/src/qu8-vaddc/gen/minmax-neon-ld128-x16.c (revision 4bdc94577ba0e567308109d787f7fec7b531ce36)
1 // Auto-generated file. Do not edit!
2 //   Template: src/qs8-vaddc/neon.c.in
3 //   Generator: tools/xngen
4 //
5 // Copyright 2020 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9 
10 #include <assert.h>
11 
12 #include <arm_neon.h>
13 
14 #include <xnnpack/vadd.h>
15 
16 
xnn_qu8_vaddc_minmax_ukernel__neon_ld128_x16(size_t n,const uint8_t * input_a,const uint8_t * input_b,uint8_t * output,const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS (1)])17 void xnn_qu8_vaddc_minmax_ukernel__neon_ld128_x16(
18     size_t n,
19     const uint8_t* input_a,
20     const uint8_t* input_b,
21     uint8_t* output,
22     const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
23 {
24   #if XNN_ARCH_ARM64
25     const uint8x16_t va_zero_point = vld1q_dup_u8(&params->neon.a_zero_point);
26   #else
27     const uint8x8_t va_zero_point = vld1_dup_u8(&params->neon.a_zero_point);
28   #endif
29   const int32x4_t va_multiplier = vld1q_dup_s32(&params->neon.a_multiplier);
30   const int32x4_t vright_shift = vld1q_dup_s32(&params->neon.right_shift);
31   const int16x8_t voutput_zero_point = vld1q_dup_s16(&params->neon.output_zero_point);
32   const uint8x16_t voutput_min = vld1q_dup_u8(&params->neon.output_min);
33   const uint8x16_t voutput_max = vld1q_dup_u8(&params->neon.output_max);
34 
35   const int32_t vxb = (int32_t) *input_b - (int32_t) params->neon.b_zero_point;
36   const int32_t vb = params->neon.b_multiplier;
37   const int32x4_t vbias = vdupq_n_s32(vxb * vb);
38 
39   for (; n >= 16 * sizeof(uint8_t); n -= 16 * sizeof(uint8_t)) {
40     const uint8x16_t va0123456789ABCDEF = vld1q_u8(input_a); input_a += 16;
41 
42     #if XNN_ARCH_ARM64
43       const int16x8_t vxa01234567 = vreinterpretq_s16_u16(vsubl_u8(vget_low_u8(va0123456789ABCDEF), vget_low_u8(va_zero_point)));
44       const int16x8_t vxa89ABCDEF = vreinterpretq_s16_u16(vsubl_high_u8(va0123456789ABCDEF, va_zero_point));
45     #else  // !XNN_ARCH_ARM64
46       const int16x8_t vxa01234567 = vreinterpretq_s16_u16(vsubl_u8(vget_low_u8(va0123456789ABCDEF), va_zero_point));
47       const int16x8_t vxa89ABCDEF = vreinterpretq_s16_u16(vsubl_u8(vget_high_u8(va0123456789ABCDEF), va_zero_point));
48     #endif  // XNN_ARCH_ARM64
49 
50     int32x4_t vacc0123 = vmlaq_s32(vbias, vmovl_s16(vget_low_s16(vxa01234567)), va_multiplier);
51     int32x4_t vacc4567 = vmlaq_s32(vbias, vmovl_s16(vget_high_s16(vxa01234567)), va_multiplier);
52     int32x4_t vacc89AB = vmlaq_s32(vbias, vmovl_s16(vget_low_s16(vxa89ABCDEF)), va_multiplier);
53     int32x4_t vaccCDEF = vmlaq_s32(vbias, vmovl_s16(vget_high_s16(vxa89ABCDEF)), va_multiplier);
54 
55     vacc0123 = vrshlq_s32(vacc0123, vright_shift);
56     vacc4567 = vrshlq_s32(vacc4567, vright_shift);
57     vacc89AB = vrshlq_s32(vacc89AB, vright_shift);
58     vaccCDEF = vrshlq_s32(vaccCDEF, vright_shift);
59 
60     const int16x8_t vacc01234567 = vqaddq_s16(vcombine_s16(vqmovn_s32(vacc0123), vqmovn_s32(vacc4567)), voutput_zero_point);
61     const int16x8_t vacc89ABCDEF = vqaddq_s16(vcombine_s16(vqmovn_s32(vacc89AB), vqmovn_s32(vaccCDEF)), voutput_zero_point);
62 
63     uint8x16_t vout0123456789ABCDEF = vcombine_u8(vqmovun_s16(vacc01234567), vqmovun_s16(vacc89ABCDEF));
64 
65     vout0123456789ABCDEF = vmaxq_u8(vout0123456789ABCDEF, voutput_min);
66 
67     vout0123456789ABCDEF = vminq_u8(vout0123456789ABCDEF, voutput_max);
68 
69     vst1q_u8(output, vout0123456789ABCDEF); output += 16;
70   }
71   if XNN_UNLIKELY(n != 0) {
72     do {
73       const uint8x8_t va01234567 = vld1_u8(input_a); input_a += 8;
74 
75       #if XNN_ARCH_ARM64
76         const int16x8_t vxa01234567 = vreinterpretq_s16_u16(vsubl_u8(va01234567, vget_low_u8(va_zero_point)));
77       #else  // !XNN_ARCH_ARM64
78         const int16x8_t vxa01234567 = vreinterpretq_s16_u16(vsubl_u8(va01234567, va_zero_point));
79       #endif
80 
81       int32x4_t vacc0123 = vmlaq_s32(vbias, vmovl_s16(vget_low_s16(vxa01234567)), va_multiplier);
82       int32x4_t vacc4567 = vmlaq_s32(vbias, vmovl_s16(vget_high_s16(vxa01234567)), va_multiplier);
83 
84       vacc0123 = vrshlq_s32(vacc0123, vright_shift);
85       vacc4567 = vrshlq_s32(vacc4567, vright_shift);
86 
87       const int16x8_t vacc01234567 = vqaddq_s16(vcombine_s16(vqmovn_s32(vacc0123), vqmovn_s32(vacc4567)), voutput_zero_point);
88 
89       uint8x8_t vout01234567 = vqmovun_s16(vacc01234567);
90       vout01234567 = vmax_u8(vout01234567, vget_low_u8(voutput_min));
91       vout01234567 = vmin_u8(vout01234567, vget_low_u8(voutput_max));
92 
93       if XNN_LIKELY(n >= (8 * sizeof(uint8_t))) {
94         vst1_u8(output, vout01234567); output += 8;
95         n -= 8 * sizeof(uint8_t);
96       } else {
97         if (n & (4 * sizeof(uint8_t))) {
98           vst1_lane_u32((void*) output, vreinterpret_u32_u8(vout01234567), 0); output += 4;
99           vout01234567 = vext_u8(vout01234567, vout01234567, 4);
100         }
101         if (n & (2 * sizeof(uint8_t))) {
102           vst1_lane_u16((void*) output, vreinterpret_u16_u8(vout01234567), 0); output += 2;
103           vout01234567 = vext_u8(vout01234567, vout01234567, 2);
104         }
105         if (n & (1 * sizeof(uint8_t))) {
106           vst1_lane_u8(output, vout01234567, 0);
107         }
108         n = 0;
109       }
110     } while (n != 0);
111   }
112 }
113