xref: /aosp_15_r20/external/XNNPACK/src/qu8-vaddc/gen/minmax-avx512skx-mul32-ld128-x16.c (revision 4bdc94577ba0e567308109d787f7fec7b531ce36)
1 // Auto-generated file. Do not edit!
2 //   Template: src/qs8-vaddc/avx512skx-mul32-ld128.c.in
3 //   Generator: tools/xngen
4 //
5 // Copyright 2021 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9 
10 #include <assert.h>
11 
12 #include <immintrin.h>
13 
14 #include <xnnpack/intrinsics-polyfill.h>
15 #include <xnnpack/vadd.h>
16 
17 
xnn_qu8_vaddc_minmax_ukernel__avx512skx_mul32_ld128_x16(size_t n,const uint8_t * input_a,const uint8_t * input_b,uint8_t * output,const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS (1)])18 void xnn_qu8_vaddc_minmax_ukernel__avx512skx_mul32_ld128_x16(
19     size_t n,
20     const uint8_t* input_a,
21     const uint8_t* input_b,
22     uint8_t* output,
23     const union xnn_qu8_add_minmax_params params[restrict XNN_MIN_ELEMENTS(1)])
24 {
25   const __m512i va_multiplier = _mm512_load_si512(params->avx512.a_multiplier);
26   const __m128i vshift = _mm_load_si128((const __m128i*) params->avx512.shift);
27   const __m256i voutput_zero_point = _mm256_load_si256((const __m256i*) params->avx512.output_zero_point);
28   const __m128i voutput_min = _mm_load_si128((const __m128i*) params->avx512.output_min);
29   const __m128i voutput_max = _mm_load_si128((const __m128i*) params->avx512.output_max);
30 
31   const __m512i vbias = _mm512_add_epi32(
32     _mm512_broadcastd_epi32(_mm_cvtsi32_si128(params->avx512.b_multiplier[0] * (int32_t) *input_b)),
33     _mm512_load_si512(params->avx512.bias));
34   for (; n >= 16 * sizeof(uint8_t); n -= 16 * sizeof(uint8_t)) {
35     const __m512i va0123456789ABCDEF = _mm512_cvtepu8_epi32(_mm_loadu_si128((const __m128i*) input_a));
36     input_a += 16;
37 
38     __m512i vacc0123456789ABCDEF = _mm512_add_epi32(vbias, _mm512_mullo_epi32(va0123456789ABCDEF, va_multiplier));
39 
40     vacc0123456789ABCDEF = _mm512_sra_epi32(vacc0123456789ABCDEF, vshift);
41 
42     __m256i vout012389AB4567CDEF = _mm256_adds_epi16(_mm256_packs_epi32(_mm512_castsi512_si256(vacc0123456789ABCDEF), _mm512_extracti32x8_epi32(vacc0123456789ABCDEF, 1)), voutput_zero_point);
43 
44     __m128i vout0123456789ABCDEF = _mm_shuffle_epi32(_mm_packus_epi16(_mm256_castsi256_si128(vout012389AB4567CDEF), _mm256_extracti128_si256(vout012389AB4567CDEF, 1)), _MM_SHUFFLE(3, 1, 2, 0));
45 
46     vout0123456789ABCDEF = _mm_max_epu8(vout0123456789ABCDEF, voutput_min);
47 
48     vout0123456789ABCDEF = _mm_min_epu8(vout0123456789ABCDEF, voutput_max);
49 
50     _mm_storeu_si128((__m128i*) output, vout0123456789ABCDEF);
51     output += 16;
52   }
53   if XNN_UNLIKELY(n != 0) {
54     {
55       const __mmask16 vmask = _cvtu32_mask16((uint32_t) ((UINT32_C(1) << n) - UINT32_C(1)));
56       const __m512i va0123456789ABCDEF = _mm512_cvtepu8_epi32(_mm_maskz_loadu_epi8(vmask, input_a));
57 
58       __m512i vacc0123456789ABCDEF = _mm512_add_epi32(vbias, _mm512_mullo_epi32(va0123456789ABCDEF, va_multiplier));
59 
60       vacc0123456789ABCDEF = _mm512_sra_epi32(vacc0123456789ABCDEF, vshift);
61 
62       __m256i vout012389AB4567CDEF = _mm256_adds_epi16(_mm256_packs_epi32(_mm512_castsi512_si256(vacc0123456789ABCDEF), _mm512_extracti32x8_epi32(vacc0123456789ABCDEF, 1)), voutput_zero_point);
63       __m128i vout0123456789ABCDEF = _mm_shuffle_epi32(_mm_packus_epi16(_mm256_castsi256_si128(vout012389AB4567CDEF), _mm256_extracti128_si256(vout012389AB4567CDEF, 1)), _MM_SHUFFLE(3, 1, 2, 0));
64       vout0123456789ABCDEF = _mm_max_epu8(vout0123456789ABCDEF, voutput_min);
65       vout0123456789ABCDEF = _mm_min_epu8(vout0123456789ABCDEF, voutput_max);
66 
67       _mm_mask_storeu_epi8(output, vmask, vout0123456789ABCDEF);
68     }
69   }
70 }
71