xref: /aosp_15_r20/external/coreboot/src/mainboard/sifive/hifive-unleashed/hifive-unleashed-a00.dts (revision b9411a12aaaa7e1e6a6fb7c5e057f44ee179a49c) 
1/* SPDX-License-Identifier: GPL-2.0-only */
2
3/include/ "fu540-c000.dtsi"
4
5/ {
6	#address-cells = <2>;
7	#size-cells = <2>;
8	model = "SiFive HiFive Unleashed A00";
9	compatible = "sifive,hifive-unleashed-a00", "sifive,fu540-c000";
10
11	chosen {
12	};
13
14	cpus {
15		/* Clock frequency (in Hz) of the PCB crystal for rtcclk */
16		timebase-frequency = <1000000>;
17	};
18
19	memory@80000000 {
20		device_type = "memory";
21		reg = <0x0 0x80000000 0x2 0x00000000>;
22	};
23
24	soc {
25	};
26
27	hfclk: hfclk {
28		#clock-cells = <0>;
29		compatible = "fixed-clock";
30		clock-frequency = <33333333>;
31		clock-output-names = "hfclk";
32	};
33
34	rtcclk: rtcclk {
35		#clock-cells = <0>;
36		compatible = "fixed-clock";
37		clock-frequency = <1000000>;
38		clock-output-names = "rtcclk";
39	};
40};
41
42&uart0 {
43	status = "okay";
44};
45
46&uart1 {
47	status = "okay";
48};
49
50&i2c0 {
51	status = "okay";
52};
53
54&qspi0 {
55	status = "okay";
56	flash@0 {
57		compatible = "issi,is25wp256", "jedec,spi-nor";
58		reg = <0>;
59		spi-max-frequency = <50000000>;
60		m25p,fast-read;
61		spi-tx-bus-width = <4>;
62		spi-rx-bus-width = <4>;
63	};
64};
65
66&qspi2 {
67	status = "okay";
68	mmc@0 {
69		compatible = "mmc-spi-slot";
70		reg = <0>;
71		spi-max-frequency = <20000000>;
72		voltage-ranges = <3300 3300>;
73		disable-wp;
74	};
75};
76
77&eth0 {
78	status = "okay";
79	phy-mode = "gmii";
80	phy-handle = <&phy0>;
81	phy0: ethernet-phy@0 {
82		reg = <0>;
83	};
84};
85