1 // Auto-generated file. Do not edit!
2 // Template: src/f32-vsigmoid/avx2-rr1-p5.c.in
3 // Generator: tools/xngen
4 //
5 // Copyright 2019 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9
10 #include <assert.h>
11
12 #include <immintrin.h>
13
14 #include <xnnpack/common.h>
15 #include <xnnpack/vunary.h>
16
17
xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr2fma_x56(size_t n,const float * x,float * y,const union xnn_f32_sigmoid_params params[restrict XNN_MIN_ELEMENTS (1)])18 void xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr2fma_x56(
19 size_t n,
20 const float* x,
21 float* y,
22 const union xnn_f32_sigmoid_params params[restrict XNN_MIN_ELEMENTS(1)])
23 {
24 assert(n % sizeof(float) == 0);
25
26 const __m256 vsign_mask = _mm256_load_ps(params->avx2_rr1_p5.sign_mask);
27 const __m256 vmagic_bias = _mm256_load_ps(params->avx2_rr1_p5.magic_bias);
28 const __m256 vlog2e = _mm256_load_ps(params->avx2_rr1_p5.log2e);
29 const __m256 vminus_ln2 = _mm256_load_ps(params->avx2_rr1_p5.minus_ln2);
30 const __m256 vc5 = _mm256_load_ps(params->avx2_rr1_p5.c5);
31 const __m256 vc4 = _mm256_load_ps(params->avx2_rr1_p5.c4);
32 const __m256 vc3 = _mm256_load_ps(params->avx2_rr1_p5.c3);
33 const __m256 vc2 = _mm256_load_ps(params->avx2_rr1_p5.c2);
34 const __m256 vc1 = _mm256_load_ps(params->avx2_rr1_p5.c1);
35 const __m256 vone = _mm256_load_ps(params->avx2_rr1_p5.one);
36 const __m256 vdenorm_cutoff = _mm256_load_ps(params->avx2_rr1_p5.denorm_cutoff);
37
38 for (; n >= 56 * sizeof(float); n -= 56 * sizeof(float)) {
39 const __m256 vx0 = _mm256_loadu_ps(x);
40 const __m256 vx1 = _mm256_loadu_ps(x + 8);
41 const __m256 vx2 = _mm256_loadu_ps(x + 16);
42 const __m256 vx3 = _mm256_loadu_ps(x + 24);
43 const __m256 vx4 = _mm256_loadu_ps(x + 32);
44 const __m256 vx5 = _mm256_loadu_ps(x + 40);
45 const __m256 vx6 = _mm256_loadu_ps(x + 48);
46 x += 56;
47
48 const __m256 vz0 = _mm256_or_ps(vx0, vsign_mask);
49 const __m256 vz1 = _mm256_or_ps(vx1, vsign_mask);
50 const __m256 vz2 = _mm256_or_ps(vx2, vsign_mask);
51 const __m256 vz3 = _mm256_or_ps(vx3, vsign_mask);
52 const __m256 vz4 = _mm256_or_ps(vx4, vsign_mask);
53 const __m256 vz5 = _mm256_or_ps(vx5, vsign_mask);
54 const __m256 vz6 = _mm256_or_ps(vx6, vsign_mask);
55
56 __m256 vn0 = _mm256_fmadd_ps(vz0, vlog2e, vmagic_bias);
57 __m256 vn1 = _mm256_fmadd_ps(vz1, vlog2e, vmagic_bias);
58 __m256 vn2 = _mm256_fmadd_ps(vz2, vlog2e, vmagic_bias);
59 __m256 vn3 = _mm256_fmadd_ps(vz3, vlog2e, vmagic_bias);
60 __m256 vn4 = _mm256_fmadd_ps(vz4, vlog2e, vmagic_bias);
61 __m256 vn5 = _mm256_fmadd_ps(vz5, vlog2e, vmagic_bias);
62 __m256 vn6 = _mm256_fmadd_ps(vz6, vlog2e, vmagic_bias);
63
64 const __m256 vs0 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn0), 23));
65 const __m256 vs1 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn1), 23));
66 const __m256 vs2 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn2), 23));
67 const __m256 vs3 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn3), 23));
68 const __m256 vs4 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn4), 23));
69 const __m256 vs5 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn5), 23));
70 const __m256 vs6 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn6), 23));
71
72 vn0 = _mm256_sub_ps(vn0, vmagic_bias);
73 vn1 = _mm256_sub_ps(vn1, vmagic_bias);
74 vn2 = _mm256_sub_ps(vn2, vmagic_bias);
75 vn3 = _mm256_sub_ps(vn3, vmagic_bias);
76 vn4 = _mm256_sub_ps(vn4, vmagic_bias);
77 vn5 = _mm256_sub_ps(vn5, vmagic_bias);
78 vn6 = _mm256_sub_ps(vn6, vmagic_bias);
79
80 __m256 vt0 = _mm256_fmadd_ps(vn0, vminus_ln2, vz0);
81 __m256 vt1 = _mm256_fmadd_ps(vn1, vminus_ln2, vz1);
82 __m256 vt2 = _mm256_fmadd_ps(vn2, vminus_ln2, vz2);
83 __m256 vt3 = _mm256_fmadd_ps(vn3, vminus_ln2, vz3);
84 __m256 vt4 = _mm256_fmadd_ps(vn4, vminus_ln2, vz4);
85 __m256 vt5 = _mm256_fmadd_ps(vn5, vminus_ln2, vz5);
86 __m256 vt6 = _mm256_fmadd_ps(vn6, vminus_ln2, vz6);
87
88 __m256 vp0 = _mm256_fmadd_ps(vc5, vt0, vc4);
89 __m256 vp1 = _mm256_fmadd_ps(vc5, vt1, vc4);
90 __m256 vp2 = _mm256_fmadd_ps(vc5, vt2, vc4);
91 __m256 vp3 = _mm256_fmadd_ps(vc5, vt3, vc4);
92 __m256 vp4 = _mm256_fmadd_ps(vc5, vt4, vc4);
93 __m256 vp5 = _mm256_fmadd_ps(vc5, vt5, vc4);
94 __m256 vp6 = _mm256_fmadd_ps(vc5, vt6, vc4);
95
96 vp0 = _mm256_fmadd_ps(vp0, vt0, vc3);
97 vp1 = _mm256_fmadd_ps(vp1, vt1, vc3);
98 vp2 = _mm256_fmadd_ps(vp2, vt2, vc3);
99 vp3 = _mm256_fmadd_ps(vp3, vt3, vc3);
100 vp4 = _mm256_fmadd_ps(vp4, vt4, vc3);
101 vp5 = _mm256_fmadd_ps(vp5, vt5, vc3);
102 vp6 = _mm256_fmadd_ps(vp6, vt6, vc3);
103
104 vp0 = _mm256_fmadd_ps(vp0, vt0, vc2);
105 vp1 = _mm256_fmadd_ps(vp1, vt1, vc2);
106 vp2 = _mm256_fmadd_ps(vp2, vt2, vc2);
107 vp3 = _mm256_fmadd_ps(vp3, vt3, vc2);
108 vp4 = _mm256_fmadd_ps(vp4, vt4, vc2);
109 vp5 = _mm256_fmadd_ps(vp5, vt5, vc2);
110 vp6 = _mm256_fmadd_ps(vp6, vt6, vc2);
111
112 vp0 = _mm256_fmadd_ps(vp0, vt0, vc1);
113 vp1 = _mm256_fmadd_ps(vp1, vt1, vc1);
114 vp2 = _mm256_fmadd_ps(vp2, vt2, vc1);
115 vp3 = _mm256_fmadd_ps(vp3, vt3, vc1);
116 vp4 = _mm256_fmadd_ps(vp4, vt4, vc1);
117 vp5 = _mm256_fmadd_ps(vp5, vt5, vc1);
118 vp6 = _mm256_fmadd_ps(vp6, vt6, vc1);
119
120 vt0 = _mm256_mul_ps(vt0, vs0);
121 vt1 = _mm256_mul_ps(vt1, vs1);
122 vt2 = _mm256_mul_ps(vt2, vs2);
123 vt3 = _mm256_mul_ps(vt3, vs3);
124 vt4 = _mm256_mul_ps(vt4, vs4);
125 vt5 = _mm256_mul_ps(vt5, vs5);
126 vt6 = _mm256_mul_ps(vt6, vs6);
127
128 const __m256 ve0 = _mm256_fmadd_ps(vt0, vp0, vs0);
129 const __m256 ve1 = _mm256_fmadd_ps(vt1, vp1, vs1);
130 const __m256 ve2 = _mm256_fmadd_ps(vt2, vp2, vs2);
131 const __m256 ve3 = _mm256_fmadd_ps(vt3, vp3, vs3);
132 const __m256 ve4 = _mm256_fmadd_ps(vt4, vp4, vs4);
133 const __m256 ve5 = _mm256_fmadd_ps(vt5, vp5, vs5);
134 const __m256 ve6 = _mm256_fmadd_ps(vt6, vp6, vs6);
135
136 const __m256 vd0 = _mm256_add_ps(ve0, vone);
137 const __m256 vd1 = _mm256_add_ps(ve1, vone);
138 const __m256 vd2 = _mm256_add_ps(ve2, vone);
139 const __m256 vd3 = _mm256_add_ps(ve3, vone);
140 const __m256 vd4 = _mm256_add_ps(ve4, vone);
141 const __m256 vd5 = _mm256_add_ps(ve5, vone);
142 const __m256 vd6 = _mm256_add_ps(ve6, vone);
143
144 __m256 vr0 = _mm256_rcp_ps(vd0);
145 __m256 vr1 = _mm256_rcp_ps(vd1);
146 __m256 vr2 = _mm256_rcp_ps(vd2);
147 __m256 vr3 = _mm256_rcp_ps(vd3);
148 __m256 vr4 = _mm256_rcp_ps(vd4);
149 __m256 vr5 = _mm256_rcp_ps(vd5);
150 __m256 vr6 = _mm256_rcp_ps(vd6);
151
152 vr0 = _mm256_fmadd_ps(_mm256_fnmadd_ps(vr0, vd0, vone), vr0, vr0);
153 vr1 = _mm256_fmadd_ps(_mm256_fnmadd_ps(vr1, vd1, vone), vr1, vr1);
154 vr2 = _mm256_fmadd_ps(_mm256_fnmadd_ps(vr2, vd2, vone), vr2, vr2);
155 vr3 = _mm256_fmadd_ps(_mm256_fnmadd_ps(vr3, vd3, vone), vr3, vr3);
156 vr4 = _mm256_fmadd_ps(_mm256_fnmadd_ps(vr4, vd4, vone), vr4, vr4);
157 vr5 = _mm256_fmadd_ps(_mm256_fnmadd_ps(vr5, vd5, vone), vr5, vr5);
158 vr6 = _mm256_fmadd_ps(_mm256_fnmadd_ps(vr6, vd6, vone), vr6, vr6);
159
160 vr0 = _mm256_fmadd_ps(_mm256_fnmadd_ps(vr0, vd0, vone), vr0, vr0);
161 vr1 = _mm256_fmadd_ps(_mm256_fnmadd_ps(vr1, vd1, vone), vr1, vr1);
162 vr2 = _mm256_fmadd_ps(_mm256_fnmadd_ps(vr2, vd2, vone), vr2, vr2);
163 vr3 = _mm256_fmadd_ps(_mm256_fnmadd_ps(vr3, vd3, vone), vr3, vr3);
164 vr4 = _mm256_fmadd_ps(_mm256_fnmadd_ps(vr4, vd4, vone), vr4, vr4);
165 vr5 = _mm256_fmadd_ps(_mm256_fnmadd_ps(vr5, vd5, vone), vr5, vr5);
166 vr6 = _mm256_fmadd_ps(_mm256_fnmadd_ps(vr6, vd6, vone), vr6, vr6);
167
168 __m256 vf0 = _mm256_mul_ps(ve0, vr0);
169 __m256 vf1 = _mm256_mul_ps(ve1, vr1);
170 __m256 vf2 = _mm256_mul_ps(ve2, vr2);
171 __m256 vf3 = _mm256_mul_ps(ve3, vr3);
172 __m256 vf4 = _mm256_mul_ps(ve4, vr4);
173 __m256 vf5 = _mm256_mul_ps(ve5, vr5);
174 __m256 vf6 = _mm256_mul_ps(ve6, vr6);
175
176 vf0 = _mm256_andnot_ps(_mm256_cmp_ps(vz0, vdenorm_cutoff, _CMP_LT_OS), vf0);
177 vf1 = _mm256_andnot_ps(_mm256_cmp_ps(vz1, vdenorm_cutoff, _CMP_LT_OS), vf1);
178 vf2 = _mm256_andnot_ps(_mm256_cmp_ps(vz2, vdenorm_cutoff, _CMP_LT_OS), vf2);
179 vf3 = _mm256_andnot_ps(_mm256_cmp_ps(vz3, vdenorm_cutoff, _CMP_LT_OS), vf3);
180 vf4 = _mm256_andnot_ps(_mm256_cmp_ps(vz4, vdenorm_cutoff, _CMP_LT_OS), vf4);
181 vf5 = _mm256_andnot_ps(_mm256_cmp_ps(vz5, vdenorm_cutoff, _CMP_LT_OS), vf5);
182 vf6 = _mm256_andnot_ps(_mm256_cmp_ps(vz6, vdenorm_cutoff, _CMP_LT_OS), vf6);
183
184 vf0 = _mm256_blendv_ps(_mm256_sub_ps(vone, vf0), vf0, vx0);
185 vf1 = _mm256_blendv_ps(_mm256_sub_ps(vone, vf1), vf1, vx1);
186 vf2 = _mm256_blendv_ps(_mm256_sub_ps(vone, vf2), vf2, vx2);
187 vf3 = _mm256_blendv_ps(_mm256_sub_ps(vone, vf3), vf3, vx3);
188 vf4 = _mm256_blendv_ps(_mm256_sub_ps(vone, vf4), vf4, vx4);
189 vf5 = _mm256_blendv_ps(_mm256_sub_ps(vone, vf5), vf5, vx5);
190 vf6 = _mm256_blendv_ps(_mm256_sub_ps(vone, vf6), vf6, vx6);
191
192 _mm256_storeu_ps(y, vf0);
193 _mm256_storeu_ps(y + 8, vf1);
194 _mm256_storeu_ps(y + 16, vf2);
195 _mm256_storeu_ps(y + 24, vf3);
196 _mm256_storeu_ps(y + 32, vf4);
197 _mm256_storeu_ps(y + 40, vf5);
198 _mm256_storeu_ps(y + 48, vf6);
199 y += 56;
200 }
201 for (; n >= 8 * sizeof(float); n -= 8 * sizeof(float)) {
202 const __m256 vx = _mm256_loadu_ps(x);
203 x += 8;
204
205 const __m256 vz = _mm256_or_ps(vx, vsign_mask);
206
207 __m256 vn = _mm256_fmadd_ps(vz, vlog2e, vmagic_bias);
208 const __m256 vs = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn), 23));
209 vn = _mm256_sub_ps(vn, vmagic_bias);
210
211 __m256 vt = _mm256_fmadd_ps(vn, vminus_ln2, vz);
212
213 __m256 vp = _mm256_fmadd_ps(vc5, vt, vc4);
214 vp = _mm256_fmadd_ps(vp, vt, vc3);
215 vp = _mm256_fmadd_ps(vp, vt, vc2);
216 vp = _mm256_fmadd_ps(vp, vt, vc1);
217
218 vt = _mm256_mul_ps(vt, vs);
219 const __m256 ve = _mm256_fmadd_ps(vt, vp, vs);
220
221 const __m256 vd = _mm256_add_ps(ve, vone);
222 __m256 vr = _mm256_rcp_ps(vd);
223 vr = _mm256_fmadd_ps(_mm256_fnmadd_ps(vr, vd, vone), vr, vr);
224 vr = _mm256_fmadd_ps(_mm256_fnmadd_ps(vr, vd, vone), vr, vr);
225 __m256 vf = _mm256_mul_ps(ve, vr);
226
227 vf = _mm256_andnot_ps(_mm256_cmp_ps(vz, vdenorm_cutoff, _CMP_LT_OS), vf);
228 vf = _mm256_blendv_ps(_mm256_sub_ps(vone, vf), vf, vx);
229
230 _mm256_storeu_ps(y, vf);
231 y += 8;
232 }
233 if XNN_UNLIKELY(n != 0) {
234 assert(n >= 1 * sizeof(float));
235 assert(n <= 7 * sizeof(float));
236 const __m256i vmask = _mm256_loadu_si256((const __m256i*) ((uintptr_t) ¶ms->avx2_rr1_p5.mask_table[7] - n));
237
238 const __m256 vx = _mm256_maskload_ps(x, vmask);
239
240 const __m256 vz = _mm256_or_ps(vx, vsign_mask);
241
242 __m256 vn = _mm256_fmadd_ps(vz, vlog2e, vmagic_bias);
243 const __m256 vs = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn), 23));
244 vn = _mm256_sub_ps(vn, vmagic_bias);
245
246 __m256 vt = _mm256_fmadd_ps(vn, vminus_ln2, vz);
247
248 __m256 vp = _mm256_fmadd_ps(vc5, vt, vc4);
249 vp = _mm256_fmadd_ps(vp, vt, vc3);
250 vp = _mm256_fmadd_ps(vp, vt, vc2);
251 vp = _mm256_fmadd_ps(vp, vt, vc1);
252
253 vt = _mm256_mul_ps(vt, vs);
254 const __m256 ve = _mm256_fmadd_ps(vt, vp, vs);
255
256 const __m256 vd = _mm256_add_ps(ve, vone);
257 __m256 vr = _mm256_rcp_ps(vd);
258 vr = _mm256_fmadd_ps(_mm256_fnmadd_ps(vr, vd, vone), vr, vr);
259 vr = _mm256_fmadd_ps(_mm256_fnmadd_ps(vr, vd, vone), vr, vr);
260 __m256 vf = _mm256_mul_ps(ve, vr);
261
262 vf = _mm256_andnot_ps(_mm256_cmp_ps(vz, vdenorm_cutoff, _CMP_LT_OS), vf);
263 vf = _mm256_blendv_ps(_mm256_sub_ps(vone, vf), vf, vx);
264
265 __m128 vf_lo = _mm256_castps256_ps128(vf);
266 if (n & (4 * sizeof(float))) {
267 _mm_storeu_ps(y, vf_lo);
268 vf_lo = _mm256_extractf128_ps(vf, 1);
269 y += 4;
270 }
271 if (n & (2 * sizeof(float))) {
272 _mm_storel_pi((__m64*) y, vf_lo);
273 vf_lo = _mm_movehl_ps(vf_lo, vf_lo);
274 y += 2;
275 }
276 if (n & (1 * sizeof(float))) {
277 _mm_store_ss(y, vf_lo);
278 }
279 }
280 }
281