1 // Auto-generated file. Do not edit!
2 // Template: src/f32-vsigmoid/avx2-rr1-p5.c.in
3 // Generator: tools/xngen
4 //
5 // Copyright 2019 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9
10 #include <assert.h>
11
12 #include <immintrin.h>
13
14 #include <xnnpack/common.h>
15 #include <xnnpack/vunary.h>
16
17
xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr2fma_x48(size_t n,const float * x,float * y,const union xnn_f32_sigmoid_params params[restrict XNN_MIN_ELEMENTS (1)])18 void xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr2fma_x48(
19 size_t n,
20 const float* x,
21 float* y,
22 const union xnn_f32_sigmoid_params params[restrict XNN_MIN_ELEMENTS(1)])
23 {
24 assert(n % sizeof(float) == 0);
25
26 const __m256 vsign_mask = _mm256_load_ps(params->avx2_rr1_p5.sign_mask);
27 const __m256 vmagic_bias = _mm256_load_ps(params->avx2_rr1_p5.magic_bias);
28 const __m256 vlog2e = _mm256_load_ps(params->avx2_rr1_p5.log2e);
29 const __m256 vminus_ln2 = _mm256_load_ps(params->avx2_rr1_p5.minus_ln2);
30 const __m256 vc5 = _mm256_load_ps(params->avx2_rr1_p5.c5);
31 const __m256 vc4 = _mm256_load_ps(params->avx2_rr1_p5.c4);
32 const __m256 vc3 = _mm256_load_ps(params->avx2_rr1_p5.c3);
33 const __m256 vc2 = _mm256_load_ps(params->avx2_rr1_p5.c2);
34 const __m256 vc1 = _mm256_load_ps(params->avx2_rr1_p5.c1);
35 const __m256 vone = _mm256_load_ps(params->avx2_rr1_p5.one);
36 const __m256 vdenorm_cutoff = _mm256_load_ps(params->avx2_rr1_p5.denorm_cutoff);
37
38 for (; n >= 48 * sizeof(float); n -= 48 * sizeof(float)) {
39 const __m256 vx0 = _mm256_loadu_ps(x);
40 const __m256 vx1 = _mm256_loadu_ps(x + 8);
41 const __m256 vx2 = _mm256_loadu_ps(x + 16);
42 const __m256 vx3 = _mm256_loadu_ps(x + 24);
43 const __m256 vx4 = _mm256_loadu_ps(x + 32);
44 const __m256 vx5 = _mm256_loadu_ps(x + 40);
45 x += 48;
46
47 const __m256 vz0 = _mm256_or_ps(vx0, vsign_mask);
48 const __m256 vz1 = _mm256_or_ps(vx1, vsign_mask);
49 const __m256 vz2 = _mm256_or_ps(vx2, vsign_mask);
50 const __m256 vz3 = _mm256_or_ps(vx3, vsign_mask);
51 const __m256 vz4 = _mm256_or_ps(vx4, vsign_mask);
52 const __m256 vz5 = _mm256_or_ps(vx5, vsign_mask);
53
54 __m256 vn0 = _mm256_fmadd_ps(vz0, vlog2e, vmagic_bias);
55 __m256 vn1 = _mm256_fmadd_ps(vz1, vlog2e, vmagic_bias);
56 __m256 vn2 = _mm256_fmadd_ps(vz2, vlog2e, vmagic_bias);
57 __m256 vn3 = _mm256_fmadd_ps(vz3, vlog2e, vmagic_bias);
58 __m256 vn4 = _mm256_fmadd_ps(vz4, vlog2e, vmagic_bias);
59 __m256 vn5 = _mm256_fmadd_ps(vz5, vlog2e, vmagic_bias);
60
61 const __m256 vs0 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn0), 23));
62 const __m256 vs1 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn1), 23));
63 const __m256 vs2 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn2), 23));
64 const __m256 vs3 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn3), 23));
65 const __m256 vs4 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn4), 23));
66 const __m256 vs5 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn5), 23));
67
68 vn0 = _mm256_sub_ps(vn0, vmagic_bias);
69 vn1 = _mm256_sub_ps(vn1, vmagic_bias);
70 vn2 = _mm256_sub_ps(vn2, vmagic_bias);
71 vn3 = _mm256_sub_ps(vn3, vmagic_bias);
72 vn4 = _mm256_sub_ps(vn4, vmagic_bias);
73 vn5 = _mm256_sub_ps(vn5, vmagic_bias);
74
75 __m256 vt0 = _mm256_fmadd_ps(vn0, vminus_ln2, vz0);
76 __m256 vt1 = _mm256_fmadd_ps(vn1, vminus_ln2, vz1);
77 __m256 vt2 = _mm256_fmadd_ps(vn2, vminus_ln2, vz2);
78 __m256 vt3 = _mm256_fmadd_ps(vn3, vminus_ln2, vz3);
79 __m256 vt4 = _mm256_fmadd_ps(vn4, vminus_ln2, vz4);
80 __m256 vt5 = _mm256_fmadd_ps(vn5, vminus_ln2, vz5);
81
82 __m256 vp0 = _mm256_fmadd_ps(vc5, vt0, vc4);
83 __m256 vp1 = _mm256_fmadd_ps(vc5, vt1, vc4);
84 __m256 vp2 = _mm256_fmadd_ps(vc5, vt2, vc4);
85 __m256 vp3 = _mm256_fmadd_ps(vc5, vt3, vc4);
86 __m256 vp4 = _mm256_fmadd_ps(vc5, vt4, vc4);
87 __m256 vp5 = _mm256_fmadd_ps(vc5, vt5, vc4);
88
89 vp0 = _mm256_fmadd_ps(vp0, vt0, vc3);
90 vp1 = _mm256_fmadd_ps(vp1, vt1, vc3);
91 vp2 = _mm256_fmadd_ps(vp2, vt2, vc3);
92 vp3 = _mm256_fmadd_ps(vp3, vt3, vc3);
93 vp4 = _mm256_fmadd_ps(vp4, vt4, vc3);
94 vp5 = _mm256_fmadd_ps(vp5, vt5, vc3);
95
96 vp0 = _mm256_fmadd_ps(vp0, vt0, vc2);
97 vp1 = _mm256_fmadd_ps(vp1, vt1, vc2);
98 vp2 = _mm256_fmadd_ps(vp2, vt2, vc2);
99 vp3 = _mm256_fmadd_ps(vp3, vt3, vc2);
100 vp4 = _mm256_fmadd_ps(vp4, vt4, vc2);
101 vp5 = _mm256_fmadd_ps(vp5, vt5, vc2);
102
103 vp0 = _mm256_fmadd_ps(vp0, vt0, vc1);
104 vp1 = _mm256_fmadd_ps(vp1, vt1, vc1);
105 vp2 = _mm256_fmadd_ps(vp2, vt2, vc1);
106 vp3 = _mm256_fmadd_ps(vp3, vt3, vc1);
107 vp4 = _mm256_fmadd_ps(vp4, vt4, vc1);
108 vp5 = _mm256_fmadd_ps(vp5, vt5, vc1);
109
110 vt0 = _mm256_mul_ps(vt0, vs0);
111 vt1 = _mm256_mul_ps(vt1, vs1);
112 vt2 = _mm256_mul_ps(vt2, vs2);
113 vt3 = _mm256_mul_ps(vt3, vs3);
114 vt4 = _mm256_mul_ps(vt4, vs4);
115 vt5 = _mm256_mul_ps(vt5, vs5);
116
117 const __m256 ve0 = _mm256_fmadd_ps(vt0, vp0, vs0);
118 const __m256 ve1 = _mm256_fmadd_ps(vt1, vp1, vs1);
119 const __m256 ve2 = _mm256_fmadd_ps(vt2, vp2, vs2);
120 const __m256 ve3 = _mm256_fmadd_ps(vt3, vp3, vs3);
121 const __m256 ve4 = _mm256_fmadd_ps(vt4, vp4, vs4);
122 const __m256 ve5 = _mm256_fmadd_ps(vt5, vp5, vs5);
123
124 const __m256 vd0 = _mm256_add_ps(ve0, vone);
125 const __m256 vd1 = _mm256_add_ps(ve1, vone);
126 const __m256 vd2 = _mm256_add_ps(ve2, vone);
127 const __m256 vd3 = _mm256_add_ps(ve3, vone);
128 const __m256 vd4 = _mm256_add_ps(ve4, vone);
129 const __m256 vd5 = _mm256_add_ps(ve5, vone);
130
131 __m256 vr0 = _mm256_rcp_ps(vd0);
132 __m256 vr1 = _mm256_rcp_ps(vd1);
133 __m256 vr2 = _mm256_rcp_ps(vd2);
134 __m256 vr3 = _mm256_rcp_ps(vd3);
135 __m256 vr4 = _mm256_rcp_ps(vd4);
136 __m256 vr5 = _mm256_rcp_ps(vd5);
137
138 vr0 = _mm256_fmadd_ps(_mm256_fnmadd_ps(vr0, vd0, vone), vr0, vr0);
139 vr1 = _mm256_fmadd_ps(_mm256_fnmadd_ps(vr1, vd1, vone), vr1, vr1);
140 vr2 = _mm256_fmadd_ps(_mm256_fnmadd_ps(vr2, vd2, vone), vr2, vr2);
141 vr3 = _mm256_fmadd_ps(_mm256_fnmadd_ps(vr3, vd3, vone), vr3, vr3);
142 vr4 = _mm256_fmadd_ps(_mm256_fnmadd_ps(vr4, vd4, vone), vr4, vr4);
143 vr5 = _mm256_fmadd_ps(_mm256_fnmadd_ps(vr5, vd5, vone), vr5, vr5);
144
145 vr0 = _mm256_fmadd_ps(_mm256_fnmadd_ps(vr0, vd0, vone), vr0, vr0);
146 vr1 = _mm256_fmadd_ps(_mm256_fnmadd_ps(vr1, vd1, vone), vr1, vr1);
147 vr2 = _mm256_fmadd_ps(_mm256_fnmadd_ps(vr2, vd2, vone), vr2, vr2);
148 vr3 = _mm256_fmadd_ps(_mm256_fnmadd_ps(vr3, vd3, vone), vr3, vr3);
149 vr4 = _mm256_fmadd_ps(_mm256_fnmadd_ps(vr4, vd4, vone), vr4, vr4);
150 vr5 = _mm256_fmadd_ps(_mm256_fnmadd_ps(vr5, vd5, vone), vr5, vr5);
151
152 __m256 vf0 = _mm256_mul_ps(ve0, vr0);
153 __m256 vf1 = _mm256_mul_ps(ve1, vr1);
154 __m256 vf2 = _mm256_mul_ps(ve2, vr2);
155 __m256 vf3 = _mm256_mul_ps(ve3, vr3);
156 __m256 vf4 = _mm256_mul_ps(ve4, vr4);
157 __m256 vf5 = _mm256_mul_ps(ve5, vr5);
158
159 vf0 = _mm256_andnot_ps(_mm256_cmp_ps(vz0, vdenorm_cutoff, _CMP_LT_OS), vf0);
160 vf1 = _mm256_andnot_ps(_mm256_cmp_ps(vz1, vdenorm_cutoff, _CMP_LT_OS), vf1);
161 vf2 = _mm256_andnot_ps(_mm256_cmp_ps(vz2, vdenorm_cutoff, _CMP_LT_OS), vf2);
162 vf3 = _mm256_andnot_ps(_mm256_cmp_ps(vz3, vdenorm_cutoff, _CMP_LT_OS), vf3);
163 vf4 = _mm256_andnot_ps(_mm256_cmp_ps(vz4, vdenorm_cutoff, _CMP_LT_OS), vf4);
164 vf5 = _mm256_andnot_ps(_mm256_cmp_ps(vz5, vdenorm_cutoff, _CMP_LT_OS), vf5);
165
166 vf0 = _mm256_blendv_ps(_mm256_sub_ps(vone, vf0), vf0, vx0);
167 vf1 = _mm256_blendv_ps(_mm256_sub_ps(vone, vf1), vf1, vx1);
168 vf2 = _mm256_blendv_ps(_mm256_sub_ps(vone, vf2), vf2, vx2);
169 vf3 = _mm256_blendv_ps(_mm256_sub_ps(vone, vf3), vf3, vx3);
170 vf4 = _mm256_blendv_ps(_mm256_sub_ps(vone, vf4), vf4, vx4);
171 vf5 = _mm256_blendv_ps(_mm256_sub_ps(vone, vf5), vf5, vx5);
172
173 _mm256_storeu_ps(y, vf0);
174 _mm256_storeu_ps(y + 8, vf1);
175 _mm256_storeu_ps(y + 16, vf2);
176 _mm256_storeu_ps(y + 24, vf3);
177 _mm256_storeu_ps(y + 32, vf4);
178 _mm256_storeu_ps(y + 40, vf5);
179 y += 48;
180 }
181 for (; n >= 8 * sizeof(float); n -= 8 * sizeof(float)) {
182 const __m256 vx = _mm256_loadu_ps(x);
183 x += 8;
184
185 const __m256 vz = _mm256_or_ps(vx, vsign_mask);
186
187 __m256 vn = _mm256_fmadd_ps(vz, vlog2e, vmagic_bias);
188 const __m256 vs = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn), 23));
189 vn = _mm256_sub_ps(vn, vmagic_bias);
190
191 __m256 vt = _mm256_fmadd_ps(vn, vminus_ln2, vz);
192
193 __m256 vp = _mm256_fmadd_ps(vc5, vt, vc4);
194 vp = _mm256_fmadd_ps(vp, vt, vc3);
195 vp = _mm256_fmadd_ps(vp, vt, vc2);
196 vp = _mm256_fmadd_ps(vp, vt, vc1);
197
198 vt = _mm256_mul_ps(vt, vs);
199 const __m256 ve = _mm256_fmadd_ps(vt, vp, vs);
200
201 const __m256 vd = _mm256_add_ps(ve, vone);
202 __m256 vr = _mm256_rcp_ps(vd);
203 vr = _mm256_fmadd_ps(_mm256_fnmadd_ps(vr, vd, vone), vr, vr);
204 vr = _mm256_fmadd_ps(_mm256_fnmadd_ps(vr, vd, vone), vr, vr);
205 __m256 vf = _mm256_mul_ps(ve, vr);
206
207 vf = _mm256_andnot_ps(_mm256_cmp_ps(vz, vdenorm_cutoff, _CMP_LT_OS), vf);
208 vf = _mm256_blendv_ps(_mm256_sub_ps(vone, vf), vf, vx);
209
210 _mm256_storeu_ps(y, vf);
211 y += 8;
212 }
213 if XNN_UNLIKELY(n != 0) {
214 assert(n >= 1 * sizeof(float));
215 assert(n <= 7 * sizeof(float));
216 const __m256i vmask = _mm256_loadu_si256((const __m256i*) ((uintptr_t) ¶ms->avx2_rr1_p5.mask_table[7] - n));
217
218 const __m256 vx = _mm256_maskload_ps(x, vmask);
219
220 const __m256 vz = _mm256_or_ps(vx, vsign_mask);
221
222 __m256 vn = _mm256_fmadd_ps(vz, vlog2e, vmagic_bias);
223 const __m256 vs = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn), 23));
224 vn = _mm256_sub_ps(vn, vmagic_bias);
225
226 __m256 vt = _mm256_fmadd_ps(vn, vminus_ln2, vz);
227
228 __m256 vp = _mm256_fmadd_ps(vc5, vt, vc4);
229 vp = _mm256_fmadd_ps(vp, vt, vc3);
230 vp = _mm256_fmadd_ps(vp, vt, vc2);
231 vp = _mm256_fmadd_ps(vp, vt, vc1);
232
233 vt = _mm256_mul_ps(vt, vs);
234 const __m256 ve = _mm256_fmadd_ps(vt, vp, vs);
235
236 const __m256 vd = _mm256_add_ps(ve, vone);
237 __m256 vr = _mm256_rcp_ps(vd);
238 vr = _mm256_fmadd_ps(_mm256_fnmadd_ps(vr, vd, vone), vr, vr);
239 vr = _mm256_fmadd_ps(_mm256_fnmadd_ps(vr, vd, vone), vr, vr);
240 __m256 vf = _mm256_mul_ps(ve, vr);
241
242 vf = _mm256_andnot_ps(_mm256_cmp_ps(vz, vdenorm_cutoff, _CMP_LT_OS), vf);
243 vf = _mm256_blendv_ps(_mm256_sub_ps(vone, vf), vf, vx);
244
245 __m128 vf_lo = _mm256_castps256_ps128(vf);
246 if (n & (4 * sizeof(float))) {
247 _mm_storeu_ps(y, vf_lo);
248 vf_lo = _mm256_extractf128_ps(vf, 1);
249 y += 4;
250 }
251 if (n & (2 * sizeof(float))) {
252 _mm_storel_pi((__m64*) y, vf_lo);
253 vf_lo = _mm_movehl_ps(vf_lo, vf_lo);
254 y += 2;
255 }
256 if (n & (1 * sizeof(float))) {
257 _mm_store_ss(y, vf_lo);
258 }
259 }
260 }
261