1 // Auto-generated file. Do not edit!
2 // Template: src/f32-vsigmoid/avx2-rr1-p5.c.in
3 // Generator: tools/xngen
4 //
5 // Copyright 2019 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9
10 #include <assert.h>
11
12 #include <immintrin.h>
13
14 #include <xnnpack/common.h>
15 #include <xnnpack/vunary.h>
16
17
xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr2fma_x40(size_t n,const float * x,float * y,const union xnn_f32_sigmoid_params params[restrict XNN_MIN_ELEMENTS (1)])18 void xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr2fma_x40(
19 size_t n,
20 const float* x,
21 float* y,
22 const union xnn_f32_sigmoid_params params[restrict XNN_MIN_ELEMENTS(1)])
23 {
24 assert(n % sizeof(float) == 0);
25
26 const __m256 vsign_mask = _mm256_load_ps(params->avx2_rr1_p5.sign_mask);
27 const __m256 vmagic_bias = _mm256_load_ps(params->avx2_rr1_p5.magic_bias);
28 const __m256 vlog2e = _mm256_load_ps(params->avx2_rr1_p5.log2e);
29 const __m256 vminus_ln2 = _mm256_load_ps(params->avx2_rr1_p5.minus_ln2);
30 const __m256 vc5 = _mm256_load_ps(params->avx2_rr1_p5.c5);
31 const __m256 vc4 = _mm256_load_ps(params->avx2_rr1_p5.c4);
32 const __m256 vc3 = _mm256_load_ps(params->avx2_rr1_p5.c3);
33 const __m256 vc2 = _mm256_load_ps(params->avx2_rr1_p5.c2);
34 const __m256 vc1 = _mm256_load_ps(params->avx2_rr1_p5.c1);
35 const __m256 vone = _mm256_load_ps(params->avx2_rr1_p5.one);
36 const __m256 vdenorm_cutoff = _mm256_load_ps(params->avx2_rr1_p5.denorm_cutoff);
37
38 for (; n >= 40 * sizeof(float); n -= 40 * sizeof(float)) {
39 const __m256 vx0 = _mm256_loadu_ps(x);
40 const __m256 vx1 = _mm256_loadu_ps(x + 8);
41 const __m256 vx2 = _mm256_loadu_ps(x + 16);
42 const __m256 vx3 = _mm256_loadu_ps(x + 24);
43 const __m256 vx4 = _mm256_loadu_ps(x + 32);
44 x += 40;
45
46 const __m256 vz0 = _mm256_or_ps(vx0, vsign_mask);
47 const __m256 vz1 = _mm256_or_ps(vx1, vsign_mask);
48 const __m256 vz2 = _mm256_or_ps(vx2, vsign_mask);
49 const __m256 vz3 = _mm256_or_ps(vx3, vsign_mask);
50 const __m256 vz4 = _mm256_or_ps(vx4, vsign_mask);
51
52 __m256 vn0 = _mm256_fmadd_ps(vz0, vlog2e, vmagic_bias);
53 __m256 vn1 = _mm256_fmadd_ps(vz1, vlog2e, vmagic_bias);
54 __m256 vn2 = _mm256_fmadd_ps(vz2, vlog2e, vmagic_bias);
55 __m256 vn3 = _mm256_fmadd_ps(vz3, vlog2e, vmagic_bias);
56 __m256 vn4 = _mm256_fmadd_ps(vz4, vlog2e, vmagic_bias);
57
58 const __m256 vs0 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn0), 23));
59 const __m256 vs1 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn1), 23));
60 const __m256 vs2 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn2), 23));
61 const __m256 vs3 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn3), 23));
62 const __m256 vs4 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn4), 23));
63
64 vn0 = _mm256_sub_ps(vn0, vmagic_bias);
65 vn1 = _mm256_sub_ps(vn1, vmagic_bias);
66 vn2 = _mm256_sub_ps(vn2, vmagic_bias);
67 vn3 = _mm256_sub_ps(vn3, vmagic_bias);
68 vn4 = _mm256_sub_ps(vn4, vmagic_bias);
69
70 __m256 vt0 = _mm256_fmadd_ps(vn0, vminus_ln2, vz0);
71 __m256 vt1 = _mm256_fmadd_ps(vn1, vminus_ln2, vz1);
72 __m256 vt2 = _mm256_fmadd_ps(vn2, vminus_ln2, vz2);
73 __m256 vt3 = _mm256_fmadd_ps(vn3, vminus_ln2, vz3);
74 __m256 vt4 = _mm256_fmadd_ps(vn4, vminus_ln2, vz4);
75
76 __m256 vp0 = _mm256_fmadd_ps(vc5, vt0, vc4);
77 __m256 vp1 = _mm256_fmadd_ps(vc5, vt1, vc4);
78 __m256 vp2 = _mm256_fmadd_ps(vc5, vt2, vc4);
79 __m256 vp3 = _mm256_fmadd_ps(vc5, vt3, vc4);
80 __m256 vp4 = _mm256_fmadd_ps(vc5, vt4, vc4);
81
82 vp0 = _mm256_fmadd_ps(vp0, vt0, vc3);
83 vp1 = _mm256_fmadd_ps(vp1, vt1, vc3);
84 vp2 = _mm256_fmadd_ps(vp2, vt2, vc3);
85 vp3 = _mm256_fmadd_ps(vp3, vt3, vc3);
86 vp4 = _mm256_fmadd_ps(vp4, vt4, vc3);
87
88 vp0 = _mm256_fmadd_ps(vp0, vt0, vc2);
89 vp1 = _mm256_fmadd_ps(vp1, vt1, vc2);
90 vp2 = _mm256_fmadd_ps(vp2, vt2, vc2);
91 vp3 = _mm256_fmadd_ps(vp3, vt3, vc2);
92 vp4 = _mm256_fmadd_ps(vp4, vt4, vc2);
93
94 vp0 = _mm256_fmadd_ps(vp0, vt0, vc1);
95 vp1 = _mm256_fmadd_ps(vp1, vt1, vc1);
96 vp2 = _mm256_fmadd_ps(vp2, vt2, vc1);
97 vp3 = _mm256_fmadd_ps(vp3, vt3, vc1);
98 vp4 = _mm256_fmadd_ps(vp4, vt4, vc1);
99
100 vt0 = _mm256_mul_ps(vt0, vs0);
101 vt1 = _mm256_mul_ps(vt1, vs1);
102 vt2 = _mm256_mul_ps(vt2, vs2);
103 vt3 = _mm256_mul_ps(vt3, vs3);
104 vt4 = _mm256_mul_ps(vt4, vs4);
105
106 const __m256 ve0 = _mm256_fmadd_ps(vt0, vp0, vs0);
107 const __m256 ve1 = _mm256_fmadd_ps(vt1, vp1, vs1);
108 const __m256 ve2 = _mm256_fmadd_ps(vt2, vp2, vs2);
109 const __m256 ve3 = _mm256_fmadd_ps(vt3, vp3, vs3);
110 const __m256 ve4 = _mm256_fmadd_ps(vt4, vp4, vs4);
111
112 const __m256 vd0 = _mm256_add_ps(ve0, vone);
113 const __m256 vd1 = _mm256_add_ps(ve1, vone);
114 const __m256 vd2 = _mm256_add_ps(ve2, vone);
115 const __m256 vd3 = _mm256_add_ps(ve3, vone);
116 const __m256 vd4 = _mm256_add_ps(ve4, vone);
117
118 __m256 vr0 = _mm256_rcp_ps(vd0);
119 __m256 vr1 = _mm256_rcp_ps(vd1);
120 __m256 vr2 = _mm256_rcp_ps(vd2);
121 __m256 vr3 = _mm256_rcp_ps(vd3);
122 __m256 vr4 = _mm256_rcp_ps(vd4);
123
124 vr0 = _mm256_fmadd_ps(_mm256_fnmadd_ps(vr0, vd0, vone), vr0, vr0);
125 vr1 = _mm256_fmadd_ps(_mm256_fnmadd_ps(vr1, vd1, vone), vr1, vr1);
126 vr2 = _mm256_fmadd_ps(_mm256_fnmadd_ps(vr2, vd2, vone), vr2, vr2);
127 vr3 = _mm256_fmadd_ps(_mm256_fnmadd_ps(vr3, vd3, vone), vr3, vr3);
128 vr4 = _mm256_fmadd_ps(_mm256_fnmadd_ps(vr4, vd4, vone), vr4, vr4);
129
130 vr0 = _mm256_fmadd_ps(_mm256_fnmadd_ps(vr0, vd0, vone), vr0, vr0);
131 vr1 = _mm256_fmadd_ps(_mm256_fnmadd_ps(vr1, vd1, vone), vr1, vr1);
132 vr2 = _mm256_fmadd_ps(_mm256_fnmadd_ps(vr2, vd2, vone), vr2, vr2);
133 vr3 = _mm256_fmadd_ps(_mm256_fnmadd_ps(vr3, vd3, vone), vr3, vr3);
134 vr4 = _mm256_fmadd_ps(_mm256_fnmadd_ps(vr4, vd4, vone), vr4, vr4);
135
136 __m256 vf0 = _mm256_mul_ps(ve0, vr0);
137 __m256 vf1 = _mm256_mul_ps(ve1, vr1);
138 __m256 vf2 = _mm256_mul_ps(ve2, vr2);
139 __m256 vf3 = _mm256_mul_ps(ve3, vr3);
140 __m256 vf4 = _mm256_mul_ps(ve4, vr4);
141
142 vf0 = _mm256_andnot_ps(_mm256_cmp_ps(vz0, vdenorm_cutoff, _CMP_LT_OS), vf0);
143 vf1 = _mm256_andnot_ps(_mm256_cmp_ps(vz1, vdenorm_cutoff, _CMP_LT_OS), vf1);
144 vf2 = _mm256_andnot_ps(_mm256_cmp_ps(vz2, vdenorm_cutoff, _CMP_LT_OS), vf2);
145 vf3 = _mm256_andnot_ps(_mm256_cmp_ps(vz3, vdenorm_cutoff, _CMP_LT_OS), vf3);
146 vf4 = _mm256_andnot_ps(_mm256_cmp_ps(vz4, vdenorm_cutoff, _CMP_LT_OS), vf4);
147
148 vf0 = _mm256_blendv_ps(_mm256_sub_ps(vone, vf0), vf0, vx0);
149 vf1 = _mm256_blendv_ps(_mm256_sub_ps(vone, vf1), vf1, vx1);
150 vf2 = _mm256_blendv_ps(_mm256_sub_ps(vone, vf2), vf2, vx2);
151 vf3 = _mm256_blendv_ps(_mm256_sub_ps(vone, vf3), vf3, vx3);
152 vf4 = _mm256_blendv_ps(_mm256_sub_ps(vone, vf4), vf4, vx4);
153
154 _mm256_storeu_ps(y, vf0);
155 _mm256_storeu_ps(y + 8, vf1);
156 _mm256_storeu_ps(y + 16, vf2);
157 _mm256_storeu_ps(y + 24, vf3);
158 _mm256_storeu_ps(y + 32, vf4);
159 y += 40;
160 }
161 for (; n >= 8 * sizeof(float); n -= 8 * sizeof(float)) {
162 const __m256 vx = _mm256_loadu_ps(x);
163 x += 8;
164
165 const __m256 vz = _mm256_or_ps(vx, vsign_mask);
166
167 __m256 vn = _mm256_fmadd_ps(vz, vlog2e, vmagic_bias);
168 const __m256 vs = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn), 23));
169 vn = _mm256_sub_ps(vn, vmagic_bias);
170
171 __m256 vt = _mm256_fmadd_ps(vn, vminus_ln2, vz);
172
173 __m256 vp = _mm256_fmadd_ps(vc5, vt, vc4);
174 vp = _mm256_fmadd_ps(vp, vt, vc3);
175 vp = _mm256_fmadd_ps(vp, vt, vc2);
176 vp = _mm256_fmadd_ps(vp, vt, vc1);
177
178 vt = _mm256_mul_ps(vt, vs);
179 const __m256 ve = _mm256_fmadd_ps(vt, vp, vs);
180
181 const __m256 vd = _mm256_add_ps(ve, vone);
182 __m256 vr = _mm256_rcp_ps(vd);
183 vr = _mm256_fmadd_ps(_mm256_fnmadd_ps(vr, vd, vone), vr, vr);
184 vr = _mm256_fmadd_ps(_mm256_fnmadd_ps(vr, vd, vone), vr, vr);
185 __m256 vf = _mm256_mul_ps(ve, vr);
186
187 vf = _mm256_andnot_ps(_mm256_cmp_ps(vz, vdenorm_cutoff, _CMP_LT_OS), vf);
188 vf = _mm256_blendv_ps(_mm256_sub_ps(vone, vf), vf, vx);
189
190 _mm256_storeu_ps(y, vf);
191 y += 8;
192 }
193 if XNN_UNLIKELY(n != 0) {
194 assert(n >= 1 * sizeof(float));
195 assert(n <= 7 * sizeof(float));
196 const __m256i vmask = _mm256_loadu_si256((const __m256i*) ((uintptr_t) ¶ms->avx2_rr1_p5.mask_table[7] - n));
197
198 const __m256 vx = _mm256_maskload_ps(x, vmask);
199
200 const __m256 vz = _mm256_or_ps(vx, vsign_mask);
201
202 __m256 vn = _mm256_fmadd_ps(vz, vlog2e, vmagic_bias);
203 const __m256 vs = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn), 23));
204 vn = _mm256_sub_ps(vn, vmagic_bias);
205
206 __m256 vt = _mm256_fmadd_ps(vn, vminus_ln2, vz);
207
208 __m256 vp = _mm256_fmadd_ps(vc5, vt, vc4);
209 vp = _mm256_fmadd_ps(vp, vt, vc3);
210 vp = _mm256_fmadd_ps(vp, vt, vc2);
211 vp = _mm256_fmadd_ps(vp, vt, vc1);
212
213 vt = _mm256_mul_ps(vt, vs);
214 const __m256 ve = _mm256_fmadd_ps(vt, vp, vs);
215
216 const __m256 vd = _mm256_add_ps(ve, vone);
217 __m256 vr = _mm256_rcp_ps(vd);
218 vr = _mm256_fmadd_ps(_mm256_fnmadd_ps(vr, vd, vone), vr, vr);
219 vr = _mm256_fmadd_ps(_mm256_fnmadd_ps(vr, vd, vone), vr, vr);
220 __m256 vf = _mm256_mul_ps(ve, vr);
221
222 vf = _mm256_andnot_ps(_mm256_cmp_ps(vz, vdenorm_cutoff, _CMP_LT_OS), vf);
223 vf = _mm256_blendv_ps(_mm256_sub_ps(vone, vf), vf, vx);
224
225 __m128 vf_lo = _mm256_castps256_ps128(vf);
226 if (n & (4 * sizeof(float))) {
227 _mm_storeu_ps(y, vf_lo);
228 vf_lo = _mm256_extractf128_ps(vf, 1);
229 y += 4;
230 }
231 if (n & (2 * sizeof(float))) {
232 _mm_storel_pi((__m64*) y, vf_lo);
233 vf_lo = _mm_movehl_ps(vf_lo, vf_lo);
234 y += 2;
235 }
236 if (n & (1 * sizeof(float))) {
237 _mm_store_ss(y, vf_lo);
238 }
239 }
240 }
241