xref: /aosp_15_r20/external/XNNPACK/src/f32-raddstoreexpminusmax/gen/wasmsimd-rr2-p5-x16.c (revision 4bdc94577ba0e567308109d787f7fec7b531ce36)
1 // Auto-generated file. Do not edit!
2 //   Template: src/f32-raddstoreexpminusmax/wasmsimd-rr2-p5.c.in
3 //   Generator: tools/xngen
4 //
5 // Copyright 2020 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9 
10 #include <assert.h>
11 
12 #include <wasm_simd128.h>
13 
14 #include <xnnpack/common.h>
15 #include <xnnpack/raddstoreexpminusmax.h>
16 
17 
xnn_f32_raddstoreexpminusmax_ukernel__wasmsimd_rr2_p5_x16(size_t elements,const float * input,const float * max,float * output,float * sum,const union xnn_f32_expminus_params params[restrict XNN_MIN_ELEMENTS (1)])18 void xnn_f32_raddstoreexpminusmax_ukernel__wasmsimd_rr2_p5_x16(
19     size_t elements,
20     const float* input,
21     const float* max,
22     float* output,
23     float* sum,
24     const union xnn_f32_expminus_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
25 {
26   assert(elements % sizeof(float) == 0);
27 
28   const v128_t vi_max = wasm_v128_load32_splat(max);
29   const v128_t vlog2e = wasm_v128_load64_splat(params->wasmsimd_rr2_p5.log2e);
30   const v128_t vmagic_bias = wasm_v128_load64_splat(params->wasmsimd_rr2_p5.magic_bias);
31   const v128_t vminus_ln2_hi = wasm_v128_load64_splat(params->wasmsimd_rr2_p5.minus_ln2_hi);
32   const v128_t vminus_ln2_lo = wasm_v128_load64_splat(params->wasmsimd_rr2_p5.minus_ln2_lo);
33   const v128_t vc5 = wasm_v128_load64_splat(params->wasmsimd_rr2_p5.c5);
34   const v128_t vc4 = wasm_v128_load64_splat(params->wasmsimd_rr2_p5.c4);
35   const v128_t vc3 = wasm_v128_load64_splat(params->wasmsimd_rr2_p5.c3);
36   const v128_t vc2 = wasm_v128_load64_splat(params->wasmsimd_rr2_p5.c2);
37   const v128_t vc1 = wasm_v128_load64_splat(params->wasmsimd_rr2_p5.c1);
38   const v128_t vdenorm_cutoff = wasm_v128_load64_splat(params->wasmsimd_rr2_p5.denorm_cutoff);
39 
40   v128_t vacc0 = wasm_f32x4_const_splat(0.0f);
41   for (; elements >= 16 * sizeof(float); elements -= 16 * sizeof(float)) {
42     // Load 16 (4x4) inputs at a time.
43     const v128_t vi0123 = wasm_v128_load(input);
44     const v128_t vi4567 = wasm_v128_load(input + 4);
45     const v128_t vi89AB = wasm_v128_load(input + 8);
46     const v128_t viCDEF = wasm_v128_load(input + 12);
47     input += 16;
48 
49     // Subtract maximum input x := i - i_max. This implies x <= 0.
50     const v128_t vx0123 = wasm_f32x4_sub(vi0123, vi_max);
51     const v128_t vx4567 = wasm_f32x4_sub(vi4567, vi_max);
52     const v128_t vx89AB = wasm_f32x4_sub(vi89AB, vi_max);
53     const v128_t vxCDEF = wasm_f32x4_sub(viCDEF, vi_max);
54 
55     // Compute reduced argument elements := round(x / log(2)).
56     v128_t vn0123 = wasm_f32x4_add(vmagic_bias, wasm_f32x4_mul(vx0123, vlog2e));
57     v128_t vn4567 = wasm_f32x4_add(vmagic_bias, wasm_f32x4_mul(vx4567, vlog2e));
58     v128_t vn89AB = wasm_f32x4_add(vmagic_bias, wasm_f32x4_mul(vx89AB, vlog2e));
59     v128_t vnCDEF = wasm_f32x4_add(vmagic_bias, wasm_f32x4_mul(vxCDEF, vlog2e));
60 
61     // Create a floating-point number s (scale) such that s == 2**elements for inputs which don't cause underflow, i.e.
62     // -87.33642 <= x <= 0.0, and -126 <= elements <= 0 accordingly.
63     const v128_t vs0123 = wasm_i32x4_shl(vn0123, 23);
64     const v128_t vs4567 = wasm_i32x4_shl(vn4567, 23);
65     const v128_t vs89AB = wasm_i32x4_shl(vn89AB, 23);
66     const v128_t vsCDEF = wasm_i32x4_shl(vnCDEF, 23);
67 
68     // Subtract the large number back to get final elements := round(x / log(2)).
69     vn0123 = wasm_f32x4_sub(vn0123, vmagic_bias);
70     vn4567 = wasm_f32x4_sub(vn4567, vmagic_bias);
71     vn89AB = wasm_f32x4_sub(vn89AB, vmagic_bias);
72     vnCDEF = wasm_f32x4_sub(vnCDEF, vmagic_bias);
73 
74     // Compute reduced argument t := x - elements * log(2).
75     // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
76     v128_t vt0123 = wasm_f32x4_add(vx0123, wasm_f32x4_mul(vn0123, vminus_ln2_hi));
77     v128_t vt4567 = wasm_f32x4_add(vx4567, wasm_f32x4_mul(vn4567, vminus_ln2_hi));
78     v128_t vt89AB = wasm_f32x4_add(vx89AB, wasm_f32x4_mul(vn89AB, vminus_ln2_hi));
79     v128_t vtCDEF = wasm_f32x4_add(vxCDEF, wasm_f32x4_mul(vnCDEF, vminus_ln2_hi));
80 
81     vt0123 = wasm_f32x4_add(vt0123, wasm_f32x4_mul(vn0123, vminus_ln2_lo));
82     vt4567 = wasm_f32x4_add(vt4567, wasm_f32x4_mul(vn4567, vminus_ln2_lo));
83     vt89AB = wasm_f32x4_add(vt89AB, wasm_f32x4_mul(vn89AB, vminus_ln2_lo));
84     vtCDEF = wasm_f32x4_add(vtCDEF, wasm_f32x4_mul(vnCDEF, vminus_ln2_lo));
85 
86     // Compute degree-5 polynomial approximation for exp(t) on [-log(2)/2, log(2)/2].
87     v128_t vp0123 = wasm_f32x4_add(vc4, wasm_f32x4_mul(vc5, vt0123));
88     v128_t vp4567 = wasm_f32x4_add(vc4, wasm_f32x4_mul(vc5, vt4567));
89     v128_t vp89AB = wasm_f32x4_add(vc4, wasm_f32x4_mul(vc5, vt89AB));
90     v128_t vpCDEF = wasm_f32x4_add(vc4, wasm_f32x4_mul(vc5, vtCDEF));
91 
92     vp0123 = wasm_f32x4_add(vc3, wasm_f32x4_mul(vp0123, vt0123));
93     vp4567 = wasm_f32x4_add(vc3, wasm_f32x4_mul(vp4567, vt4567));
94     vp89AB = wasm_f32x4_add(vc3, wasm_f32x4_mul(vp89AB, vt89AB));
95     vpCDEF = wasm_f32x4_add(vc3, wasm_f32x4_mul(vpCDEF, vtCDEF));
96 
97     vp0123 = wasm_f32x4_add(vc2, wasm_f32x4_mul(vp0123, vt0123));
98     vp4567 = wasm_f32x4_add(vc2, wasm_f32x4_mul(vp4567, vt4567));
99     vp89AB = wasm_f32x4_add(vc2, wasm_f32x4_mul(vp89AB, vt89AB));
100     vpCDEF = wasm_f32x4_add(vc2, wasm_f32x4_mul(vpCDEF, vtCDEF));
101 
102     vp0123 = wasm_f32x4_add(vc1, wasm_f32x4_mul(vp0123, vt0123));
103     vp4567 = wasm_f32x4_add(vc1, wasm_f32x4_mul(vp4567, vt4567));
104     vp89AB = wasm_f32x4_add(vc1, wasm_f32x4_mul(vp89AB, vt89AB));
105     vpCDEF = wasm_f32x4_add(vc1, wasm_f32x4_mul(vpCDEF, vtCDEF));
106 
107     // Reconstruct the final f value:
108     //   f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
109     //     = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
110     //     = s + (t * s) * p
111     vt0123 = wasm_f32x4_mul(vt0123, vs0123);
112     vt4567 = wasm_f32x4_mul(vt4567, vs4567);
113     vt89AB = wasm_f32x4_mul(vt89AB, vs89AB);
114     vtCDEF = wasm_f32x4_mul(vtCDEF, vsCDEF);
115 
116     v128_t vf0123 = wasm_f32x4_add(vs0123, wasm_f32x4_mul(vt0123, vp0123));
117     v128_t vf4567 = wasm_f32x4_add(vs4567, wasm_f32x4_mul(vt4567, vp4567));
118     v128_t vf89AB = wasm_f32x4_add(vs89AB, wasm_f32x4_mul(vt89AB, vp89AB));
119     v128_t vfCDEF = wasm_f32x4_add(vsCDEF, wasm_f32x4_mul(vtCDEF, vpCDEF));
120 
121     // For inputs below zero cutoff, replace output with +0.0f.
122     // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
123     vf0123 = wasm_v128_andnot(vf0123, wasm_f32x4_lt(vx0123, vdenorm_cutoff));
124     vf4567 = wasm_v128_andnot(vf4567, wasm_f32x4_lt(vx4567, vdenorm_cutoff));
125     vf89AB = wasm_v128_andnot(vf89AB, wasm_f32x4_lt(vx89AB, vdenorm_cutoff));
126     vfCDEF = wasm_v128_andnot(vfCDEF, wasm_f32x4_lt(vxCDEF, vdenorm_cutoff));
127 
128     // Store 16 (4x4) outputs at a time.
129     wasm_v128_store(output, vf0123);
130     wasm_v128_store(output + 4, vf4567);
131     wasm_v128_store(output + 8, vf89AB);
132     wasm_v128_store(output + 12, vfCDEF);
133     output += 16;
134 
135     // Accumulate computed exponents.
136     vacc0 = wasm_f32x4_add(vacc0, vf0123);
137     vacc0 = wasm_f32x4_add(vacc0, vf4567);
138     vacc0 = wasm_f32x4_add(vacc0, vf89AB);
139     vacc0 = wasm_f32x4_add(vacc0, vfCDEF);
140   }
141 
142   v128_t vacc = vacc0;
143   for (; elements >= 4 * sizeof(float); elements -= 4 * sizeof(float)) {
144     // Load 4 inputs at a time.
145     const v128_t vi = wasm_v128_load(input);
146     input += 4;
147 
148     // Subtract maximum input x := i - i_max. This implies x <= 0.
149     const v128_t vx = wasm_f32x4_sub(vi, vi_max);
150 
151     // Compute reduced argument elements := round(x / log(2)).
152     v128_t vn = wasm_f32x4_add(vmagic_bias, wasm_f32x4_mul(vx, vlog2e));
153 
154     // Create a floating-point number s (scale) such that s == 2**elements for inputs which don't cause underflow, i.e.
155     // -87.33642 <= x <= 0.0, and -126 <= elements <= 0 accordingly.
156     const v128_t vs = wasm_i32x4_shl(vn, 23);
157 
158     // Subtract the large number back to get final elements := round(x / log(2)).
159     vn = wasm_f32x4_sub(vn, vmagic_bias);
160 
161     // Compute reduced argument t := x - elements * log(2).
162     // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
163     v128_t vt = wasm_f32x4_add(vx, wasm_f32x4_mul(vn, vminus_ln2_hi));
164     vt = wasm_f32x4_add(vt, wasm_f32x4_mul(vn, vminus_ln2_lo));
165 
166     // Compute degree-5 polynomial approximation for exp(t) on [-log(2)/2, log(2)/2].
167     v128_t vp = wasm_f32x4_add(vc4, wasm_f32x4_mul(vc5, vt));
168     vp = wasm_f32x4_add(vc3, wasm_f32x4_mul(vp, vt));
169     vp = wasm_f32x4_add(vc2, wasm_f32x4_mul(vp, vt));
170     vp = wasm_f32x4_add(vc1, wasm_f32x4_mul(vp, vt));
171 
172     // Reconstruct the final f value:
173     //   f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
174     //     = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
175     //     = s + (t * s) * p
176     vt = wasm_f32x4_mul(vt, vs);
177     v128_t vf = wasm_f32x4_add(vs, wasm_f32x4_mul(vt, vp));
178 
179     // For inputs below zero cutoff, replace output with +0.0f.
180     // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
181     vf = wasm_v128_andnot(vf, wasm_f32x4_lt(vx, vdenorm_cutoff));
182 
183     // Store 4 outputs at a time.
184     wasm_v128_store(output, vf);
185     output += 4;
186 
187     // Accumulate computed exponents.
188     vacc = wasm_f32x4_add(vacc, vf);
189   }
190   vacc = wasm_f32x4_add(vacc, wasm_v32x4_shuffle(vacc, vacc, 2, 3, 2, 3));
191   float vsum = wasm_f32x4_extract_lane(vacc, 0) + wasm_f32x4_extract_lane(vacc, 1);
192   if (elements != 0) {
193     assert(elements >= 1 * sizeof(float));
194     assert(elements <= 3 * sizeof(float));
195     // Load 4 inputs at a time.
196     const v128_t vi = wasm_v128_load(input);
197 
198     // Subtract maximum input x := i - i_max. This implies x <= 0.
199     const v128_t vx = wasm_f32x4_sub(vi, vi_max);
200 
201     // Compute reduced argument elements := round(x / log(2)).
202     v128_t vn = wasm_f32x4_add(vmagic_bias, wasm_f32x4_mul(vx, vlog2e));
203 
204     // Create a floating-point number s (scale) such that s == 2**elements for inputs which don't cause underflow, i.e.
205     // -87.33642 <= x <= 0.0, and -126 <= elements <= 0 accordingly.
206     const v128_t vs = wasm_i32x4_shl(vn, 23);
207 
208     // Subtract the large number back to get final elements := round(x / log(2)).
209     vn = wasm_f32x4_sub(vn, vmagic_bias);
210 
211     // Compute reduced argument t := x - elements * log(2).
212     // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
213     v128_t vt = wasm_f32x4_add(vx, wasm_f32x4_mul(vn, vminus_ln2_hi));
214     vt = wasm_f32x4_add(vt, wasm_f32x4_mul(vn, vminus_ln2_lo));
215 
216     // Compute degree-5 polynomial approximation for exp(t) on [-log(2)/2, log(2)/2].
217     v128_t vp = wasm_f32x4_add(vc4, wasm_f32x4_mul(vc5, vt));
218     vp = wasm_f32x4_add(vc3, wasm_f32x4_mul(vp, vt));
219     vp = wasm_f32x4_add(vc2, wasm_f32x4_mul(vp, vt));
220     vp = wasm_f32x4_add(vc1, wasm_f32x4_mul(vp, vt));
221 
222     // Reconstruct the final f value:
223     //   f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
224     //     = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
225     //     = s + (t * s) * p
226     vt = wasm_f32x4_mul(vt, vs);
227     v128_t vf = wasm_f32x4_add(vs, wasm_f32x4_mul(vt, vp));
228 
229     // For inputs below zero cutoff, replace output with +0.0f.
230     // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
231     vf = wasm_v128_andnot(vf, wasm_f32x4_lt(vx, vdenorm_cutoff));
232 
233     if (elements & (2 * sizeof(float))) {
234       // Store and accumulate 2 outputs at a time.
235       const float vf0 = wasm_f32x4_extract_lane(vf, 0);
236       output[0] = vf0;
237       vsum += vf0;
238 
239       const float vf1 = wasm_f32x4_extract_lane(vf, 1);
240       output[1] = vf1;
241       vsum += vf1;
242 
243       vf = wasm_v32x4_shuffle(vf, vf, 2, 3, 2, 3);
244       output += 2;
245     }
246     if (elements & (1 * sizeof(float))) {
247       // Store 1 output at a time.
248       const float vf0 = wasm_f32x4_extract_lane(vf, 0);
249       *output = vf0;
250       vsum += vf0;
251     }
252   }
253   // Reduce 4 elements in the SIMD register
254   *sum = vsum;
255 }
256