1 // Auto-generated file. Do not edit!
2 // Template: src/f32-raddstoreexpminusmax/wasmsimd-rr2-p5.c.in
3 // Generator: tools/xngen
4 //
5 // Copyright 2020 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9
10 #include <assert.h>
11
12 #include <wasm_simd128.h>
13
14 #include <xnnpack/common.h>
15 #include <xnnpack/raddstoreexpminusmax.h>
16
17
xnn_f32_raddstoreexpminusmax_ukernel__wasmsimd_rr2_p5_x12_acc3(size_t elements,const float * input,const float * max,float * output,float * sum,const union xnn_f32_expminus_params params[restrict XNN_MIN_ELEMENTS (1)])18 void xnn_f32_raddstoreexpminusmax_ukernel__wasmsimd_rr2_p5_x12_acc3(
19 size_t elements,
20 const float* input,
21 const float* max,
22 float* output,
23 float* sum,
24 const union xnn_f32_expminus_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
25 {
26 assert(elements % sizeof(float) == 0);
27
28 const v128_t vi_max = wasm_v128_load32_splat(max);
29 const v128_t vlog2e = wasm_v128_load64_splat(params->wasmsimd_rr2_p5.log2e);
30 const v128_t vmagic_bias = wasm_v128_load64_splat(params->wasmsimd_rr2_p5.magic_bias);
31 const v128_t vminus_ln2_hi = wasm_v128_load64_splat(params->wasmsimd_rr2_p5.minus_ln2_hi);
32 const v128_t vminus_ln2_lo = wasm_v128_load64_splat(params->wasmsimd_rr2_p5.minus_ln2_lo);
33 const v128_t vc5 = wasm_v128_load64_splat(params->wasmsimd_rr2_p5.c5);
34 const v128_t vc4 = wasm_v128_load64_splat(params->wasmsimd_rr2_p5.c4);
35 const v128_t vc3 = wasm_v128_load64_splat(params->wasmsimd_rr2_p5.c3);
36 const v128_t vc2 = wasm_v128_load64_splat(params->wasmsimd_rr2_p5.c2);
37 const v128_t vc1 = wasm_v128_load64_splat(params->wasmsimd_rr2_p5.c1);
38 const v128_t vdenorm_cutoff = wasm_v128_load64_splat(params->wasmsimd_rr2_p5.denorm_cutoff);
39
40 v128_t vacc0 = wasm_f32x4_const_splat(0.0f);
41 v128_t vacc1 = vacc0;
42 v128_t vacc2 = vacc0;
43 for (; elements >= 12 * sizeof(float); elements -= 12 * sizeof(float)) {
44 // Load 12 (3x4) inputs at a time.
45 const v128_t vi0123 = wasm_v128_load(input);
46 const v128_t vi4567 = wasm_v128_load(input + 4);
47 const v128_t vi89AB = wasm_v128_load(input + 8);
48 input += 12;
49
50 // Subtract maximum input x := i - i_max. This implies x <= 0.
51 const v128_t vx0123 = wasm_f32x4_sub(vi0123, vi_max);
52 const v128_t vx4567 = wasm_f32x4_sub(vi4567, vi_max);
53 const v128_t vx89AB = wasm_f32x4_sub(vi89AB, vi_max);
54
55 // Compute reduced argument elements := round(x / log(2)).
56 v128_t vn0123 = wasm_f32x4_add(vmagic_bias, wasm_f32x4_mul(vx0123, vlog2e));
57 v128_t vn4567 = wasm_f32x4_add(vmagic_bias, wasm_f32x4_mul(vx4567, vlog2e));
58 v128_t vn89AB = wasm_f32x4_add(vmagic_bias, wasm_f32x4_mul(vx89AB, vlog2e));
59
60 // Create a floating-point number s (scale) such that s == 2**elements for inputs which don't cause underflow, i.e.
61 // -87.33642 <= x <= 0.0, and -126 <= elements <= 0 accordingly.
62 const v128_t vs0123 = wasm_i32x4_shl(vn0123, 23);
63 const v128_t vs4567 = wasm_i32x4_shl(vn4567, 23);
64 const v128_t vs89AB = wasm_i32x4_shl(vn89AB, 23);
65
66 // Subtract the large number back to get final elements := round(x / log(2)).
67 vn0123 = wasm_f32x4_sub(vn0123, vmagic_bias);
68 vn4567 = wasm_f32x4_sub(vn4567, vmagic_bias);
69 vn89AB = wasm_f32x4_sub(vn89AB, vmagic_bias);
70
71 // Compute reduced argument t := x - elements * log(2).
72 // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
73 v128_t vt0123 = wasm_f32x4_add(vx0123, wasm_f32x4_mul(vn0123, vminus_ln2_hi));
74 v128_t vt4567 = wasm_f32x4_add(vx4567, wasm_f32x4_mul(vn4567, vminus_ln2_hi));
75 v128_t vt89AB = wasm_f32x4_add(vx89AB, wasm_f32x4_mul(vn89AB, vminus_ln2_hi));
76
77 vt0123 = wasm_f32x4_add(vt0123, wasm_f32x4_mul(vn0123, vminus_ln2_lo));
78 vt4567 = wasm_f32x4_add(vt4567, wasm_f32x4_mul(vn4567, vminus_ln2_lo));
79 vt89AB = wasm_f32x4_add(vt89AB, wasm_f32x4_mul(vn89AB, vminus_ln2_lo));
80
81 // Compute degree-5 polynomial approximation for exp(t) on [-log(2)/2, log(2)/2].
82 v128_t vp0123 = wasm_f32x4_add(vc4, wasm_f32x4_mul(vc5, vt0123));
83 v128_t vp4567 = wasm_f32x4_add(vc4, wasm_f32x4_mul(vc5, vt4567));
84 v128_t vp89AB = wasm_f32x4_add(vc4, wasm_f32x4_mul(vc5, vt89AB));
85
86 vp0123 = wasm_f32x4_add(vc3, wasm_f32x4_mul(vp0123, vt0123));
87 vp4567 = wasm_f32x4_add(vc3, wasm_f32x4_mul(vp4567, vt4567));
88 vp89AB = wasm_f32x4_add(vc3, wasm_f32x4_mul(vp89AB, vt89AB));
89
90 vp0123 = wasm_f32x4_add(vc2, wasm_f32x4_mul(vp0123, vt0123));
91 vp4567 = wasm_f32x4_add(vc2, wasm_f32x4_mul(vp4567, vt4567));
92 vp89AB = wasm_f32x4_add(vc2, wasm_f32x4_mul(vp89AB, vt89AB));
93
94 vp0123 = wasm_f32x4_add(vc1, wasm_f32x4_mul(vp0123, vt0123));
95 vp4567 = wasm_f32x4_add(vc1, wasm_f32x4_mul(vp4567, vt4567));
96 vp89AB = wasm_f32x4_add(vc1, wasm_f32x4_mul(vp89AB, vt89AB));
97
98 // Reconstruct the final f value:
99 // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
100 // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
101 // = s + (t * s) * p
102 vt0123 = wasm_f32x4_mul(vt0123, vs0123);
103 vt4567 = wasm_f32x4_mul(vt4567, vs4567);
104 vt89AB = wasm_f32x4_mul(vt89AB, vs89AB);
105
106 v128_t vf0123 = wasm_f32x4_add(vs0123, wasm_f32x4_mul(vt0123, vp0123));
107 v128_t vf4567 = wasm_f32x4_add(vs4567, wasm_f32x4_mul(vt4567, vp4567));
108 v128_t vf89AB = wasm_f32x4_add(vs89AB, wasm_f32x4_mul(vt89AB, vp89AB));
109
110 // For inputs below zero cutoff, replace output with +0.0f.
111 // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
112 vf0123 = wasm_v128_andnot(vf0123, wasm_f32x4_lt(vx0123, vdenorm_cutoff));
113 vf4567 = wasm_v128_andnot(vf4567, wasm_f32x4_lt(vx4567, vdenorm_cutoff));
114 vf89AB = wasm_v128_andnot(vf89AB, wasm_f32x4_lt(vx89AB, vdenorm_cutoff));
115
116 // Store 12 (3x4) outputs at a time.
117 wasm_v128_store(output, vf0123);
118 wasm_v128_store(output + 4, vf4567);
119 wasm_v128_store(output + 8, vf89AB);
120 output += 12;
121
122 // Accumulate computed exponents.
123 vacc0 = wasm_f32x4_add(vacc0, vf0123);
124 vacc1 = wasm_f32x4_add(vacc1, vf4567);
125 vacc2 = wasm_f32x4_add(vacc2, vf89AB);
126 }
127 // Add up all accumulators to vacc0
128 vacc0 = wasm_f32x4_add(vacc0, vacc1);
129 vacc0 = wasm_f32x4_add(vacc0, vacc2);
130
131 v128_t vacc = vacc0;
132 for (; elements >= 4 * sizeof(float); elements -= 4 * sizeof(float)) {
133 // Load 4 inputs at a time.
134 const v128_t vi = wasm_v128_load(input);
135 input += 4;
136
137 // Subtract maximum input x := i - i_max. This implies x <= 0.
138 const v128_t vx = wasm_f32x4_sub(vi, vi_max);
139
140 // Compute reduced argument elements := round(x / log(2)).
141 v128_t vn = wasm_f32x4_add(vmagic_bias, wasm_f32x4_mul(vx, vlog2e));
142
143 // Create a floating-point number s (scale) such that s == 2**elements for inputs which don't cause underflow, i.e.
144 // -87.33642 <= x <= 0.0, and -126 <= elements <= 0 accordingly.
145 const v128_t vs = wasm_i32x4_shl(vn, 23);
146
147 // Subtract the large number back to get final elements := round(x / log(2)).
148 vn = wasm_f32x4_sub(vn, vmagic_bias);
149
150 // Compute reduced argument t := x - elements * log(2).
151 // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
152 v128_t vt = wasm_f32x4_add(vx, wasm_f32x4_mul(vn, vminus_ln2_hi));
153 vt = wasm_f32x4_add(vt, wasm_f32x4_mul(vn, vminus_ln2_lo));
154
155 // Compute degree-5 polynomial approximation for exp(t) on [-log(2)/2, log(2)/2].
156 v128_t vp = wasm_f32x4_add(vc4, wasm_f32x4_mul(vc5, vt));
157 vp = wasm_f32x4_add(vc3, wasm_f32x4_mul(vp, vt));
158 vp = wasm_f32x4_add(vc2, wasm_f32x4_mul(vp, vt));
159 vp = wasm_f32x4_add(vc1, wasm_f32x4_mul(vp, vt));
160
161 // Reconstruct the final f value:
162 // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
163 // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
164 // = s + (t * s) * p
165 vt = wasm_f32x4_mul(vt, vs);
166 v128_t vf = wasm_f32x4_add(vs, wasm_f32x4_mul(vt, vp));
167
168 // For inputs below zero cutoff, replace output with +0.0f.
169 // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
170 vf = wasm_v128_andnot(vf, wasm_f32x4_lt(vx, vdenorm_cutoff));
171
172 // Store 4 outputs at a time.
173 wasm_v128_store(output, vf);
174 output += 4;
175
176 // Accumulate computed exponents.
177 vacc = wasm_f32x4_add(vacc, vf);
178 }
179 vacc = wasm_f32x4_add(vacc, wasm_v32x4_shuffle(vacc, vacc, 2, 3, 2, 3));
180 float vsum = wasm_f32x4_extract_lane(vacc, 0) + wasm_f32x4_extract_lane(vacc, 1);
181 if (elements != 0) {
182 assert(elements >= 1 * sizeof(float));
183 assert(elements <= 3 * sizeof(float));
184 // Load 4 inputs at a time.
185 const v128_t vi = wasm_v128_load(input);
186
187 // Subtract maximum input x := i - i_max. This implies x <= 0.
188 const v128_t vx = wasm_f32x4_sub(vi, vi_max);
189
190 // Compute reduced argument elements := round(x / log(2)).
191 v128_t vn = wasm_f32x4_add(vmagic_bias, wasm_f32x4_mul(vx, vlog2e));
192
193 // Create a floating-point number s (scale) such that s == 2**elements for inputs which don't cause underflow, i.e.
194 // -87.33642 <= x <= 0.0, and -126 <= elements <= 0 accordingly.
195 const v128_t vs = wasm_i32x4_shl(vn, 23);
196
197 // Subtract the large number back to get final elements := round(x / log(2)).
198 vn = wasm_f32x4_sub(vn, vmagic_bias);
199
200 // Compute reduced argument t := x - elements * log(2).
201 // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
202 v128_t vt = wasm_f32x4_add(vx, wasm_f32x4_mul(vn, vminus_ln2_hi));
203 vt = wasm_f32x4_add(vt, wasm_f32x4_mul(vn, vminus_ln2_lo));
204
205 // Compute degree-5 polynomial approximation for exp(t) on [-log(2)/2, log(2)/2].
206 v128_t vp = wasm_f32x4_add(vc4, wasm_f32x4_mul(vc5, vt));
207 vp = wasm_f32x4_add(vc3, wasm_f32x4_mul(vp, vt));
208 vp = wasm_f32x4_add(vc2, wasm_f32x4_mul(vp, vt));
209 vp = wasm_f32x4_add(vc1, wasm_f32x4_mul(vp, vt));
210
211 // Reconstruct the final f value:
212 // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
213 // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
214 // = s + (t * s) * p
215 vt = wasm_f32x4_mul(vt, vs);
216 v128_t vf = wasm_f32x4_add(vs, wasm_f32x4_mul(vt, vp));
217
218 // For inputs below zero cutoff, replace output with +0.0f.
219 // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
220 vf = wasm_v128_andnot(vf, wasm_f32x4_lt(vx, vdenorm_cutoff));
221
222 if (elements & (2 * sizeof(float))) {
223 // Store and accumulate 2 outputs at a time.
224 const float vf0 = wasm_f32x4_extract_lane(vf, 0);
225 output[0] = vf0;
226 vsum += vf0;
227
228 const float vf1 = wasm_f32x4_extract_lane(vf, 1);
229 output[1] = vf1;
230 vsum += vf1;
231
232 vf = wasm_v32x4_shuffle(vf, vf, 2, 3, 2, 3);
233 output += 2;
234 }
235 if (elements & (1 * sizeof(float))) {
236 // Store 1 output at a time.
237 const float vf0 = wasm_f32x4_extract_lane(vf, 0);
238 *output = vf0;
239 vsum += vf0;
240 }
241 }
242 // Reduce 4 elements in the SIMD register
243 *sum = vsum;
244 }
245