1 // Auto-generated file. Do not edit!
2 // Template: src/f32-raddstoreexpminusmax/neon-p5.c.in
3 // Generator: tools/xngen
4 //
5 // Copyright 2020 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9
10 #include <assert.h>
11
12 #include <arm_neon.h>
13
14 #include <xnnpack/common.h>
15 #include <xnnpack/raddstoreexpminusmax.h>
16
17
xnn_f32_raddstoreexpminusmax_ukernel__neon_rr2_p5_x8_acc2(size_t elements,const float * input,const float * max,float * output,float * sum,const union xnn_f32_expminus_params params[restrict XNN_MIN_ELEMENTS (1)])18 void xnn_f32_raddstoreexpminusmax_ukernel__neon_rr2_p5_x8_acc2(
19 size_t elements,
20 const float* input,
21 const float* max,
22 float* output,
23 float* sum,
24 const union xnn_f32_expminus_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
25 {
26 assert(elements % sizeof(float) == 0);
27
28 const float32x4_t vi_max = vld1q_dup_f32(max);
29 const float32x4_t vlog2e = vld1q_dup_f32(¶ms->neon_rr2_p5.log2e);
30 const float32x4_t vmagic_bias = vld1q_dup_f32(¶ms->neon_rr2_p5.magic_bias);
31 const float32x4_t vminus_ln2_hi = vld1q_dup_f32(¶ms->neon_rr2_p5.minus_ln2_hi);
32 const float32x4_t vminus_ln2_lo = vld1q_dup_f32(¶ms->neon_rr2_p5.minus_ln2_lo);
33 const float32x4_t vc5 = vld1q_dup_f32(¶ms->neon_rr2_p5.c5);
34 const float32x4_t vc4 = vld1q_dup_f32(¶ms->neon_rr2_p5.c4);
35 const float32x4_t vc3 = vld1q_dup_f32(¶ms->neon_rr2_p5.c3);
36 const float32x4_t vc2 = vld1q_dup_f32(¶ms->neon_rr2_p5.c2);
37 const float32x4_t vc1 = vld1q_dup_f32(¶ms->neon_rr2_p5.c1);
38 const float32x4_t vdenorm_cutoff = vld1q_dup_f32(¶ms->neon_rr2_p5.denorm_cutoff);
39
40 float32x4_t vacc0 = vmovq_n_f32(0.0f);
41 float32x4_t vacc1 = vmovq_n_f32(0.0f);
42 for (; elements >= 8 * sizeof(float); elements -= 8 * sizeof(float)) {
43 const float32x4_t vi0123 = vld1q_f32(input); input += 4;
44 const float32x4_t vi4567 = vld1q_f32(input); input += 4;
45
46 const float32x4_t vx0123 = vsubq_f32(vi0123, vi_max);
47 const float32x4_t vx4567 = vsubq_f32(vi4567, vi_max);
48
49 float32x4_t vn0123 = vmlaq_f32(vmagic_bias, vx0123, vlog2e);
50 float32x4_t vn4567 = vmlaq_f32(vmagic_bias, vx4567, vlog2e);
51
52 const float32x4_t vs0123 = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn0123), 23));
53 const float32x4_t vs4567 = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn4567), 23));
54
55 vn0123 = vsubq_f32(vn0123, vmagic_bias);
56 vn4567 = vsubq_f32(vn4567, vmagic_bias);
57
58 float32x4_t vt0123 = vmlaq_f32(vx0123, vn0123, vminus_ln2_hi);
59 float32x4_t vt4567 = vmlaq_f32(vx4567, vn4567, vminus_ln2_hi);
60
61 vt0123 = vmlaq_f32(vt0123, vn0123, vminus_ln2_lo);
62 vt4567 = vmlaq_f32(vt4567, vn4567, vminus_ln2_lo);
63
64 float32x4_t vp0123 = vmlaq_f32(vc4, vc5, vt0123);
65 float32x4_t vp4567 = vmlaq_f32(vc4, vc5, vt4567);
66
67 vp0123 = vmlaq_f32(vc3, vp0123, vt0123);
68 vp4567 = vmlaq_f32(vc3, vp4567, vt4567);
69
70 vp0123 = vmlaq_f32(vc2, vp0123, vt0123);
71 vp4567 = vmlaq_f32(vc2, vp4567, vt4567);
72
73 vp0123 = vmlaq_f32(vc1, vp0123, vt0123);
74 vp4567 = vmlaq_f32(vc1, vp4567, vt4567);
75
76 vt0123 = vmulq_f32(vt0123, vs0123);
77 vt4567 = vmulq_f32(vt4567, vs4567);
78
79 float32x4_t vf0123 = vmlaq_f32(vs0123, vp0123, vt0123);
80 float32x4_t vf4567 = vmlaq_f32(vs4567, vp4567, vt4567);
81
82 vf0123 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf0123), vcltq_f32(vx0123, vdenorm_cutoff)));
83 vf4567 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf4567), vcltq_f32(vx4567, vdenorm_cutoff)));
84
85 vst1q_f32(output, vf0123); output += 4;
86 vst1q_f32(output, vf4567); output += 4;
87
88 vacc0 = vaddq_f32(vacc0, vf0123);
89 vacc0 = vaddq_f32(vacc0, vf4567);
90 }
91 vacc0 = vaddq_f32(vacc0, vacc1);
92
93 float32x4_t vacc = vacc0;
94 for (; elements >= 4 * sizeof(float); elements -= 4 * sizeof(float)) {
95 const float32x4_t vi = vld1q_f32(input); input += 4;
96
97 const float32x4_t vx = vsubq_f32(vi, vi_max);
98
99 float32x4_t vn = vmlaq_f32(vmagic_bias, vx, vlog2e);
100
101 const float32x4_t vs = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn), 23));
102
103 vn = vsubq_f32(vn, vmagic_bias);
104
105 float32x4_t vt = vmlaq_f32(vx, vn, vminus_ln2_hi);
106 vt = vmlaq_f32(vt, vn, vminus_ln2_lo);
107
108 float32x4_t vp = vmlaq_f32(vc4, vc5, vt);
109 vp = vmlaq_f32(vc3, vp, vt);
110 vp = vmlaq_f32(vc2, vp, vt);
111 vp = vmlaq_f32(vc1, vp, vt);
112
113 vt = vmulq_f32(vt, vs);
114 float32x4_t vf = vmlaq_f32(vs, vp, vt);
115
116 vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
117
118 vst1q_f32(output, vf); output += 4;
119
120 vacc = vaddq_f32(vacc, vf);
121 }
122 #if XNN_ARCH_ARM64
123 float vacc_lo = vaddvq_f32(vacc);
124 #else
125 float32x2_t vacc_lo = vadd_f32(vget_high_f32(vacc), vget_low_f32(vacc));
126 #endif
127 if (elements != 0) {
128 assert(elements >= 1 * sizeof(float));
129 assert(elements <= 3 * sizeof(float));
130 const float32x4_t vi = vld1q_f32(input); input += 4;
131
132 const float32x4_t vx = vsubq_f32(vi, vi_max);
133
134 float32x4_t vn = vmlaq_f32(vmagic_bias, vx, vlog2e);
135
136 const float32x4_t vs = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn), 23));
137
138 vn = vsubq_f32(vn, vmagic_bias);
139
140 float32x4_t vt = vmlaq_f32(vx, vn, vminus_ln2_hi);
141 vt = vmlaq_f32(vt, vn, vminus_ln2_lo);
142
143 float32x4_t vp = vmlaq_f32(vc4, vc5, vt);
144 vp = vmlaq_f32(vc3, vp, vt);
145 vp = vmlaq_f32(vc2, vp, vt);
146 vp = vmlaq_f32(vc1, vp, vt);
147
148 vt = vmulq_f32(vt, vs);
149 float32x4_t vf = vmlaq_f32(vs, vp, vt);
150
151 vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
152
153 float32x2_t vf_lo = vget_low_f32(vf);
154 if (elements & (2 * sizeof(float))) {
155 vst1_f32(output, vf_lo); output += 2;
156
157 #if XNN_ARCH_ARM64
158 vacc_lo += vaddv_f32(vf_lo);
159 #else
160 vacc_lo = vadd_f32(vacc_lo, vf_lo);
161 #endif
162
163 vf_lo = vget_high_f32(vf);
164 }
165 if (elements & (1 * sizeof(float))) {
166 vst1_lane_f32(output, vf_lo, 0);
167
168 #if XNN_ARCH_ARM64
169 vacc_lo += vget_lane_f32(vf_lo, 0);
170 #else
171 vacc_lo = vadd_f32(vacc_lo, vreinterpret_f32_u64(vshl_n_u64(vreinterpret_u64_f32(vf_lo), 32)));
172 #endif
173 }
174 }
175 #if XNN_ARCH_ARM64
176 *sum = vacc_lo;
177 #else
178 vst1_lane_f32(sum, vpadd_f32(vacc_lo, vacc_lo), 0);
179 #endif
180 }
181