xref: /aosp_15_r20/external/XNNPACK/src/f32-raddstoreexpminusmax/gen/neon-rr2-p5-x16.c (revision 4bdc94577ba0e567308109d787f7fec7b531ce36)
1 // Auto-generated file. Do not edit!
2 //   Template: src/f32-raddstoreexpminusmax/neon-p5.c.in
3 //   Generator: tools/xngen
4 //
5 // Copyright 2020 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9 
10 #include <assert.h>
11 
12 #include <arm_neon.h>
13 
14 #include <xnnpack/common.h>
15 #include <xnnpack/raddstoreexpminusmax.h>
16 
17 
xnn_f32_raddstoreexpminusmax_ukernel__neon_rr2_p5_x16(size_t elements,const float * input,const float * max,float * output,float * sum,const union xnn_f32_expminus_params params[restrict XNN_MIN_ELEMENTS (1)])18 void xnn_f32_raddstoreexpminusmax_ukernel__neon_rr2_p5_x16(
19     size_t elements,
20     const float* input,
21     const float* max,
22     float* output,
23     float* sum,
24     const union xnn_f32_expminus_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
25 {
26   assert(elements % sizeof(float) == 0);
27 
28   const float32x4_t vi_max = vld1q_dup_f32(max);
29   const float32x4_t vlog2e = vld1q_dup_f32(&params->neon_rr2_p5.log2e);
30   const float32x4_t vmagic_bias = vld1q_dup_f32(&params->neon_rr2_p5.magic_bias);
31   const float32x4_t vminus_ln2_hi = vld1q_dup_f32(&params->neon_rr2_p5.minus_ln2_hi);
32   const float32x4_t vminus_ln2_lo = vld1q_dup_f32(&params->neon_rr2_p5.minus_ln2_lo);
33   const float32x4_t vc5 = vld1q_dup_f32(&params->neon_rr2_p5.c5);
34   const float32x4_t vc4 = vld1q_dup_f32(&params->neon_rr2_p5.c4);
35   const float32x4_t vc3 = vld1q_dup_f32(&params->neon_rr2_p5.c3);
36   const float32x4_t vc2 = vld1q_dup_f32(&params->neon_rr2_p5.c2);
37   const float32x4_t vc1 = vld1q_dup_f32(&params->neon_rr2_p5.c1);
38   const float32x4_t vdenorm_cutoff = vld1q_dup_f32(&params->neon_rr2_p5.denorm_cutoff);
39 
40   float32x4_t vacc0 = vmovq_n_f32(0.0f);
41   for (; elements >= 16 * sizeof(float); elements -= 16 * sizeof(float)) {
42     const float32x4_t vi0123 = vld1q_f32(input); input += 4;
43     const float32x4_t vi4567 = vld1q_f32(input); input += 4;
44     const float32x4_t vi89AB = vld1q_f32(input); input += 4;
45     const float32x4_t viCDEF = vld1q_f32(input); input += 4;
46 
47     const float32x4_t vx0123 = vsubq_f32(vi0123, vi_max);
48     const float32x4_t vx4567 = vsubq_f32(vi4567, vi_max);
49     const float32x4_t vx89AB = vsubq_f32(vi89AB, vi_max);
50     const float32x4_t vxCDEF = vsubq_f32(viCDEF, vi_max);
51 
52     float32x4_t vn0123 = vmlaq_f32(vmagic_bias, vx0123, vlog2e);
53     float32x4_t vn4567 = vmlaq_f32(vmagic_bias, vx4567, vlog2e);
54     float32x4_t vn89AB = vmlaq_f32(vmagic_bias, vx89AB, vlog2e);
55     float32x4_t vnCDEF = vmlaq_f32(vmagic_bias, vxCDEF, vlog2e);
56 
57     const float32x4_t vs0123 = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn0123), 23));
58     const float32x4_t vs4567 = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn4567), 23));
59     const float32x4_t vs89AB = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn89AB), 23));
60     const float32x4_t vsCDEF = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vnCDEF), 23));
61 
62     vn0123 = vsubq_f32(vn0123, vmagic_bias);
63     vn4567 = vsubq_f32(vn4567, vmagic_bias);
64     vn89AB = vsubq_f32(vn89AB, vmagic_bias);
65     vnCDEF = vsubq_f32(vnCDEF, vmagic_bias);
66 
67     float32x4_t vt0123 = vmlaq_f32(vx0123, vn0123, vminus_ln2_hi);
68     float32x4_t vt4567 = vmlaq_f32(vx4567, vn4567, vminus_ln2_hi);
69     float32x4_t vt89AB = vmlaq_f32(vx89AB, vn89AB, vminus_ln2_hi);
70     float32x4_t vtCDEF = vmlaq_f32(vxCDEF, vnCDEF, vminus_ln2_hi);
71 
72     vt0123 = vmlaq_f32(vt0123, vn0123, vminus_ln2_lo);
73     vt4567 = vmlaq_f32(vt4567, vn4567, vminus_ln2_lo);
74     vt89AB = vmlaq_f32(vt89AB, vn89AB, vminus_ln2_lo);
75     vtCDEF = vmlaq_f32(vtCDEF, vnCDEF, vminus_ln2_lo);
76 
77     float32x4_t vp0123 = vmlaq_f32(vc4, vc5, vt0123);
78     float32x4_t vp4567 = vmlaq_f32(vc4, vc5, vt4567);
79     float32x4_t vp89AB = vmlaq_f32(vc4, vc5, vt89AB);
80     float32x4_t vpCDEF = vmlaq_f32(vc4, vc5, vtCDEF);
81 
82     vp0123 = vmlaq_f32(vc3, vp0123, vt0123);
83     vp4567 = vmlaq_f32(vc3, vp4567, vt4567);
84     vp89AB = vmlaq_f32(vc3, vp89AB, vt89AB);
85     vpCDEF = vmlaq_f32(vc3, vpCDEF, vtCDEF);
86 
87     vp0123 = vmlaq_f32(vc2, vp0123, vt0123);
88     vp4567 = vmlaq_f32(vc2, vp4567, vt4567);
89     vp89AB = vmlaq_f32(vc2, vp89AB, vt89AB);
90     vpCDEF = vmlaq_f32(vc2, vpCDEF, vtCDEF);
91 
92     vp0123 = vmlaq_f32(vc1, vp0123, vt0123);
93     vp4567 = vmlaq_f32(vc1, vp4567, vt4567);
94     vp89AB = vmlaq_f32(vc1, vp89AB, vt89AB);
95     vpCDEF = vmlaq_f32(vc1, vpCDEF, vtCDEF);
96 
97     vt0123 = vmulq_f32(vt0123, vs0123);
98     vt4567 = vmulq_f32(vt4567, vs4567);
99     vt89AB = vmulq_f32(vt89AB, vs89AB);
100     vtCDEF = vmulq_f32(vtCDEF, vsCDEF);
101 
102     float32x4_t vf0123 = vmlaq_f32(vs0123, vp0123, vt0123);
103     float32x4_t vf4567 = vmlaq_f32(vs4567, vp4567, vt4567);
104     float32x4_t vf89AB = vmlaq_f32(vs89AB, vp89AB, vt89AB);
105     float32x4_t vfCDEF = vmlaq_f32(vsCDEF, vpCDEF, vtCDEF);
106 
107     vf0123 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf0123), vcltq_f32(vx0123, vdenorm_cutoff)));
108     vf4567 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf4567), vcltq_f32(vx4567, vdenorm_cutoff)));
109     vf89AB = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf89AB), vcltq_f32(vx89AB, vdenorm_cutoff)));
110     vfCDEF = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vfCDEF), vcltq_f32(vxCDEF, vdenorm_cutoff)));
111 
112     vst1q_f32(output, vf0123); output += 4;
113     vst1q_f32(output, vf4567); output += 4;
114     vst1q_f32(output, vf89AB); output += 4;
115     vst1q_f32(output, vfCDEF); output += 4;
116 
117     vacc0 = vaddq_f32(vacc0, vf0123);
118     vacc0 = vaddq_f32(vacc0, vf4567);
119     vacc0 = vaddq_f32(vacc0, vf89AB);
120     vacc0 = vaddq_f32(vacc0, vfCDEF);
121   }
122 
123   float32x4_t vacc = vacc0;
124   for (; elements >= 4 * sizeof(float); elements -= 4 * sizeof(float)) {
125     const float32x4_t vi = vld1q_f32(input); input += 4;
126 
127     const float32x4_t vx = vsubq_f32(vi, vi_max);
128 
129     float32x4_t vn = vmlaq_f32(vmagic_bias, vx, vlog2e);
130 
131     const float32x4_t vs = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn), 23));
132 
133     vn = vsubq_f32(vn, vmagic_bias);
134 
135     float32x4_t vt = vmlaq_f32(vx, vn, vminus_ln2_hi);
136     vt = vmlaq_f32(vt, vn, vminus_ln2_lo);
137 
138     float32x4_t vp = vmlaq_f32(vc4, vc5, vt);
139     vp = vmlaq_f32(vc3, vp, vt);
140     vp = vmlaq_f32(vc2, vp, vt);
141     vp = vmlaq_f32(vc1, vp, vt);
142 
143     vt = vmulq_f32(vt, vs);
144     float32x4_t vf = vmlaq_f32(vs, vp, vt);
145 
146     vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
147 
148     vst1q_f32(output, vf); output += 4;
149 
150     vacc = vaddq_f32(vacc, vf);
151   }
152 #if XNN_ARCH_ARM64
153   float vacc_lo = vaddvq_f32(vacc);
154 #else
155   float32x2_t vacc_lo = vadd_f32(vget_high_f32(vacc), vget_low_f32(vacc));
156 #endif
157   if (elements != 0) {
158     assert(elements >= 1 * sizeof(float));
159     assert(elements <= 3 * sizeof(float));
160     const float32x4_t vi = vld1q_f32(input); input += 4;
161 
162     const float32x4_t vx = vsubq_f32(vi, vi_max);
163 
164     float32x4_t vn = vmlaq_f32(vmagic_bias, vx, vlog2e);
165 
166     const float32x4_t vs = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn), 23));
167 
168     vn = vsubq_f32(vn, vmagic_bias);
169 
170     float32x4_t vt = vmlaq_f32(vx, vn, vminus_ln2_hi);
171     vt = vmlaq_f32(vt, vn, vminus_ln2_lo);
172 
173     float32x4_t vp = vmlaq_f32(vc4, vc5, vt);
174     vp = vmlaq_f32(vc3, vp, vt);
175     vp = vmlaq_f32(vc2, vp, vt);
176     vp = vmlaq_f32(vc1, vp, vt);
177 
178     vt = vmulq_f32(vt, vs);
179     float32x4_t vf = vmlaq_f32(vs, vp, vt);
180 
181     vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
182 
183     float32x2_t vf_lo = vget_low_f32(vf);
184     if (elements & (2 * sizeof(float))) {
185       vst1_f32(output, vf_lo); output += 2;
186 
187       #if XNN_ARCH_ARM64
188         vacc_lo += vaddv_f32(vf_lo);
189       #else
190         vacc_lo = vadd_f32(vacc_lo, vf_lo);
191       #endif
192 
193       vf_lo = vget_high_f32(vf);
194     }
195     if (elements & (1 * sizeof(float))) {
196       vst1_lane_f32(output, vf_lo, 0);
197 
198       #if XNN_ARCH_ARM64
199         vacc_lo += vget_lane_f32(vf_lo, 0);
200       #else
201         vacc_lo = vadd_f32(vacc_lo, vreinterpret_f32_u64(vshl_n_u64(vreinterpret_u64_f32(vf_lo), 32)));
202       #endif
203     }
204   }
205 #if XNN_ARCH_ARM64
206   *sum = vacc_lo;
207 #else
208   vst1_lane_f32(sum, vpadd_f32(vacc_lo, vacc_lo), 0);
209 #endif
210 }
211