1 // Auto-generated file. Do not edit!
2 // Template: src/f32-f16-vcvt/neon.c.in
3 // Generator: tools/xngen
4 //
5 // Copyright 2021 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9
10 #include <assert.h>
11
12 #include <arm_neon.h>
13
14 #include <xnnpack/common.h>
15 #include <xnnpack/vcvt.h>
16
17
xnn_f32_f16_vcvt_ukernel__neon_x16(size_t n,const float * input,void * output,const union xnn_f32_f16_cvt_params params[restrict XNN_MIN_ELEMENTS (1)])18 void xnn_f32_f16_vcvt_ukernel__neon_x16(
19 size_t n,
20 const float* input,
21 void* output,
22 const union xnn_f32_f16_cvt_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
23 {
24 assert(n != 0);
25 assert(n % sizeof(float) == 0);
26 assert(input != NULL);
27 assert(output != NULL);
28
29 const uint32x4_t vexp_bias = vld1q_dup_u32(¶ms->neon.exp_bias);
30 const float32x4_t vscale_to_inf = vld1q_dup_f32(¶ms->neon.scale_to_inf);
31 const uint32x4_t vexpw_max = vld1q_dup_u32(¶ms->neon.expw_max);
32 const float32x4_t vscale_to_zero = vld1q_dup_f32(¶ms->neon.scale_to_zero);
33 const uint32x4_t vbias_min = vdupq_n_u32(UINT32_C(0x40000000));
34 const uint16x8_t vexph_mask = vdupq_n_u16(UINT16_C(0x7C00));
35 const uint16x8_t vmanth_mask = vdupq_n_u16(UINT16_C(0x0FFF));
36 const uint16x8_t vsignh_mask = vdupq_n_u16(UINT16_C(0x8000));
37 const uint16x8_t vnanh = vdupq_n_u16(UINT16_C(0x7E00));
38
39 uint16_t* o = (uint16_t*) output;
40 for (; n >= 16 * sizeof(float); n -= 16 * sizeof(float)) {
41 const float32x4_t vx0 = vld1q_f32(input); input += 4;
42 const float32x4_t vx1 = vld1q_f32(input); input += 4;
43 const float32x4_t vx2 = vld1q_f32(input); input += 4;
44 const float32x4_t vx3 = vld1q_f32(input); input += 4;
45
46 const float32x4_t vabsx0 = vabsq_f32(vx0);
47 const float32x4_t vabsx1 = vabsq_f32(vx1);
48 const float32x4_t vabsx2 = vabsq_f32(vx2);
49 const float32x4_t vabsx3 = vabsq_f32(vx3);
50
51 uint32x4_t vbias0 = vaddq_u32(vreinterpretq_u32_f32(vabsx0), vexp_bias);
52 uint32x4_t vbias1 = vaddq_u32(vreinterpretq_u32_f32(vabsx1), vexp_bias);
53 uint32x4_t vbias2 = vaddq_u32(vreinterpretq_u32_f32(vabsx2), vexp_bias);
54 uint32x4_t vbias3 = vaddq_u32(vreinterpretq_u32_f32(vabsx3), vexp_bias);
55
56 float32x4_t vf0 = vmulq_f32(vabsx0, vscale_to_inf);
57 float32x4_t vf1 = vmulq_f32(vabsx1, vscale_to_inf);
58 float32x4_t vf2 = vmulq_f32(vabsx2, vscale_to_inf);
59 float32x4_t vf3 = vmulq_f32(vabsx3, vscale_to_inf);
60 const uint32x4_t vnanmaskw0 = vcgtq_u32(vreinterpretq_u32_f32(vabsx0), vexpw_max);
61 const uint32x4_t vnanmaskw1 = vcgtq_u32(vreinterpretq_u32_f32(vabsx1), vexpw_max);
62 const uint32x4_t vnanmaskw2 = vcgtq_u32(vreinterpretq_u32_f32(vabsx2), vexpw_max);
63 const uint32x4_t vnanmaskw3 = vcgtq_u32(vreinterpretq_u32_f32(vabsx3), vexpw_max);
64
65 vbias0 = vandq_u32(vbias0, vexpw_max);
66 vbias1 = vandq_u32(vbias1, vexpw_max);
67 vbias2 = vandq_u32(vbias2, vexpw_max);
68 vbias3 = vandq_u32(vbias3, vexpw_max);
69 vf0 = vmulq_f32(vf0, vscale_to_zero);
70 vf1 = vmulq_f32(vf1, vscale_to_zero);
71 vf2 = vmulq_f32(vf2, vscale_to_zero);
72 vf3 = vmulq_f32(vf3, vscale_to_zero);
73
74 const uint16x8_t vnanmaskh0 = vcombine_u16(vmovn_u32(vnanmaskw0), vmovn_u32(vnanmaskw1));
75 const uint16x8_t vnanmaskh1 = vcombine_u16(vmovn_u32(vnanmaskw2), vmovn_u32(vnanmaskw3));
76 vbias0 = vmaxq_u32(vbias0, vbias_min);
77 vbias1 = vmaxq_u32(vbias1, vbias_min);
78 vbias2 = vmaxq_u32(vbias2, vbias_min);
79 vbias3 = vmaxq_u32(vbias3, vbias_min);
80
81 vf0 = vaddq_f32(vf0, vreinterpretq_f32_u32(vbias0));
82 vf1 = vaddq_f32(vf1, vreinterpretq_f32_u32(vbias1));
83 vf2 = vaddq_f32(vf2, vreinterpretq_f32_u32(vbias2));
84 vf3 = vaddq_f32(vf3, vreinterpretq_f32_u32(vbias3));
85
86 uint16x8_t vexph0 = vcombine_u16(vshrn_n_u32(vreinterpretq_u32_f32(vf0), 13), vshrn_n_u32(vreinterpretq_u32_f32(vf1), 13));
87 uint16x8_t vexph1 = vcombine_u16(vshrn_n_u32(vreinterpretq_u32_f32(vf2), 13), vshrn_n_u32(vreinterpretq_u32_f32(vf3), 13));
88 uint16x8_t vmanth0 = vcombine_u16(vmovn_u32(vreinterpretq_u32_f32(vf0)), vmovn_u32(vreinterpretq_u32_f32(vf1)));
89 uint16x8_t vmanth1 = vcombine_u16(vmovn_u32(vreinterpretq_u32_f32(vf2)), vmovn_u32(vreinterpretq_u32_f32(vf3)));
90 uint16x8_t vsignh0 = vcombine_u16(vshrn_n_u32(vreinterpretq_u32_f32(vx0), 16), vshrn_n_u32(vreinterpretq_u32_f32(vx1), 16));
91 uint16x8_t vsignh1 = vcombine_u16(vshrn_n_u32(vreinterpretq_u32_f32(vx2), 16), vshrn_n_u32(vreinterpretq_u32_f32(vx3), 16));
92
93 vexph0 = vandq_u16(vexph0, vexph_mask);
94 vexph1 = vandq_u16(vexph1, vexph_mask);
95 vmanth0 = vandq_u16(vmanth0, vmanth_mask);
96 vmanth1 = vandq_u16(vmanth1, vmanth_mask);
97 vsignh0 = vandq_u16(vsignh0, vsignh_mask);
98 vsignh1 = vandq_u16(vsignh1, vsignh_mask);
99
100 uint16x8_t vh0 = vaddq_u16(vmanth0, vexph0);
101 uint16x8_t vh1 = vaddq_u16(vmanth1, vexph1);
102
103 vh0 = vbslq_u16(vnanmaskh0, vnanh, vh0);
104 vh1 = vbslq_u16(vnanmaskh1, vnanh, vh1);
105
106 vh0 = vorrq_u16(vh0, vsignh0);
107 vh1 = vorrq_u16(vh1, vsignh1);
108
109 vst1q_u16(o, vh0); o += 8;
110 vst1q_u16(o, vh1); o += 8;
111 }
112 for (; n >= 4 * sizeof(float); n -= 4 * sizeof(float)) {
113 const float32x4_t vx = vld1q_f32(input); input += 4;
114
115 const float32x4_t vabsx = vabsq_f32(vx);
116
117 uint32x4_t vbias = vaddq_u32(vreinterpretq_u32_f32(vabsx), vexp_bias);
118
119 float32x4_t vf = vmulq_f32(vabsx, vscale_to_inf);
120 const uint32x4_t vnanmaskw = vcgtq_u32(vreinterpretq_u32_f32(vabsx), vexpw_max);
121
122 vbias = vandq_u32(vbias, vexpw_max);
123 vf = vmulq_f32(vf, vscale_to_zero);
124
125 const uint16x4_t vnanmaskh = vmovn_u32(vnanmaskw);
126 vbias = vmaxq_u32(vbias, vbias_min);
127
128 vf = vaddq_f32(vf, vreinterpretq_f32_u32(vbias));
129
130 uint16x4_t vexph = vshrn_n_u32(vreinterpretq_u32_f32(vf), 13);
131 uint16x4_t vmanth = vmovn_u32(vreinterpretq_u32_f32(vf));
132 uint16x4_t vsignh = vshrn_n_u32(vreinterpretq_u32_f32(vx), 16);
133
134 vexph = vand_u16(vexph, vget_low_u16(vexph_mask));
135 vmanth = vand_u16(vmanth, vget_low_u16(vmanth_mask));
136 vsignh = vand_u16(vsignh, vget_low_u16(vsignh_mask));
137
138 uint16x4_t vh = vadd_u16(vmanth, vexph);
139
140 vh = vbsl_u16(vnanmaskh, vget_low_u16(vnanh), vh);
141
142 vh = vorr_u16(vh, vsignh);
143
144 vst1_u16(o, vh); o += 4;
145 }
146 if XNN_UNLIKELY(n != 0) {
147 assert(n % sizeof(float) == 0);
148 assert(n >= 1 * sizeof(float));
149 assert(n <= 3 * sizeof(float));
150 const float32x4_t vx = vld1q_f32(input);
151
152 const float32x4_t vabsx = vabsq_f32(vx);
153
154 uint32x4_t vbias = vaddq_u32(vreinterpretq_u32_f32(vabsx), vexp_bias);
155
156 float32x4_t vf = vmulq_f32(vabsx, vscale_to_inf);
157 const uint32x4_t vnanmaskw = vcgtq_u32(vreinterpretq_u32_f32(vabsx), vexpw_max);
158
159 vbias = vandq_u32(vbias, vexpw_max);
160 vf = vmulq_f32(vf, vscale_to_zero);
161
162 const uint16x4_t vnanmaskh = vmovn_u32(vnanmaskw);
163 vbias = vmaxq_u32(vbias, vbias_min);
164
165 vf = vaddq_f32(vf, vreinterpretq_f32_u32(vbias));
166
167 uint16x4_t vexph = vshrn_n_u32(vreinterpretq_u32_f32(vf), 13);
168 uint16x4_t vmanth = vmovn_u32(vreinterpretq_u32_f32(vf));
169 uint16x4_t vsignh = vshrn_n_u32(vreinterpretq_u32_f32(vx), 16);
170
171 vexph = vand_u16(vexph, vget_low_u16(vexph_mask));
172 vmanth = vand_u16(vmanth, vget_low_u16(vmanth_mask));
173 vsignh = vand_u16(vsignh, vget_low_u16(vsignh_mask));
174
175 uint16x4_t vh = vadd_u16(vmanth, vexph);
176
177 vh = vbsl_u16(vnanmaskh, vget_low_u16(vnanh), vh);
178
179 vh = vorr_u16(vh, vsignh);
180
181 if (n & (2 * sizeof(float))) {
182 vst1_lane_u32((void*) o, vreinterpret_u32_u16(vh), 0); o += 2;
183 vh = vext_u16(vh, vh, 2);
184 }
185 if (n & (1 * sizeof(float))) {
186 vst1_lane_u16(o, vh, 0);
187 }
188 }
189 }
190