xref: /aosp_15_r20/external/XNNPACK/src/f32-dwconv/gen/up8x4-minmax-neon-acc2.c (revision 4bdc94577ba0e567308109d787f7fec7b531ce36)
1 // Auto-generated file. Do not edit!
2 //   Template: src/f32-dwconv/up-neon.c.in
3 //   Generator: tools/xngen
4 //
5 // Copyright 2019 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9 
10 #include <assert.h>
11 
12 #include <arm_neon.h>
13 
14 #include <xnnpack/dwconv.h>
15 
16 
xnn_f32_dwconv_minmax_ukernel_up8x4__neon_acc2(size_t channels,size_t output_width,const float ** input,const float * weights,float * output,size_t input_stride,size_t output_increment,size_t input_offset,const float * zero,const union xnn_f32_minmax_params params[restrict XNN_MIN_ELEMENTS (1)])17 void xnn_f32_dwconv_minmax_ukernel_up8x4__neon_acc2(
18     size_t channels,
19     size_t output_width,
20     const float** input,
21     const float* weights,
22     float* output,
23     size_t input_stride,
24     size_t output_increment,
25     size_t input_offset,
26     const float* zero,
27     const union xnn_f32_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
28 {
29   assert(channels != 0);
30   assert(output_width != 0);
31 
32   const float32x4_t vmax = vld1q_dup_f32(&params->scalar.max);
33   const float32x4_t vmin = vld1q_dup_f32(&params->scalar.min);
34   do {
35     const float* i0 = input[0];
36     assert(i0 != NULL);
37     if XNN_UNPREDICTABLE(i0 != zero) {
38       i0 = (const float*) ((uintptr_t) i0 + input_offset);
39     }
40     const float* i1 = input[1];
41     assert(i1 != NULL);
42     if XNN_UNPREDICTABLE(i1 != zero) {
43       i1 = (const float*) ((uintptr_t) i1 + input_offset);
44     }
45     const float* i2 = input[2];
46     assert(i2 != NULL);
47     if XNN_UNPREDICTABLE(i2 != zero) {
48       i2 = (const float*) ((uintptr_t) i2 + input_offset);
49     }
50     const float* i3 = input[3];
51     assert(i3 != NULL);
52     if XNN_UNPREDICTABLE(i3 != zero) {
53       i3 = (const float*) ((uintptr_t) i3 + input_offset);
54     }
55 
56     input = (const float**) ((uintptr_t) input + input_stride);
57 
58     size_t c = channels;
59     const float* w = weights;
60     for (; c >= 8; c -= 8) {
61       float32x4_t vacc0123p0 = vld1q_f32(w); w += 4;
62       float32x4_t vacc4567p0 = vld1q_f32(w); w += 4;
63 
64 
65       const float32x4_t vi0x0123 = vld1q_f32(i0); i0 += 4;
66       const float32x4_t vi0x4567 = vld1q_f32(i0); i0 += 4;
67       const float32x4_t vk0x0123 = vld1q_f32(w); w += 4;
68       const float32x4_t vk0x4567 = vld1q_f32(w); w += 4;
69       vacc0123p0 = vmlaq_f32(vacc0123p0, vi0x0123, vk0x0123);
70       vacc4567p0 = vmlaq_f32(vacc4567p0, vi0x4567, vk0x4567);
71 
72       const float32x4_t vi1x0123 = vld1q_f32(i1); i1 += 4;
73       const float32x4_t vi1x4567 = vld1q_f32(i1); i1 += 4;
74       const float32x4_t vk1x0123 = vld1q_f32(w); w += 4;
75       const float32x4_t vk1x4567 = vld1q_f32(w); w += 4;
76       float32x4_t vacc0123p1 = vmulq_f32(vi1x0123, vk1x0123);
77       float32x4_t vacc4567p1 = vmulq_f32(vi1x4567, vk1x4567);
78 
79       const float32x4_t vi2x0123 = vld1q_f32(i2); i2 += 4;
80       const float32x4_t vi2x4567 = vld1q_f32(i2); i2 += 4;
81       const float32x4_t vk2x0123 = vld1q_f32(w); w += 4;
82       const float32x4_t vk2x4567 = vld1q_f32(w); w += 4;
83       vacc0123p0 = vmlaq_f32(vacc0123p0, vi2x0123, vk2x0123);
84       vacc4567p0 = vmlaq_f32(vacc4567p0, vi2x4567, vk2x4567);
85 
86       const float32x4_t vi3x0123 = vld1q_f32(i3); i3 += 4;
87       const float32x4_t vi3x4567 = vld1q_f32(i3); i3 += 4;
88       const float32x4_t vk3x0123 = vld1q_f32(w); w += 4;
89       const float32x4_t vk3x4567 = vld1q_f32(w); w += 4;
90       vacc0123p1 = vmlaq_f32(vacc0123p1, vi3x0123, vk3x0123);
91       vacc4567p1 = vmlaq_f32(vacc4567p1, vi3x4567, vk3x4567);
92 
93       // Add up all accumulators to vacc01234567p0
94       vacc0123p0 = vaddq_f32(vacc0123p0, vacc0123p1);
95       vacc4567p0 = vaddq_f32(vacc4567p0, vacc4567p1);
96 
97       float32x4_t vacc0123 = vmaxq_f32(vacc0123p0, vmin);
98       float32x4_t vacc4567 = vmaxq_f32(vacc4567p0, vmin);
99       vacc0123 = vminq_f32(vacc0123, vmax);
100       vacc4567 = vminq_f32(vacc4567, vmax);
101 
102       vst1q_f32(output, vacc0123); output += 4;
103       vst1q_f32(output, vacc4567); output += 4;
104     }
105     for (; c >= 4; c -= 4) {
106       float32x4_t vacc0123p0 = vld1q_f32(w); w += 4;
107 
108 
109       const float32x4_t vi0x0123 = vld1q_f32(i0); i0 += 4;
110       const float32x4_t vk0x0123 = vld1q_f32(w + 4);
111       vacc0123p0 = vmlaq_f32(vacc0123p0, vi0x0123, vk0x0123);
112 
113       const float32x4_t vi1x0123 = vld1q_f32(i1); i1 += 4;
114       const float32x4_t vk1x0123 = vld1q_f32(w + 12);
115       float32x4_t vacc0123p1 = vmulq_f32(vi1x0123, vk1x0123);
116 
117       const float32x4_t vi2x0123 = vld1q_f32(i2); i2 += 4;
118       const float32x4_t vk2x0123 = vld1q_f32(w + 20);
119       vacc0123p0 = vmlaq_f32(vacc0123p0, vi2x0123, vk2x0123);
120 
121       const float32x4_t vi3x0123 = vld1q_f32(i3); i3 += 4;
122       const float32x4_t vk3x0123 = vld1q_f32(w + 28);
123       vacc0123p1 = vmlaq_f32(vacc0123p1, vi3x0123, vk3x0123);
124 
125       // Add up all accumulators to vacc0123p0
126       vacc0123p0 = vaddq_f32(vacc0123p0, vacc0123p1);
127 
128       float32x4_t vacc0123 = vmaxq_f32(vacc0123p0, vmin);
129       vacc0123 = vminq_f32(vacc0123, vmax);
130 
131       vst1q_f32(output, vacc0123); output += 4;
132     }
133     if XNN_UNLIKELY(c != 0) {
134       float32x4_t vacc0123p0 = vld1q_f32(w);
135 
136 
137       const float32x4_t vi0x0123 = vld1q_f32(i0);
138       const float32x4_t vk0x0123 = vld1q_f32(w + 8);
139       vacc0123p0 = vmlaq_f32(vacc0123p0, vi0x0123, vk0x0123);
140 
141       const float32x4_t vi1x0123 = vld1q_f32(i1);
142       const float32x4_t vk1x0123 = vld1q_f32(w + 16);
143       float32x4_t vacc0123p1 = vmulq_f32(vi1x0123, vk1x0123);
144 
145       const float32x4_t vi2x0123 = vld1q_f32(i2);
146       const float32x4_t vk2x0123 = vld1q_f32(w + 24);
147       vacc0123p0 = vmlaq_f32(vacc0123p0, vi2x0123, vk2x0123);
148 
149       const float32x4_t vi3x0123 = vld1q_f32(i3);
150       const float32x4_t vk3x0123 = vld1q_f32(w + 32);
151       vacc0123p1 = vmlaq_f32(vacc0123p1, vi3x0123, vk3x0123);
152 
153       // Add up all accumulators to vacc0123p0
154       vacc0123p0 = vaddq_f32(vacc0123p0, vacc0123p1);
155 
156       float32x4_t vacc0123 = vmaxq_f32(vacc0123p0, vmin);
157       vacc0123 = vminq_f32(vacc0123, vmax);
158 
159       float32x2_t vacc01 = vget_low_f32(vacc0123);
160       if (c & 2) {
161         vst1_f32(output, vacc01); output += 2;
162         vacc01 = vget_high_f32(vacc0123);
163       }
164       if (c & 1) {
165         vst1_lane_f32(output, vacc01, 0); output += 1;
166       }
167     }
168 
169     output = (float*) ((uintptr_t) output + output_increment);
170   } while (--output_width != 0);
171 }
172