1 // Auto-generated file. Do not edit!
2 // Template: src/f32-dwconv/up-avx.c.in
3 // Generator: tools/xngen
4 //
5 // Copyright 2019 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9
10 #include <assert.h>
11
12 #include <immintrin.h>
13
14 #include <xnnpack/dwconv.h>
15
16
xnn_f32_dwconv_minmax_ukernel_up8x4__fma3_acc2(size_t channels,size_t output_width,const float ** input,const float * weights,float * output,size_t input_stride,size_t output_increment,size_t input_offset,const float * zero,const union xnn_f32_minmax_params params[restrict XNN_MIN_ELEMENTS (1)])17 void xnn_f32_dwconv_minmax_ukernel_up8x4__fma3_acc2(
18 size_t channels,
19 size_t output_width,
20 const float** input,
21 const float* weights,
22 float* output,
23 size_t input_stride,
24 size_t output_increment,
25 size_t input_offset,
26 const float* zero,
27 const union xnn_f32_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
28 {
29 assert(channels != 0);
30 assert(output_width != 0);
31
32 const __m256 vmax = _mm256_load_ps(params->avx.max);
33 const __m256 vmin = _mm256_load_ps(params->avx.min);
34 do {
35 const float* i0 = input[0];
36 assert(i0 != NULL);
37 if XNN_UNPREDICTABLE(i0 != zero) {
38 i0 = (const float*) ((uintptr_t) i0 + input_offset);
39 }
40 const float* i1 = input[1];
41 assert(i1 != NULL);
42 if XNN_UNPREDICTABLE(i1 != zero) {
43 i1 = (const float*) ((uintptr_t) i1 + input_offset);
44 }
45 const float* i2 = input[2];
46 assert(i2 != NULL);
47 if XNN_UNPREDICTABLE(i2 != zero) {
48 i2 = (const float*) ((uintptr_t) i2 + input_offset);
49 }
50 const float* i3 = input[3];
51 assert(i3 != NULL);
52 if XNN_UNPREDICTABLE(i3 != zero) {
53 i3 = (const float*) ((uintptr_t) i3 + input_offset);
54 }
55 input = (const float**) ((uintptr_t) input + input_stride);
56
57 size_t c = channels;
58 const float* w = weights;
59 for (; c >= 8; c -= 8) {
60 __m256 vacc01234567p0 = _mm256_load_ps(w);
61
62
63 const __m256 vi0x01234567 = _mm256_loadu_ps(i0);
64 i0 += 8;
65
66 const __m256 vk0x01234567 = _mm256_load_ps(w + 8);
67 vacc01234567p0 = _mm256_fmadd_ps(vi0x01234567, vk0x01234567, vacc01234567p0);
68
69 const __m256 vi1x01234567 = _mm256_loadu_ps(i1);
70 i1 += 8;
71
72 const __m256 vk1x01234567 = _mm256_load_ps(w + 16);
73 __m256 vacc01234567p1 = _mm256_mul_ps(vi1x01234567, vk1x01234567);
74
75 const __m256 vi2x01234567 = _mm256_loadu_ps(i2);
76 i2 += 8;
77
78 const __m256 vk2x01234567 = _mm256_load_ps(w + 24);
79 vacc01234567p0 = _mm256_fmadd_ps(vi2x01234567, vk2x01234567, vacc01234567p0);
80
81 const __m256 vi3x01234567 = _mm256_loadu_ps(i3);
82 i3 += 8;
83
84 const __m256 vk3x01234567 = _mm256_load_ps(w + 32);
85 vacc01234567p1 = _mm256_fmadd_ps(vi3x01234567, vk3x01234567, vacc01234567p1);
86
87 w += 40;
88
89 // Add up all accumulators to vacc01234567p0
90 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, vacc01234567p1);
91
92 __m256 vacc01234567 = _mm256_max_ps(vacc01234567p0, vmin);
93 vacc01234567 = _mm256_min_ps(vacc01234567, vmax);
94
95 _mm256_storeu_ps(output, vacc01234567);
96 output += 8;
97 }
98 if XNN_UNLIKELY(c != 0) {
99 assert(c >= 1);
100 assert(c <= 7);
101 const __m256i vmask = _mm256_loadu_si256((const __m256i*) ¶ms->avx.mask_table[7 - c]);
102
103 __m256 vacc01234567p0 = _mm256_load_ps(w);
104
105 const __m256 vi0x01234567 = _mm256_maskload_ps(i0, vmask);
106 const __m256 vk0x01234567 = _mm256_load_ps(w + 8);
107 vacc01234567p0 = _mm256_fmadd_ps(vi0x01234567, vk0x01234567, vacc01234567p0);
108
109 const __m256 vi1x01234567 = _mm256_maskload_ps(i1, vmask);
110 const __m256 vk1x01234567 = _mm256_load_ps(w + 16);
111 __m256 vacc01234567p1 = _mm256_mul_ps(vi1x01234567, vk1x01234567);
112
113 const __m256 vi2x01234567 = _mm256_maskload_ps(i2, vmask);
114 const __m256 vk2x01234567 = _mm256_load_ps(w + 24);
115 vacc01234567p0 = _mm256_fmadd_ps(vi2x01234567, vk2x01234567, vacc01234567p0);
116
117 const __m256 vi3x01234567 = _mm256_maskload_ps(i3, vmask);
118 const __m256 vk3x01234567 = _mm256_load_ps(w + 32);
119 vacc01234567p1 = _mm256_fmadd_ps(vi3x01234567, vk3x01234567, vacc01234567p1);
120
121 // Add up all accumulators to vacc01234567p0
122 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, vacc01234567p1);
123
124 __m256 vacc01234567 = _mm256_max_ps(vacc01234567p0, vmin);
125 vacc01234567 = _mm256_min_ps(vacc01234567, vmax);
126
127 __m128 vacc0123 = _mm256_castps256_ps128(vacc01234567);
128 if (c & 4) {
129 _mm_storeu_ps(output, vacc0123);
130 vacc0123 = _mm256_extractf128_ps(vacc01234567, 1);
131 output += 4;
132 }
133 if (c & 2) {
134 _mm_storel_pi((__m64*) output, vacc0123);
135 vacc0123 = _mm_movehl_ps(vacc0123, vacc0123);
136 output += 2;
137 }
138 if (c & 1) {
139 _mm_store_ss(output, vacc0123);
140 output += 1;
141 }
142 }
143
144 output = (float*) ((uintptr_t) output + output_increment);
145 } while (--output_width != 0);
146 }
147