1 // Auto-generated file. Do not edit!
2 // Template: src/f32-dwconv/up-wasmsimd.c.in
3 // Generator: tools/xngen
4 //
5 // Copyright 2020 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9
10 #include <assert.h>
11
12 #include <wasm_simd128.h>
13
14 #include <xnnpack/dwconv.h>
15
16
xnn_f32_dwconv_minmax_ukernel_up8x3__wasmsimd_arm_acc2(size_t channels,size_t output_width,const float ** input,const float * weights,float * output,size_t input_stride,size_t output_increment,size_t input_offset,const float * zero,const union xnn_f32_minmax_params params[restrict XNN_MIN_ELEMENTS (1)])17 void xnn_f32_dwconv_minmax_ukernel_up8x3__wasmsimd_arm_acc2(
18 size_t channels,
19 size_t output_width,
20 const float** input,
21 const float* weights,
22 float* output,
23 size_t input_stride,
24 size_t output_increment,
25 size_t input_offset,
26 const float* zero,
27 const union xnn_f32_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
28 {
29 assert(channels != 0);
30 assert(output_width != 0);
31
32 const v128_t vmin = wasm_v128_load64_splat(params->wasmsimd.min);
33 const v128_t vmax = wasm_v128_load64_splat(params->wasmsimd.max);
34 do {
35 const float* i0 = input[0];
36 assert(i0 != NULL);
37 if XNN_UNPREDICTABLE(i0 != zero) {
38 i0 = (const float*) ((uintptr_t) i0 + input_offset);
39 }
40 const float* i1 = input[1];
41 assert(i1 != NULL);
42 if XNN_UNPREDICTABLE(i1 != zero) {
43 i1 = (const float*) ((uintptr_t) i1 + input_offset);
44 }
45 const float* i2 = input[2];
46 assert(i2 != NULL);
47 if XNN_UNPREDICTABLE(i2 != zero) {
48 i2 = (const float*) ((uintptr_t) i2 + input_offset);
49 }
50 input = (const float**) ((uintptr_t) input + input_stride);
51
52 size_t c = channels;
53 const float* w = weights;
54 for (; c >= 8; c -= 8) {
55 v128_t vacc0123p0 = wasm_v128_load(w);
56 v128_t vacc4567p0 = wasm_v128_load(w + 4);
57
58
59 const v128_t vi0x0123 = wasm_v128_load(i0);
60 const v128_t vi0x4567 = wasm_v128_load(i0 + 4);
61 i0 += 8;
62
63 const v128_t vk0x0123 = wasm_v128_load(w + 8);
64 const v128_t vk0x4567 = wasm_v128_load(w + 12);
65 vacc0123p0 = wasm_f32x4_add(vacc0123p0, wasm_f32x4_mul(vi0x0123, vk0x0123));
66 vacc4567p0 = wasm_f32x4_add(vacc4567p0, wasm_f32x4_mul(vi0x4567, vk0x4567));
67
68 const v128_t vi1x0123 = wasm_v128_load(i1);
69 const v128_t vi1x4567 = wasm_v128_load(i1 + 4);
70 i1 += 8;
71
72 const v128_t vk1x0123 = wasm_v128_load(w + 16);
73 const v128_t vk1x4567 = wasm_v128_load(w + 20);
74 v128_t vacc0123p1 = wasm_f32x4_mul(vi1x0123, vk1x0123);
75 v128_t vacc4567p1 = wasm_f32x4_mul(vi1x4567, vk1x4567);
76
77 const v128_t vi2x0123 = wasm_v128_load(i2);
78 const v128_t vi2x4567 = wasm_v128_load(i2 + 4);
79 i2 += 8;
80
81 const v128_t vk2x0123 = wasm_v128_load(w + 24);
82 const v128_t vk2x4567 = wasm_v128_load(w + 28);
83 vacc0123p0 = wasm_f32x4_add(vacc0123p0, wasm_f32x4_mul(vi2x0123, vk2x0123));
84 vacc4567p0 = wasm_f32x4_add(vacc4567p0, wasm_f32x4_mul(vi2x4567, vk2x4567));
85
86 w += 32;
87
88 // Add up all accumulators to vacc01234567p0
89 vacc0123p0 = wasm_f32x4_add(vacc0123p0, vacc0123p1);
90 vacc4567p0 = wasm_f32x4_add(vacc4567p0, vacc4567p1);
91
92 v128_t vacc0123 = wasm_f32x4_max(vmin, vacc0123p0);
93 v128_t vacc4567 = wasm_f32x4_max(vmin, vacc4567p0);
94
95 vacc0123 = wasm_f32x4_min(vmax, vacc0123);
96 vacc4567 = wasm_f32x4_min(vmax, vacc4567);
97
98 wasm_v128_store(output, vacc0123);
99 wasm_v128_store(output + 4, vacc4567);
100 output += 8;
101 }
102 for (; c >= 4; c -= 4) {
103 v128_t vacc0123p0 = wasm_v128_load(w);
104
105 const v128_t vi0x0123 = wasm_v128_load(i0);
106 i0 += 4;
107
108 const v128_t vk0x0123 = wasm_v128_load(w + 8);
109 vacc0123p0 = wasm_f32x4_add(vacc0123p0, wasm_f32x4_mul(vi0x0123, vk0x0123));
110
111 const v128_t vi1x0123 = wasm_v128_load(i1);
112 i1 += 4;
113
114 const v128_t vk1x0123 = wasm_v128_load(w + 16);
115 v128_t vacc0123p1 = wasm_f32x4_mul(vi1x0123, vk1x0123);
116
117 const v128_t vi2x0123 = wasm_v128_load(i2);
118 i2 += 4;
119
120 const v128_t vk2x0123 = wasm_v128_load(w + 24);
121 vacc0123p0 = wasm_f32x4_add(vacc0123p0, wasm_f32x4_mul(vi2x0123, vk2x0123));
122
123 w += 4;
124
125 // Add up all accumulators to vacc01234567p0
126 vacc0123p0 = wasm_f32x4_add(vacc0123p0, vacc0123p1);
127
128 v128_t vacc0123 = wasm_f32x4_max(vmin, vacc0123p0);
129 vacc0123 = wasm_f32x4_min(vmax, vacc0123);
130
131 wasm_v128_store(output, vacc0123);
132 output += 4;
133 }
134 if XNN_UNLIKELY(c != 0) {
135 v128_t vacc0123p0 = wasm_v128_load(w);
136
137 const v128_t vi0x0123 = wasm_v128_load(i0);
138 const v128_t vk0x0123 = wasm_v128_load(w + 8);
139 vacc0123p0 = wasm_f32x4_add(vacc0123p0, wasm_f32x4_mul(vi0x0123, vk0x0123));
140
141 const v128_t vi1x0123 = wasm_v128_load(i1);
142 const v128_t vk1x0123 = wasm_v128_load(w + 16);
143 v128_t vacc0123p1 = wasm_f32x4_mul(vi1x0123, vk1x0123);
144
145 const v128_t vi2x0123 = wasm_v128_load(i2);
146 const v128_t vk2x0123 = wasm_v128_load(w + 24);
147 vacc0123p0 = wasm_f32x4_add(vacc0123p0, wasm_f32x4_mul(vi2x0123, vk2x0123));
148
149 // Add up all accumulators to vacc01234567p0
150 vacc0123p0 = wasm_f32x4_add(vacc0123p0, vacc0123p1);
151
152 v128_t vacc0123 = wasm_f32x4_max(vmin, vacc0123p0);
153 vacc0123 = wasm_f32x4_min(vmax, vacc0123);
154
155 if (c & 2) {
156 *((double*) output) = wasm_f64x2_extract_lane(vacc0123, 0);
157 vacc0123 = wasm_v32x4_shuffle(vacc0123, vacc0123, 2, 3, 2, 3);
158 output += 2;
159 }
160 if (c & 1) {
161 *output = wasm_f32x4_extract_lane(vacc0123, 0);
162 output += 1;
163 }
164 }
165
166 output = (float*) ((uintptr_t) output + output_increment);
167 } while (--output_width != 0);
168 }
169