1 // Auto-generated file. Do not edit!
2 // Template: src/f32-dwconv/up-wasmsimd.c.in
3 // Generator: tools/xngen
4 //
5 // Copyright 2020 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9
10 #include <assert.h>
11
12 #include <wasm_simd128.h>
13
14 #include <xnnpack/dwconv.h>
15
16
xnn_f32_dwconv_ukernel_up4x9__wasmsimd_acc2(size_t channels,size_t output_width,const float ** input,const float * weights,float * output,size_t input_stride,size_t output_increment,size_t input_offset,const float * zero,const union xnn_f32_default_params params[restrict XNN_MIN_ELEMENTS (1)])17 void xnn_f32_dwconv_ukernel_up4x9__wasmsimd_acc2(
18 size_t channels,
19 size_t output_width,
20 const float** input,
21 const float* weights,
22 float* output,
23 size_t input_stride,
24 size_t output_increment,
25 size_t input_offset,
26 const float* zero,
27 const union xnn_f32_default_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
28 {
29 assert(channels != 0);
30 assert(output_width != 0);
31
32 do {
33 const float* i0 = input[0];
34 assert(i0 != NULL);
35 if XNN_UNPREDICTABLE(i0 != zero) {
36 i0 = (const float*) ((uintptr_t) i0 + input_offset);
37 }
38 const float* i1 = input[1];
39 assert(i1 != NULL);
40 if XNN_UNPREDICTABLE(i1 != zero) {
41 i1 = (const float*) ((uintptr_t) i1 + input_offset);
42 }
43 const float* i2 = input[2];
44 assert(i2 != NULL);
45 if XNN_UNPREDICTABLE(i2 != zero) {
46 i2 = (const float*) ((uintptr_t) i2 + input_offset);
47 }
48 const float* i3 = input[3];
49 assert(i3 != NULL);
50 if XNN_UNPREDICTABLE(i3 != zero) {
51 i3 = (const float*) ((uintptr_t) i3 + input_offset);
52 }
53 const float* i4 = input[4];
54 assert(i4 != NULL);
55 if XNN_UNPREDICTABLE(i4 != zero) {
56 i4 = (const float*) ((uintptr_t) i4 + input_offset);
57 }
58 const float* i5 = input[5];
59 assert(i5 != NULL);
60 if XNN_UNPREDICTABLE(i5 != zero) {
61 i5 = (const float*) ((uintptr_t) i5 + input_offset);
62 }
63 const float* i6 = input[6];
64 assert(i6 != NULL);
65 if XNN_UNPREDICTABLE(i6 != zero) {
66 i6 = (const float*) ((uintptr_t) i6 + input_offset);
67 }
68 const float* i7 = input[7];
69 assert(i7 != NULL);
70 if XNN_UNPREDICTABLE(i7 != zero) {
71 i7 = (const float*) ((uintptr_t) i7 + input_offset);
72 }
73 const float* i8 = input[8];
74 assert(i8 != NULL);
75 if XNN_UNPREDICTABLE(i8 != zero) {
76 i8 = (const float*) ((uintptr_t) i8 + input_offset);
77 }
78 input = (const float**) ((uintptr_t) input + input_stride);
79
80 size_t c = channels;
81 const float* w = weights;
82 for (; c >= 4; c -= 4) {
83 v128_t vacc0123p0 = wasm_v128_load(w);
84
85
86 const v128_t vi0x0123 = wasm_v128_load(i0);
87 i0 += 4;
88
89 const v128_t vk0x0123 = wasm_v128_load(w + 4);
90 vacc0123p0 = wasm_f32x4_add(vacc0123p0, wasm_f32x4_mul(vi0x0123, vk0x0123));
91
92 const v128_t vi1x0123 = wasm_v128_load(i1);
93 i1 += 4;
94
95 const v128_t vk1x0123 = wasm_v128_load(w + 8);
96 v128_t vacc0123p1 = wasm_f32x4_mul(vi1x0123, vk1x0123);
97
98 const v128_t vi2x0123 = wasm_v128_load(i2);
99 i2 += 4;
100
101 const v128_t vk2x0123 = wasm_v128_load(w + 12);
102 vacc0123p0 = wasm_f32x4_add(vacc0123p0, wasm_f32x4_mul(vi2x0123, vk2x0123));
103
104 const v128_t vi3x0123 = wasm_v128_load(i3);
105 i3 += 4;
106
107 const v128_t vk3x0123 = wasm_v128_load(w + 16);
108 vacc0123p1 = wasm_f32x4_add(vacc0123p1, wasm_f32x4_mul(vi3x0123, vk3x0123));
109
110 const v128_t vi4x0123 = wasm_v128_load(i4);
111 i4 += 4;
112
113 const v128_t vk4x0123 = wasm_v128_load(w + 20);
114 vacc0123p0 = wasm_f32x4_add(vacc0123p0, wasm_f32x4_mul(vi4x0123, vk4x0123));
115
116 const v128_t vi5x0123 = wasm_v128_load(i5);
117 i5 += 4;
118
119 const v128_t vk5x0123 = wasm_v128_load(w + 24);
120 vacc0123p1 = wasm_f32x4_add(vacc0123p1, wasm_f32x4_mul(vi5x0123, vk5x0123));
121
122 const v128_t vi6x0123 = wasm_v128_load(i6);
123 i6 += 4;
124
125 const v128_t vk6x0123 = wasm_v128_load(w + 28);
126 vacc0123p0 = wasm_f32x4_add(vacc0123p0, wasm_f32x4_mul(vi6x0123, vk6x0123));
127
128 const v128_t vi7x0123 = wasm_v128_load(i7);
129 i7 += 4;
130
131 const v128_t vk7x0123 = wasm_v128_load(w + 32);
132 vacc0123p1 = wasm_f32x4_add(vacc0123p1, wasm_f32x4_mul(vi7x0123, vk7x0123));
133
134 const v128_t vi8x0123 = wasm_v128_load(i8);
135 i8 += 4;
136
137 const v128_t vk8x0123 = wasm_v128_load(w + 36);
138 vacc0123p0 = wasm_f32x4_add(vacc0123p0, wasm_f32x4_mul(vi8x0123, vk8x0123));
139
140 w += 40;
141
142 // Add up all accumulators to vacc0123p0
143 vacc0123p0 = wasm_f32x4_add(vacc0123p0, vacc0123p1);
144
145 const v128_t vacc0123 = vacc0123p0;
146
147 wasm_v128_store(output, vacc0123);
148 output += 4;
149 }
150 if XNN_UNLIKELY(c != 0) {
151 v128_t vacc0123p0 = wasm_v128_load(w);
152
153 const v128_t vi0x0123 = wasm_v128_load(i0);
154 const v128_t vk0x0123 = wasm_v128_load(w + 4);
155 vacc0123p0 = wasm_f32x4_add(vacc0123p0, wasm_f32x4_mul(vi0x0123, vk0x0123));
156
157 const v128_t vi1x0123 = wasm_v128_load(i1);
158 const v128_t vk1x0123 = wasm_v128_load(w + 8);
159 v128_t vacc0123p1 = wasm_f32x4_mul(vi1x0123, vk1x0123);
160
161 const v128_t vi2x0123 = wasm_v128_load(i2);
162 const v128_t vk2x0123 = wasm_v128_load(w + 12);
163 vacc0123p0 = wasm_f32x4_add(vacc0123p0, wasm_f32x4_mul(vi2x0123, vk2x0123));
164
165 const v128_t vi3x0123 = wasm_v128_load(i3);
166 const v128_t vk3x0123 = wasm_v128_load(w + 16);
167 vacc0123p1 = wasm_f32x4_add(vacc0123p1, wasm_f32x4_mul(vi3x0123, vk3x0123));
168
169 const v128_t vi4x0123 = wasm_v128_load(i4);
170 const v128_t vk4x0123 = wasm_v128_load(w + 20);
171 vacc0123p0 = wasm_f32x4_add(vacc0123p0, wasm_f32x4_mul(vi4x0123, vk4x0123));
172
173 const v128_t vi5x0123 = wasm_v128_load(i5);
174 const v128_t vk5x0123 = wasm_v128_load(w + 24);
175 vacc0123p1 = wasm_f32x4_add(vacc0123p1, wasm_f32x4_mul(vi5x0123, vk5x0123));
176
177 const v128_t vi6x0123 = wasm_v128_load(i6);
178 const v128_t vk6x0123 = wasm_v128_load(w + 28);
179 vacc0123p0 = wasm_f32x4_add(vacc0123p0, wasm_f32x4_mul(vi6x0123, vk6x0123));
180
181 const v128_t vi7x0123 = wasm_v128_load(i7);
182 const v128_t vk7x0123 = wasm_v128_load(w + 32);
183 vacc0123p1 = wasm_f32x4_add(vacc0123p1, wasm_f32x4_mul(vi7x0123, vk7x0123));
184
185 const v128_t vi8x0123 = wasm_v128_load(i8);
186 const v128_t vk8x0123 = wasm_v128_load(w + 36);
187 vacc0123p0 = wasm_f32x4_add(vacc0123p0, wasm_f32x4_mul(vi8x0123, vk8x0123));
188
189 // Add up all accumulators to vacc0123p0
190 vacc0123p0 = wasm_f32x4_add(vacc0123p0, vacc0123p1);
191
192 v128_t vacc0123 = vacc0123p0;
193
194 if (c & 2) {
195 *((double*) output) = wasm_f64x2_extract_lane(vacc0123, 0);
196 vacc0123 = wasm_v32x4_shuffle(vacc0123, vacc0123, 2, 3, 2, 3);
197 output += 2;
198 }
199 if (c & 1) {
200 *output = wasm_f32x4_extract_lane(vacc0123, 0);
201 output += 1;
202 }
203 }
204
205 output = (float*) ((uintptr_t) output + output_increment);
206 } while (--output_width != 0);
207 }
208