1 // Auto-generated file. Do not edit!
2 // Template: src/f32-dwconv/up-avx.c.in
3 // Generator: tools/xngen
4 //
5 // Copyright 2019 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9
10 #include <assert.h>
11
12 #include <immintrin.h>
13
14 #include <xnnpack/dwconv.h>
15
16
xnn_f32_dwconv_minmax_ukernel_up16x4__fma3_acc2(size_t channels,size_t output_width,const float ** input,const float * weights,float * output,size_t input_stride,size_t output_increment,size_t input_offset,const float * zero,const union xnn_f32_minmax_params params[restrict XNN_MIN_ELEMENTS (1)])17 void xnn_f32_dwconv_minmax_ukernel_up16x4__fma3_acc2(
18 size_t channels,
19 size_t output_width,
20 const float** input,
21 const float* weights,
22 float* output,
23 size_t input_stride,
24 size_t output_increment,
25 size_t input_offset,
26 const float* zero,
27 const union xnn_f32_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
28 {
29 assert(channels != 0);
30 assert(output_width != 0);
31
32 const __m256 vmax = _mm256_load_ps(params->avx.max);
33 const __m256 vmin = _mm256_load_ps(params->avx.min);
34 do {
35 const float* i0 = input[0];
36 assert(i0 != NULL);
37 if XNN_UNPREDICTABLE(i0 != zero) {
38 i0 = (const float*) ((uintptr_t) i0 + input_offset);
39 }
40 const float* i1 = input[1];
41 assert(i1 != NULL);
42 if XNN_UNPREDICTABLE(i1 != zero) {
43 i1 = (const float*) ((uintptr_t) i1 + input_offset);
44 }
45 const float* i2 = input[2];
46 assert(i2 != NULL);
47 if XNN_UNPREDICTABLE(i2 != zero) {
48 i2 = (const float*) ((uintptr_t) i2 + input_offset);
49 }
50 const float* i3 = input[3];
51 assert(i3 != NULL);
52 if XNN_UNPREDICTABLE(i3 != zero) {
53 i3 = (const float*) ((uintptr_t) i3 + input_offset);
54 }
55 input = (const float**) ((uintptr_t) input + input_stride);
56
57 size_t c = channels;
58 const float* w = weights;
59 for (; c >= 16; c -= 16) {
60 __m256 vacc01234567p0 = _mm256_load_ps(w);
61 __m256 vacc89ABCDEFp0 = _mm256_load_ps(w + 8);
62
63
64 const __m256 vi0x01234567 = _mm256_loadu_ps(i0);
65 const __m256 vi0x89ABCDEF = _mm256_loadu_ps(i0 + 8);
66 i0 += 16;
67
68 const __m256 vk0x01234567 = _mm256_load_ps(w + 16);
69 const __m256 vk0x89ABCDEF = _mm256_load_ps(w + 24);
70 vacc01234567p0 = _mm256_fmadd_ps(vi0x01234567, vk0x01234567, vacc01234567p0);
71 vacc89ABCDEFp0 = _mm256_fmadd_ps(vi0x89ABCDEF, vk0x89ABCDEF, vacc89ABCDEFp0);
72
73 const __m256 vi1x01234567 = _mm256_loadu_ps(i1);
74 const __m256 vi1x89ABCDEF = _mm256_loadu_ps(i1 + 8);
75 i1 += 16;
76
77 const __m256 vk1x01234567 = _mm256_load_ps(w + 32);
78 const __m256 vk1x89ABCDEF = _mm256_load_ps(w + 40);
79 __m256 vacc01234567p1 = _mm256_mul_ps(vi1x01234567, vk1x01234567);
80 __m256 vacc89ABCDEFp1 = _mm256_mul_ps(vi1x89ABCDEF, vk1x89ABCDEF);
81
82 const __m256 vi2x01234567 = _mm256_loadu_ps(i2);
83 const __m256 vi2x89ABCDEF = _mm256_loadu_ps(i2 + 8);
84 i2 += 16;
85
86 const __m256 vk2x01234567 = _mm256_load_ps(w + 48);
87 const __m256 vk2x89ABCDEF = _mm256_load_ps(w + 56);
88 vacc01234567p0 = _mm256_fmadd_ps(vi2x01234567, vk2x01234567, vacc01234567p0);
89 vacc89ABCDEFp0 = _mm256_fmadd_ps(vi2x89ABCDEF, vk2x89ABCDEF, vacc89ABCDEFp0);
90
91 const __m256 vi3x01234567 = _mm256_loadu_ps(i3);
92 const __m256 vi3x89ABCDEF = _mm256_loadu_ps(i3 + 8);
93 i3 += 16;
94
95 const __m256 vk3x01234567 = _mm256_load_ps(w + 64);
96 const __m256 vk3x89ABCDEF = _mm256_load_ps(w + 72);
97 vacc01234567p1 = _mm256_fmadd_ps(vi3x01234567, vk3x01234567, vacc01234567p1);
98 vacc89ABCDEFp1 = _mm256_fmadd_ps(vi3x89ABCDEF, vk3x89ABCDEF, vacc89ABCDEFp1);
99
100 w += 80;
101
102 // Add up all accumulators to vacc0123456789ABCDEFp0
103 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, vacc01234567p1);
104 vacc89ABCDEFp0 = _mm256_add_ps(vacc89ABCDEFp0, vacc89ABCDEFp1);
105
106 __m256 vacc01234567 = _mm256_max_ps(vacc01234567p0, vmin);
107 __m256 vacc89ABCDEF = _mm256_max_ps(vacc89ABCDEFp0, vmin);
108 vacc01234567 = _mm256_min_ps(vacc01234567, vmax);
109 vacc89ABCDEF = _mm256_min_ps(vacc89ABCDEF, vmax);
110
111 _mm256_storeu_ps(output, vacc01234567);
112 _mm256_storeu_ps(output + 8, vacc89ABCDEF);
113 output += 16;
114 }
115 for (; c >= 8; c -= 8) {
116 __m256 vacc01234567p0 = _mm256_load_ps(w);
117
118 const __m256 vi0x01234567 = _mm256_loadu_ps(i0);
119 i0 += 8;
120
121 const __m256 vk0x01234567 = _mm256_load_ps(w + 16);
122 vacc01234567p0 = _mm256_fmadd_ps(vi0x01234567, vk0x01234567, vacc01234567p0);
123
124 const __m256 vi1x01234567 = _mm256_loadu_ps(i1);
125 i1 += 8;
126
127 const __m256 vk1x01234567 = _mm256_load_ps(w + 32);
128 __m256 vacc01234567p1 = _mm256_mul_ps(vi1x01234567, vk1x01234567);
129
130 const __m256 vi2x01234567 = _mm256_loadu_ps(i2);
131 i2 += 8;
132
133 const __m256 vk2x01234567 = _mm256_load_ps(w + 48);
134 vacc01234567p0 = _mm256_fmadd_ps(vi2x01234567, vk2x01234567, vacc01234567p0);
135
136 const __m256 vi3x01234567 = _mm256_loadu_ps(i3);
137 i3 += 8;
138
139 const __m256 vk3x01234567 = _mm256_load_ps(w + 64);
140 vacc01234567p1 = _mm256_fmadd_ps(vi3x01234567, vk3x01234567, vacc01234567p1);
141
142 w += 8;
143
144 // Add up all accumulators to vacc01234567p0
145 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, vacc01234567p1);
146
147 __m256 vacc01234567 = _mm256_max_ps(vacc01234567p0, vmin);
148 vacc01234567 = _mm256_min_ps(vacc01234567, vmax);
149
150 _mm256_storeu_ps(output, vacc01234567);
151 output += 8;
152 }
153 if XNN_UNLIKELY(c != 0) {
154 assert(c >= 1);
155 assert(c <= 7);
156 const __m256i vmask = _mm256_loadu_si256((const __m256i*) ¶ms->avx.mask_table[7 - c]);
157
158 __m256 vacc01234567p0 = _mm256_load_ps(w);
159
160 const __m256 vi0x01234567 = _mm256_maskload_ps(i0, vmask);
161 const __m256 vk0x01234567 = _mm256_load_ps(w + 16);
162 vacc01234567p0 = _mm256_fmadd_ps(vi0x01234567, vk0x01234567, vacc01234567p0);
163
164 const __m256 vi1x01234567 = _mm256_maskload_ps(i1, vmask);
165 const __m256 vk1x01234567 = _mm256_load_ps(w + 32);
166 __m256 vacc01234567p1 = _mm256_mul_ps(vi1x01234567, vk1x01234567);
167
168 const __m256 vi2x01234567 = _mm256_maskload_ps(i2, vmask);
169 const __m256 vk2x01234567 = _mm256_load_ps(w + 48);
170 vacc01234567p0 = _mm256_fmadd_ps(vi2x01234567, vk2x01234567, vacc01234567p0);
171
172 const __m256 vi3x01234567 = _mm256_maskload_ps(i3, vmask);
173 const __m256 vk3x01234567 = _mm256_load_ps(w + 64);
174 vacc01234567p1 = _mm256_fmadd_ps(vi3x01234567, vk3x01234567, vacc01234567p1);
175
176 // Add up all accumulators to vacc01234567p0
177 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, vacc01234567p1);
178
179 __m256 vacc01234567 = _mm256_max_ps(vacc01234567p0, vmin);
180 vacc01234567 = _mm256_min_ps(vacc01234567, vmax);
181
182 __m128 vacc0123 = _mm256_castps256_ps128(vacc01234567);
183 if (c & 4) {
184 _mm_storeu_ps(output, vacc0123);
185 vacc0123 = _mm256_extractf128_ps(vacc01234567, 1);
186 output += 4;
187 }
188 if (c & 2) {
189 _mm_storel_pi((__m64*) output, vacc0123);
190 vacc0123 = _mm_movehl_ps(vacc0123, vacc0123);
191 output += 2;
192 }
193 if (c & 1) {
194 _mm_store_ss(output, vacc0123);
195 output += 1;
196 }
197 }
198
199 output = (float*) ((uintptr_t) output + output_increment);
200 } while (--output_width != 0);
201 }
202