xref: /aosp_15_r20/external/XNNPACK/src/f32-dwconv/gen/up16x4-minmax-avx.c (revision 4bdc94577ba0e567308109d787f7fec7b531ce36) 
1 // Auto-generated file. Do not edit!
2 //   Template: src/f32-dwconv/up-avx.c.in
3 //   Generator: tools/xngen
4 //
5 // Copyright 2019 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9 
10 #include <assert.h>
11 
12 #include <immintrin.h>
13 
14 #include <xnnpack/dwconv.h>
15 
16 
xnn_f32_dwconv_minmax_ukernel_up16x4__avx(size_t channels,size_t output_width,const float ** input,const float * weights,float * output,size_t input_stride,size_t output_increment,size_t input_offset,const float * zero,const union xnn_f32_minmax_params params[restrict XNN_MIN_ELEMENTS (1)])17 void xnn_f32_dwconv_minmax_ukernel_up16x4__avx(
18     size_t channels,
19     size_t output_width,
20     const float** input,
21     const float* weights,
22     float* output,
23     size_t input_stride,
24     size_t output_increment,
25     size_t input_offset,
26     const float* zero,
27     const union xnn_f32_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
28 {
29   assert(channels != 0);
30   assert(output_width != 0);
31 
32   const __m256 vmax = _mm256_load_ps(params->avx.max);
33   const __m256 vmin = _mm256_load_ps(params->avx.min);
34   do {
35     const float* i0 = input[0];
36     assert(i0 != NULL);
37     if XNN_UNPREDICTABLE(i0 != zero) {
38       i0 = (const float*) ((uintptr_t) i0 + input_offset);
39     }
40     const float* i1 = input[1];
41     assert(i1 != NULL);
42     if XNN_UNPREDICTABLE(i1 != zero) {
43       i1 = (const float*) ((uintptr_t) i1 + input_offset);
44     }
45     const float* i2 = input[2];
46     assert(i2 != NULL);
47     if XNN_UNPREDICTABLE(i2 != zero) {
48       i2 = (const float*) ((uintptr_t) i2 + input_offset);
49     }
50     const float* i3 = input[3];
51     assert(i3 != NULL);
52     if XNN_UNPREDICTABLE(i3 != zero) {
53       i3 = (const float*) ((uintptr_t) i3 + input_offset);
54     }
55     input = (const float**) ((uintptr_t) input + input_stride);
56 
57     size_t c = channels;
58     const float* w = weights;
59     for (; c >= 16; c -= 16) {
60       __m256 vacc01234567p0 = _mm256_load_ps(w);
61       __m256 vacc89ABCDEFp0 = _mm256_load_ps(w + 8);
62 
63 
64       const __m256 vi0x01234567 = _mm256_loadu_ps(i0);
65       const __m256 vi0x89ABCDEF = _mm256_loadu_ps(i0 + 8);
66       i0 += 16;
67 
68       const __m256 vk0x01234567 = _mm256_load_ps(w + 16);
69       const __m256 vk0x89ABCDEF = _mm256_load_ps(w + 24);
70       vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi0x01234567, vk0x01234567));
71       vacc89ABCDEFp0 = _mm256_add_ps(vacc89ABCDEFp0, _mm256_mul_ps(vi0x89ABCDEF, vk0x89ABCDEF));
72 
73       const __m256 vi1x01234567 = _mm256_loadu_ps(i1);
74       const __m256 vi1x89ABCDEF = _mm256_loadu_ps(i1 + 8);
75       i1 += 16;
76 
77       const __m256 vk1x01234567 = _mm256_load_ps(w + 32);
78       const __m256 vk1x89ABCDEF = _mm256_load_ps(w + 40);
79       vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi1x01234567, vk1x01234567));
80       vacc89ABCDEFp0 = _mm256_add_ps(vacc89ABCDEFp0, _mm256_mul_ps(vi1x89ABCDEF, vk1x89ABCDEF));
81 
82       const __m256 vi2x01234567 = _mm256_loadu_ps(i2);
83       const __m256 vi2x89ABCDEF = _mm256_loadu_ps(i2 + 8);
84       i2 += 16;
85 
86       const __m256 vk2x01234567 = _mm256_load_ps(w + 48);
87       const __m256 vk2x89ABCDEF = _mm256_load_ps(w + 56);
88       vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi2x01234567, vk2x01234567));
89       vacc89ABCDEFp0 = _mm256_add_ps(vacc89ABCDEFp0, _mm256_mul_ps(vi2x89ABCDEF, vk2x89ABCDEF));
90 
91       const __m256 vi3x01234567 = _mm256_loadu_ps(i3);
92       const __m256 vi3x89ABCDEF = _mm256_loadu_ps(i3 + 8);
93       i3 += 16;
94 
95       const __m256 vk3x01234567 = _mm256_load_ps(w + 64);
96       const __m256 vk3x89ABCDEF = _mm256_load_ps(w + 72);
97       vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi3x01234567, vk3x01234567));
98       vacc89ABCDEFp0 = _mm256_add_ps(vacc89ABCDEFp0, _mm256_mul_ps(vi3x89ABCDEF, vk3x89ABCDEF));
99 
100       w += 80;
101 
102 
103       __m256 vacc01234567 = _mm256_max_ps(vacc01234567p0, vmin);
104       __m256 vacc89ABCDEF = _mm256_max_ps(vacc89ABCDEFp0, vmin);
105       vacc01234567 = _mm256_min_ps(vacc01234567, vmax);
106       vacc89ABCDEF = _mm256_min_ps(vacc89ABCDEF, vmax);
107 
108       _mm256_storeu_ps(output, vacc01234567);
109       _mm256_storeu_ps(output + 8, vacc89ABCDEF);
110       output += 16;
111     }
112     for (; c >= 8; c -= 8) {
113       __m256 vacc01234567p0 = _mm256_load_ps(w);
114 
115       const __m256 vi0x01234567 = _mm256_loadu_ps(i0);
116       i0 += 8;
117 
118       const __m256 vk0x01234567 = _mm256_load_ps(w + 16);
119       vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi0x01234567, vk0x01234567));
120 
121       const __m256 vi1x01234567 = _mm256_loadu_ps(i1);
122       i1 += 8;
123 
124       const __m256 vk1x01234567 = _mm256_load_ps(w + 32);
125       vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi1x01234567, vk1x01234567));
126 
127       const __m256 vi2x01234567 = _mm256_loadu_ps(i2);
128       i2 += 8;
129 
130       const __m256 vk2x01234567 = _mm256_load_ps(w + 48);
131       vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi2x01234567, vk2x01234567));
132 
133       const __m256 vi3x01234567 = _mm256_loadu_ps(i3);
134       i3 += 8;
135 
136       const __m256 vk3x01234567 = _mm256_load_ps(w + 64);
137       vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi3x01234567, vk3x01234567));
138 
139       w += 8;
140 
141 
142       __m256 vacc01234567 = _mm256_max_ps(vacc01234567p0, vmin);
143       vacc01234567 = _mm256_min_ps(vacc01234567, vmax);
144 
145       _mm256_storeu_ps(output, vacc01234567);
146       output += 8;
147     }
148     if XNN_UNLIKELY(c != 0) {
149       assert(c >= 1);
150       assert(c <= 7);
151       const __m256i vmask = _mm256_loadu_si256((const __m256i*) &params->avx.mask_table[7 - c]);
152 
153       __m256 vacc01234567p0 = _mm256_load_ps(w);
154 
155       const __m256 vi0x01234567 = _mm256_maskload_ps(i0, vmask);
156       const __m256 vk0x01234567 = _mm256_load_ps(w + 16);
157       vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi0x01234567, vk0x01234567));
158 
159       const __m256 vi1x01234567 = _mm256_maskload_ps(i1, vmask);
160       const __m256 vk1x01234567 = _mm256_load_ps(w + 32);
161       vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi1x01234567, vk1x01234567));
162 
163       const __m256 vi2x01234567 = _mm256_maskload_ps(i2, vmask);
164       const __m256 vk2x01234567 = _mm256_load_ps(w + 48);
165       vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi2x01234567, vk2x01234567));
166 
167       const __m256 vi3x01234567 = _mm256_maskload_ps(i3, vmask);
168       const __m256 vk3x01234567 = _mm256_load_ps(w + 64);
169       vacc01234567p0 = _mm256_add_ps(vacc01234567p0, _mm256_mul_ps(vi3x01234567, vk3x01234567));
170 
171 
172       __m256 vacc01234567 = _mm256_max_ps(vacc01234567p0, vmin);
173       vacc01234567 = _mm256_min_ps(vacc01234567, vmax);
174 
175       __m128 vacc0123 = _mm256_castps256_ps128(vacc01234567);
176       if (c & 4) {
177         _mm_storeu_ps(output, vacc0123);
178         vacc0123 = _mm256_extractf128_ps(vacc01234567, 1);
179         output += 4;
180       }
181       if (c & 2) {
182         _mm_storel_pi((__m64*) output, vacc0123);
183         vacc0123 = _mm_movehl_ps(vacc0123, vacc0123);
184         output += 2;
185       }
186       if (c & 1) {
187         _mm_store_ss(output, vacc0123);
188         output += 1;
189       }
190     }
191 
192     output = (float*) ((uintptr_t) output + output_increment);
193   } while (--output_width != 0);
194 }
195