xref: /aosp_15_r20/external/XNNPACK/src/f32-dwconv/gen/up16x3-minmax-neon-acc2.c (revision 4bdc94577ba0e567308109d787f7fec7b531ce36)
1 // Auto-generated file. Do not edit!
2 //   Template: src/f32-dwconv/up-neon.c.in
3 //   Generator: tools/xngen
4 //
5 // Copyright 2019 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9 
10 #include <assert.h>
11 
12 #include <arm_neon.h>
13 
14 #include <xnnpack/dwconv.h>
15 
16 
xnn_f32_dwconv_minmax_ukernel_up16x3__neon_acc2(size_t channels,size_t output_width,const float ** input,const float * weights,float * output,size_t input_stride,size_t output_increment,size_t input_offset,const float * zero,const union xnn_f32_minmax_params params[restrict XNN_MIN_ELEMENTS (1)])17 void xnn_f32_dwconv_minmax_ukernel_up16x3__neon_acc2(
18     size_t channels,
19     size_t output_width,
20     const float** input,
21     const float* weights,
22     float* output,
23     size_t input_stride,
24     size_t output_increment,
25     size_t input_offset,
26     const float* zero,
27     const union xnn_f32_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
28 {
29   assert(channels != 0);
30   assert(output_width != 0);
31 
32   const float32x4_t vmax = vld1q_dup_f32(&params->scalar.max);
33   const float32x4_t vmin = vld1q_dup_f32(&params->scalar.min);
34   do {
35     const float* i0 = input[0];
36     assert(i0 != NULL);
37     if XNN_UNPREDICTABLE(i0 != zero) {
38       i0 = (const float*) ((uintptr_t) i0 + input_offset);
39     }
40     const float* i1 = input[1];
41     assert(i1 != NULL);
42     if XNN_UNPREDICTABLE(i1 != zero) {
43       i1 = (const float*) ((uintptr_t) i1 + input_offset);
44     }
45     const float* i2 = input[2];
46     assert(i2 != NULL);
47     if XNN_UNPREDICTABLE(i2 != zero) {
48       i2 = (const float*) ((uintptr_t) i2 + input_offset);
49     }
50 
51     input = (const float**) ((uintptr_t) input + input_stride);
52 
53     size_t c = channels;
54     const float* w = weights;
55     for (; c >= 16; c -= 16) {
56       float32x4_t vacc0123p0 = vld1q_f32(w); w += 4;
57       float32x4_t vacc4567p0 = vld1q_f32(w); w += 4;
58       float32x4_t vacc89ABp0 = vld1q_f32(w); w += 4;
59       float32x4_t vaccCDEFp0 = vld1q_f32(w); w += 4;
60 
61 
62       const float32x4_t vi0x0123 = vld1q_f32(i0); i0 += 4;
63       const float32x4_t vi0x4567 = vld1q_f32(i0); i0 += 4;
64       const float32x4_t vi0x89AB = vld1q_f32(i0); i0 += 4;
65       const float32x4_t vi0xCDEF = vld1q_f32(i0); i0 += 4;
66       const float32x4_t vk0x0123 = vld1q_f32(w); w += 4;
67       const float32x4_t vk0x4567 = vld1q_f32(w); w += 4;
68       const float32x4_t vk0x89AB = vld1q_f32(w); w += 4;
69       const float32x4_t vk0xCDEF = vld1q_f32(w); w += 4;
70       vacc0123p0 = vmlaq_f32(vacc0123p0, vi0x0123, vk0x0123);
71       vacc4567p0 = vmlaq_f32(vacc4567p0, vi0x4567, vk0x4567);
72       vacc89ABp0 = vmlaq_f32(vacc89ABp0, vi0x89AB, vk0x89AB);
73       vaccCDEFp0 = vmlaq_f32(vaccCDEFp0, vi0xCDEF, vk0xCDEF);
74 
75       const float32x4_t vi1x0123 = vld1q_f32(i1); i1 += 4;
76       const float32x4_t vi1x4567 = vld1q_f32(i1); i1 += 4;
77       const float32x4_t vi1x89AB = vld1q_f32(i1); i1 += 4;
78       const float32x4_t vi1xCDEF = vld1q_f32(i1); i1 += 4;
79       const float32x4_t vk1x0123 = vld1q_f32(w); w += 4;
80       const float32x4_t vk1x4567 = vld1q_f32(w); w += 4;
81       const float32x4_t vk1x89AB = vld1q_f32(w); w += 4;
82       const float32x4_t vk1xCDEF = vld1q_f32(w); w += 4;
83       float32x4_t vacc0123p1 = vmulq_f32(vi1x0123, vk1x0123);
84       float32x4_t vacc4567p1 = vmulq_f32(vi1x4567, vk1x4567);
85       float32x4_t vacc89ABp1 = vmulq_f32(vi1x89AB, vk1x89AB);
86       float32x4_t vaccCDEFp1 = vmulq_f32(vi1xCDEF, vk1xCDEF);
87 
88       const float32x4_t vi2x0123 = vld1q_f32(i2); i2 += 4;
89       const float32x4_t vi2x4567 = vld1q_f32(i2); i2 += 4;
90       const float32x4_t vi2x89AB = vld1q_f32(i2); i2 += 4;
91       const float32x4_t vi2xCDEF = vld1q_f32(i2); i2 += 4;
92       const float32x4_t vk2x0123 = vld1q_f32(w); w += 4;
93       const float32x4_t vk2x4567 = vld1q_f32(w); w += 4;
94       const float32x4_t vk2x89AB = vld1q_f32(w); w += 4;
95       const float32x4_t vk2xCDEF = vld1q_f32(w); w += 4;
96       vacc0123p0 = vmlaq_f32(vacc0123p0, vi2x0123, vk2x0123);
97       vacc4567p0 = vmlaq_f32(vacc4567p0, vi2x4567, vk2x4567);
98       vacc89ABp0 = vmlaq_f32(vacc89ABp0, vi2x89AB, vk2x89AB);
99       vaccCDEFp0 = vmlaq_f32(vaccCDEFp0, vi2xCDEF, vk2xCDEF);
100 
101       // Add up all accumulators to vacc0123456789ABCDEFp0
102       vacc0123p0 = vaddq_f32(vacc0123p0, vacc0123p1);
103       vacc4567p0 = vaddq_f32(vacc4567p0, vacc4567p1);
104       vacc89ABp0 = vaddq_f32(vacc89ABp0, vacc89ABp1);
105       vaccCDEFp0 = vaddq_f32(vaccCDEFp0, vaccCDEFp1);
106 
107       float32x4_t vacc0123 = vmaxq_f32(vacc0123p0, vmin);
108       float32x4_t vacc4567 = vmaxq_f32(vacc4567p0, vmin);
109       float32x4_t vacc89AB = vmaxq_f32(vacc89ABp0, vmin);
110       float32x4_t vaccCDEF = vmaxq_f32(vaccCDEFp0, vmin);
111       vacc0123 = vminq_f32(vacc0123, vmax);
112       vacc4567 = vminq_f32(vacc4567, vmax);
113       vacc89AB = vminq_f32(vacc89AB, vmax);
114       vaccCDEF = vminq_f32(vaccCDEF, vmax);
115 
116       vst1q_f32(output, vacc0123); output += 4;
117       vst1q_f32(output, vacc4567); output += 4;
118       vst1q_f32(output, vacc89AB); output += 4;
119       vst1q_f32(output, vaccCDEF); output += 4;
120     }
121     for (; c >= 4; c -= 4) {
122       float32x4_t vacc0123p0 = vld1q_f32(w); w += 4;
123 
124 
125       const float32x4_t vi0x0123 = vld1q_f32(i0); i0 += 4;
126       const float32x4_t vk0x0123 = vld1q_f32(w + 12);
127       vacc0123p0 = vmlaq_f32(vacc0123p0, vi0x0123, vk0x0123);
128 
129       const float32x4_t vi1x0123 = vld1q_f32(i1); i1 += 4;
130       const float32x4_t vk1x0123 = vld1q_f32(w + 28);
131       float32x4_t vacc0123p1 = vmulq_f32(vi1x0123, vk1x0123);
132 
133       const float32x4_t vi2x0123 = vld1q_f32(i2); i2 += 4;
134       const float32x4_t vk2x0123 = vld1q_f32(w + 44);
135       vacc0123p0 = vmlaq_f32(vacc0123p0, vi2x0123, vk2x0123);
136 
137       // Add up all accumulators to vacc0123p0
138       vacc0123p0 = vaddq_f32(vacc0123p0, vacc0123p1);
139 
140       float32x4_t vacc0123 = vmaxq_f32(vacc0123p0, vmin);
141       vacc0123 = vminq_f32(vacc0123, vmax);
142 
143       vst1q_f32(output, vacc0123); output += 4;
144     }
145     if XNN_UNLIKELY(c != 0) {
146       float32x4_t vacc0123p0 = vld1q_f32(w);
147 
148 
149       const float32x4_t vi0x0123 = vld1q_f32(i0);
150       const float32x4_t vk0x0123 = vld1q_f32(w + 16);
151       vacc0123p0 = vmlaq_f32(vacc0123p0, vi0x0123, vk0x0123);
152 
153       const float32x4_t vi1x0123 = vld1q_f32(i1);
154       const float32x4_t vk1x0123 = vld1q_f32(w + 32);
155       float32x4_t vacc0123p1 = vmulq_f32(vi1x0123, vk1x0123);
156 
157       const float32x4_t vi2x0123 = vld1q_f32(i2);
158       const float32x4_t vk2x0123 = vld1q_f32(w + 48);
159       vacc0123p0 = vmlaq_f32(vacc0123p0, vi2x0123, vk2x0123);
160 
161       // Add up all accumulators to vacc0123p0
162       vacc0123p0 = vaddq_f32(vacc0123p0, vacc0123p1);
163 
164       float32x4_t vacc0123 = vmaxq_f32(vacc0123p0, vmin);
165       vacc0123 = vminq_f32(vacc0123, vmax);
166 
167       float32x2_t vacc01 = vget_low_f32(vacc0123);
168       if (c & 2) {
169         vst1_f32(output, vacc01); output += 2;
170         vacc01 = vget_high_f32(vacc0123);
171       }
172       if (c & 1) {
173         vst1_lane_f32(output, vacc01, 0); output += 1;
174       }
175     }
176 
177     output = (float*) ((uintptr_t) output + output_increment);
178   } while (--output_width != 0);
179 }
180