1 // Auto-generated file. Do not edit!
2 // Template: src/f16-vsigmoid/avx2.c.in
3 // Generator: tools/xngen
4 //
5 // Copyright 2022 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9
10 #include <assert.h>
11
12 #include <immintrin.h>
13
14 #include <xnnpack/common.h>
15 #include <xnnpack/intrinsics-polyfill.h>
16 #include <xnnpack/vunary.h>
17
18
xnn_f16_vsigmoid_ukernel__avx2_rr1_p2_rcp_x48(size_t batch,const void * input,void * output,const union xnn_f16_sigmoid_params params[restrict XNN_MIN_ELEMENTS (1)])19 void xnn_f16_vsigmoid_ukernel__avx2_rr1_p2_rcp_x48(
20 size_t batch,
21 const void* input,
22 void* output,
23 const union xnn_f16_sigmoid_params params[restrict XNN_MIN_ELEMENTS(1)])
24 {
25 assert(batch % sizeof(uint16_t) == 0);
26
27 const __m256 vsign_mask = _mm256_load_ps(params->avx2_rr1_p2.sign_mask);
28 const __m256 vmagic_bias = _mm256_load_ps(params->avx2_rr1_p2.magic_bias);
29 const __m256 vlog2e = _mm256_load_ps(params->avx2_rr1_p2.log2e);
30 const __m256 vminus_ln2 = _mm256_load_ps(params->avx2_rr1_p2.minus_ln2);
31 const __m256 vc2 = _mm256_load_ps(params->avx2_rr1_p2.c2);
32 const __m256 vc1 = _mm256_load_ps(params->avx2_rr1_p2.c1);
33 const __m256 vone = _mm256_load_ps(params->avx2_rr1_p2.one);
34 const __m256 vdenorm_cutoff = _mm256_load_ps(params->avx2_rr1_p2.denorm_cutoff);
35
36 const uint16_t* i = (const uint16_t*) input;
37 uint16_t* o = (uint16_t*) output;
38 for (; batch >= 48 * sizeof(uint16_t); batch -= 48 * sizeof(uint16_t)) {
39 const __m256 vx0 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) i));
40 const __m256 vx1 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) (i + 8)));
41 const __m256 vx2 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) (i + 16)));
42 const __m256 vx3 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) (i + 24)));
43 const __m256 vx4 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) (i + 32)));
44 const __m256 vx5 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) (i + 40)));
45 i += 48;
46
47 const __m256 vz0 = _mm256_or_ps(vx0, vsign_mask);
48 const __m256 vz1 = _mm256_or_ps(vx1, vsign_mask);
49 const __m256 vz2 = _mm256_or_ps(vx2, vsign_mask);
50 const __m256 vz3 = _mm256_or_ps(vx3, vsign_mask);
51 const __m256 vz4 = _mm256_or_ps(vx4, vsign_mask);
52 const __m256 vz5 = _mm256_or_ps(vx5, vsign_mask);
53
54 __m256 vn0 = _mm256_fmadd_ps(vz0, vlog2e, vmagic_bias);
55 __m256 vn1 = _mm256_fmadd_ps(vz1, vlog2e, vmagic_bias);
56 __m256 vn2 = _mm256_fmadd_ps(vz2, vlog2e, vmagic_bias);
57 __m256 vn3 = _mm256_fmadd_ps(vz3, vlog2e, vmagic_bias);
58 __m256 vn4 = _mm256_fmadd_ps(vz4, vlog2e, vmagic_bias);
59 __m256 vn5 = _mm256_fmadd_ps(vz5, vlog2e, vmagic_bias);
60
61 const __m256 vs0 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn0), 23));
62 const __m256 vs1 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn1), 23));
63 const __m256 vs2 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn2), 23));
64 const __m256 vs3 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn3), 23));
65 const __m256 vs4 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn4), 23));
66 const __m256 vs5 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn5), 23));
67
68 vn0 = _mm256_sub_ps(vn0, vmagic_bias);
69 vn1 = _mm256_sub_ps(vn1, vmagic_bias);
70 vn2 = _mm256_sub_ps(vn2, vmagic_bias);
71 vn3 = _mm256_sub_ps(vn3, vmagic_bias);
72 vn4 = _mm256_sub_ps(vn4, vmagic_bias);
73 vn5 = _mm256_sub_ps(vn5, vmagic_bias);
74
75 __m256 vt0 = _mm256_fmadd_ps(vn0, vminus_ln2, vz0);
76 __m256 vt1 = _mm256_fmadd_ps(vn1, vminus_ln2, vz1);
77 __m256 vt2 = _mm256_fmadd_ps(vn2, vminus_ln2, vz2);
78 __m256 vt3 = _mm256_fmadd_ps(vn3, vminus_ln2, vz3);
79 __m256 vt4 = _mm256_fmadd_ps(vn4, vminus_ln2, vz4);
80 __m256 vt5 = _mm256_fmadd_ps(vn5, vminus_ln2, vz5);
81
82 const __m256 vp0 = _mm256_fmadd_ps(vc2, vt0, vc1);
83 const __m256 vp1 = _mm256_fmadd_ps(vc2, vt1, vc1);
84 const __m256 vp2 = _mm256_fmadd_ps(vc2, vt2, vc1);
85 const __m256 vp3 = _mm256_fmadd_ps(vc2, vt3, vc1);
86 const __m256 vp4 = _mm256_fmadd_ps(vc2, vt4, vc1);
87 const __m256 vp5 = _mm256_fmadd_ps(vc2, vt5, vc1);
88
89 vt0 = _mm256_mul_ps(vt0, vs0);
90 vt1 = _mm256_mul_ps(vt1, vs1);
91 vt2 = _mm256_mul_ps(vt2, vs2);
92 vt3 = _mm256_mul_ps(vt3, vs3);
93 vt4 = _mm256_mul_ps(vt4, vs4);
94 vt5 = _mm256_mul_ps(vt5, vs5);
95
96 const __m256 ve0 = _mm256_fmadd_ps(vt0, vp0, vs0);
97 const __m256 ve1 = _mm256_fmadd_ps(vt1, vp1, vs1);
98 const __m256 ve2 = _mm256_fmadd_ps(vt2, vp2, vs2);
99 const __m256 ve3 = _mm256_fmadd_ps(vt3, vp3, vs3);
100 const __m256 ve4 = _mm256_fmadd_ps(vt4, vp4, vs4);
101 const __m256 ve5 = _mm256_fmadd_ps(vt5, vp5, vs5);
102
103 const __m256 vd0 = _mm256_add_ps(ve0, vone);
104 const __m256 vd1 = _mm256_add_ps(ve1, vone);
105 const __m256 vd2 = _mm256_add_ps(ve2, vone);
106 const __m256 vd3 = _mm256_add_ps(ve3, vone);
107 const __m256 vd4 = _mm256_add_ps(ve4, vone);
108 const __m256 vd5 = _mm256_add_ps(ve5, vone);
109
110 const __m256 vr0 = _mm256_rcp_ps(vd0);
111 const __m256 vr1 = _mm256_rcp_ps(vd1);
112 const __m256 vr2 = _mm256_rcp_ps(vd2);
113 const __m256 vr3 = _mm256_rcp_ps(vd3);
114 const __m256 vr4 = _mm256_rcp_ps(vd4);
115 const __m256 vr5 = _mm256_rcp_ps(vd5);
116
117 __m256 vf0 = _mm256_mul_ps(ve0, vr0);
118 __m256 vf1 = _mm256_mul_ps(ve1, vr1);
119 __m256 vf2 = _mm256_mul_ps(ve2, vr2);
120 __m256 vf3 = _mm256_mul_ps(ve3, vr3);
121 __m256 vf4 = _mm256_mul_ps(ve4, vr4);
122 __m256 vf5 = _mm256_mul_ps(ve5, vr5);
123
124 vf0 = _mm256_andnot_ps(_mm256_cmp_ps(vz0, vdenorm_cutoff, _CMP_LT_OS), vf0);
125 vf1 = _mm256_andnot_ps(_mm256_cmp_ps(vz1, vdenorm_cutoff, _CMP_LT_OS), vf1);
126 vf2 = _mm256_andnot_ps(_mm256_cmp_ps(vz2, vdenorm_cutoff, _CMP_LT_OS), vf2);
127 vf3 = _mm256_andnot_ps(_mm256_cmp_ps(vz3, vdenorm_cutoff, _CMP_LT_OS), vf3);
128 vf4 = _mm256_andnot_ps(_mm256_cmp_ps(vz4, vdenorm_cutoff, _CMP_LT_OS), vf4);
129 vf5 = _mm256_andnot_ps(_mm256_cmp_ps(vz5, vdenorm_cutoff, _CMP_LT_OS), vf5);
130
131 vf0 = _mm256_blendv_ps(_mm256_sub_ps(vone, vf0), vf0, vx0);
132 vf1 = _mm256_blendv_ps(_mm256_sub_ps(vone, vf1), vf1, vx1);
133 vf2 = _mm256_blendv_ps(_mm256_sub_ps(vone, vf2), vf2, vx2);
134 vf3 = _mm256_blendv_ps(_mm256_sub_ps(vone, vf3), vf3, vx3);
135 vf4 = _mm256_blendv_ps(_mm256_sub_ps(vone, vf4), vf4, vx4);
136 vf5 = _mm256_blendv_ps(_mm256_sub_ps(vone, vf5), vf5, vx5);
137
138 _mm_storeu_si128((__m128i*) o, _mm256_cvtps_ph(vf0, _MM_FROUND_NO_EXC));
139 _mm_storeu_si128((__m128i*) (o + 8), _mm256_cvtps_ph(vf1, _MM_FROUND_NO_EXC));
140 _mm_storeu_si128((__m128i*) (o + 16), _mm256_cvtps_ph(vf2, _MM_FROUND_NO_EXC));
141 _mm_storeu_si128((__m128i*) (o + 24), _mm256_cvtps_ph(vf3, _MM_FROUND_NO_EXC));
142 _mm_storeu_si128((__m128i*) (o + 32), _mm256_cvtps_ph(vf4, _MM_FROUND_NO_EXC));
143 _mm_storeu_si128((__m128i*) (o + 40), _mm256_cvtps_ph(vf5, _MM_FROUND_NO_EXC));
144 o += 48;
145 }
146 for (; batch >= 8 * sizeof(uint16_t); batch -= 8 * sizeof(uint16_t)) {
147 const __m256 vx = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) i));
148 i += 8;
149
150 const __m256 vz = _mm256_or_ps(vx, vsign_mask);
151
152 __m256 vn = _mm256_fmadd_ps(vz, vlog2e, vmagic_bias);
153 const __m256 vs = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn), 23));
154 vn = _mm256_sub_ps(vn, vmagic_bias);
155
156 __m256 vt = _mm256_fmadd_ps(vn, vminus_ln2, vz);
157
158 const __m256 vp = _mm256_fmadd_ps(vc2, vt, vc1);
159 vt = _mm256_mul_ps(vt, vs);
160 const __m256 ve = _mm256_fmadd_ps(vt, vp, vs);
161
162 const __m256 vd = _mm256_add_ps(ve, vone);
163 const __m256 vr = _mm256_rcp_ps(vd);
164 __m256 vf = _mm256_mul_ps(ve, vr);
165
166 vf = _mm256_andnot_ps(_mm256_cmp_ps(vz, vdenorm_cutoff, _CMP_LT_OS), vf);
167 vf = _mm256_blendv_ps(_mm256_sub_ps(vone, vf), vf, vx);
168
169 _mm_storeu_si128((__m128i*) o, _mm256_cvtps_ph(vf, _MM_FROUND_NO_EXC));
170 o += 8;
171 }
172 if XNN_UNLIKELY(batch != 0) {
173 assert(batch >= 1 * sizeof(uint16_t));
174 assert(batch <= 7 * sizeof(uint16_t));
175 const __m256 vx = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) i));
176
177 const __m256 vz = _mm256_or_ps(vx, vsign_mask);
178
179 __m256 vn = _mm256_fmadd_ps(vz, vlog2e, vmagic_bias);
180 const __m256 vs = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn), 23));
181 vn = _mm256_sub_ps(vn, vmagic_bias);
182
183 __m256 vt = _mm256_fmadd_ps(vn, vminus_ln2, vz);
184
185 const __m256 vp = _mm256_fmadd_ps(vc2, vt, vc1);
186 vt = _mm256_mul_ps(vt, vs);
187 const __m256 ve = _mm256_fmadd_ps(vt, vp, vs);
188
189 const __m256 vd = _mm256_add_ps(ve, vone);
190 const __m256 vr = _mm256_rcp_ps(vd);
191 __m256 vf = _mm256_mul_ps(ve, vr);
192
193 vf = _mm256_andnot_ps(_mm256_cmp_ps(vz, vdenorm_cutoff, _CMP_LT_OS), vf);
194 vf = _mm256_blendv_ps(_mm256_sub_ps(vone, vf), vf, vx);
195
196 __m128i vh = _mm256_cvtps_ph(vf, _MM_FROUND_NO_EXC);
197 if (batch & (4 * sizeof(uint16_t))) {
198 _mm_storel_epi64((__m128i*) o, vh);
199 vh = _mm_unpackhi_epi64(vh, vh);
200 o += 4;
201 }
202 if (batch & (2 * sizeof(uint16_t))) {
203 _mm_storeu_si32(o, vh);
204 vh = _mm_srli_epi64(vh, 32);
205 o += 2;
206 }
207 if (batch & (1 * sizeof(uint16_t))) {
208 *o = (uint16_t) _mm_extract_epi16(vh, 0);
209 }
210 }
211 }
212