xref: /aosp_15_r20/external/XNNPACK/src/f16-vsigmoid/gen/vsigmoid-avx2-rr1-p2-rcp-x40.c (revision 4bdc94577ba0e567308109d787f7fec7b531ce36)
1 // Auto-generated file. Do not edit!
2 //   Template: src/f16-vsigmoid/avx2.c.in
3 //   Generator: tools/xngen
4 //
5 // Copyright 2022 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9 
10 #include <assert.h>
11 
12 #include <immintrin.h>
13 
14 #include <xnnpack/common.h>
15 #include <xnnpack/intrinsics-polyfill.h>
16 #include <xnnpack/vunary.h>
17 
18 
xnn_f16_vsigmoid_ukernel__avx2_rr1_p2_rcp_x40(size_t batch,const void * input,void * output,const union xnn_f16_sigmoid_params params[restrict XNN_MIN_ELEMENTS (1)])19 void xnn_f16_vsigmoid_ukernel__avx2_rr1_p2_rcp_x40(
20     size_t batch,
21     const void* input,
22     void* output,
23     const union xnn_f16_sigmoid_params params[restrict XNN_MIN_ELEMENTS(1)])
24 {
25   assert(batch % sizeof(uint16_t) == 0);
26 
27   const __m256 vsign_mask = _mm256_load_ps(params->avx2_rr1_p2.sign_mask);
28   const __m256 vmagic_bias = _mm256_load_ps(params->avx2_rr1_p2.magic_bias);
29   const __m256 vlog2e = _mm256_load_ps(params->avx2_rr1_p2.log2e);
30   const __m256 vminus_ln2 = _mm256_load_ps(params->avx2_rr1_p2.minus_ln2);
31   const __m256 vc2 = _mm256_load_ps(params->avx2_rr1_p2.c2);
32   const __m256 vc1 = _mm256_load_ps(params->avx2_rr1_p2.c1);
33   const __m256 vone = _mm256_load_ps(params->avx2_rr1_p2.one);
34   const __m256 vdenorm_cutoff = _mm256_load_ps(params->avx2_rr1_p2.denorm_cutoff);
35 
36   const uint16_t* i = (const uint16_t*) input;
37   uint16_t* o = (uint16_t*) output;
38   for (; batch >= 40 * sizeof(uint16_t); batch -= 40 * sizeof(uint16_t)) {
39     const __m256 vx0 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) i));
40     const __m256 vx1 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) (i + 8)));
41     const __m256 vx2 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) (i + 16)));
42     const __m256 vx3 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) (i + 24)));
43     const __m256 vx4 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) (i + 32)));
44     i += 40;
45 
46     const __m256 vz0 = _mm256_or_ps(vx0, vsign_mask);
47     const __m256 vz1 = _mm256_or_ps(vx1, vsign_mask);
48     const __m256 vz2 = _mm256_or_ps(vx2, vsign_mask);
49     const __m256 vz3 = _mm256_or_ps(vx3, vsign_mask);
50     const __m256 vz4 = _mm256_or_ps(vx4, vsign_mask);
51 
52     __m256 vn0 = _mm256_fmadd_ps(vz0, vlog2e, vmagic_bias);
53     __m256 vn1 = _mm256_fmadd_ps(vz1, vlog2e, vmagic_bias);
54     __m256 vn2 = _mm256_fmadd_ps(vz2, vlog2e, vmagic_bias);
55     __m256 vn3 = _mm256_fmadd_ps(vz3, vlog2e, vmagic_bias);
56     __m256 vn4 = _mm256_fmadd_ps(vz4, vlog2e, vmagic_bias);
57 
58     const __m256 vs0 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn0), 23));
59     const __m256 vs1 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn1), 23));
60     const __m256 vs2 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn2), 23));
61     const __m256 vs3 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn3), 23));
62     const __m256 vs4 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn4), 23));
63 
64     vn0 = _mm256_sub_ps(vn0, vmagic_bias);
65     vn1 = _mm256_sub_ps(vn1, vmagic_bias);
66     vn2 = _mm256_sub_ps(vn2, vmagic_bias);
67     vn3 = _mm256_sub_ps(vn3, vmagic_bias);
68     vn4 = _mm256_sub_ps(vn4, vmagic_bias);
69 
70     __m256 vt0 = _mm256_fmadd_ps(vn0, vminus_ln2, vz0);
71     __m256 vt1 = _mm256_fmadd_ps(vn1, vminus_ln2, vz1);
72     __m256 vt2 = _mm256_fmadd_ps(vn2, vminus_ln2, vz2);
73     __m256 vt3 = _mm256_fmadd_ps(vn3, vminus_ln2, vz3);
74     __m256 vt4 = _mm256_fmadd_ps(vn4, vminus_ln2, vz4);
75 
76     const __m256 vp0 = _mm256_fmadd_ps(vc2, vt0, vc1);
77     const __m256 vp1 = _mm256_fmadd_ps(vc2, vt1, vc1);
78     const __m256 vp2 = _mm256_fmadd_ps(vc2, vt2, vc1);
79     const __m256 vp3 = _mm256_fmadd_ps(vc2, vt3, vc1);
80     const __m256 vp4 = _mm256_fmadd_ps(vc2, vt4, vc1);
81 
82     vt0 = _mm256_mul_ps(vt0, vs0);
83     vt1 = _mm256_mul_ps(vt1, vs1);
84     vt2 = _mm256_mul_ps(vt2, vs2);
85     vt3 = _mm256_mul_ps(vt3, vs3);
86     vt4 = _mm256_mul_ps(vt4, vs4);
87 
88     const __m256 ve0 = _mm256_fmadd_ps(vt0, vp0, vs0);
89     const __m256 ve1 = _mm256_fmadd_ps(vt1, vp1, vs1);
90     const __m256 ve2 = _mm256_fmadd_ps(vt2, vp2, vs2);
91     const __m256 ve3 = _mm256_fmadd_ps(vt3, vp3, vs3);
92     const __m256 ve4 = _mm256_fmadd_ps(vt4, vp4, vs4);
93 
94     const __m256 vd0 = _mm256_add_ps(ve0, vone);
95     const __m256 vd1 = _mm256_add_ps(ve1, vone);
96     const __m256 vd2 = _mm256_add_ps(ve2, vone);
97     const __m256 vd3 = _mm256_add_ps(ve3, vone);
98     const __m256 vd4 = _mm256_add_ps(ve4, vone);
99 
100     const __m256 vr0 = _mm256_rcp_ps(vd0);
101     const __m256 vr1 = _mm256_rcp_ps(vd1);
102     const __m256 vr2 = _mm256_rcp_ps(vd2);
103     const __m256 vr3 = _mm256_rcp_ps(vd3);
104     const __m256 vr4 = _mm256_rcp_ps(vd4);
105 
106     __m256 vf0 = _mm256_mul_ps(ve0, vr0);
107     __m256 vf1 = _mm256_mul_ps(ve1, vr1);
108     __m256 vf2 = _mm256_mul_ps(ve2, vr2);
109     __m256 vf3 = _mm256_mul_ps(ve3, vr3);
110     __m256 vf4 = _mm256_mul_ps(ve4, vr4);
111 
112     vf0 = _mm256_andnot_ps(_mm256_cmp_ps(vz0, vdenorm_cutoff, _CMP_LT_OS), vf0);
113     vf1 = _mm256_andnot_ps(_mm256_cmp_ps(vz1, vdenorm_cutoff, _CMP_LT_OS), vf1);
114     vf2 = _mm256_andnot_ps(_mm256_cmp_ps(vz2, vdenorm_cutoff, _CMP_LT_OS), vf2);
115     vf3 = _mm256_andnot_ps(_mm256_cmp_ps(vz3, vdenorm_cutoff, _CMP_LT_OS), vf3);
116     vf4 = _mm256_andnot_ps(_mm256_cmp_ps(vz4, vdenorm_cutoff, _CMP_LT_OS), vf4);
117 
118     vf0 = _mm256_blendv_ps(_mm256_sub_ps(vone, vf0), vf0, vx0);
119     vf1 = _mm256_blendv_ps(_mm256_sub_ps(vone, vf1), vf1, vx1);
120     vf2 = _mm256_blendv_ps(_mm256_sub_ps(vone, vf2), vf2, vx2);
121     vf3 = _mm256_blendv_ps(_mm256_sub_ps(vone, vf3), vf3, vx3);
122     vf4 = _mm256_blendv_ps(_mm256_sub_ps(vone, vf4), vf4, vx4);
123 
124     _mm_storeu_si128((__m128i*) o, _mm256_cvtps_ph(vf0, _MM_FROUND_NO_EXC));
125     _mm_storeu_si128((__m128i*) (o + 8), _mm256_cvtps_ph(vf1, _MM_FROUND_NO_EXC));
126     _mm_storeu_si128((__m128i*) (o + 16), _mm256_cvtps_ph(vf2, _MM_FROUND_NO_EXC));
127     _mm_storeu_si128((__m128i*) (o + 24), _mm256_cvtps_ph(vf3, _MM_FROUND_NO_EXC));
128     _mm_storeu_si128((__m128i*) (o + 32), _mm256_cvtps_ph(vf4, _MM_FROUND_NO_EXC));
129     o += 40;
130   }
131   for (; batch >= 8 * sizeof(uint16_t); batch -= 8 * sizeof(uint16_t)) {
132     const __m256 vx = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) i));
133     i += 8;
134 
135     const __m256 vz = _mm256_or_ps(vx, vsign_mask);
136 
137     __m256 vn = _mm256_fmadd_ps(vz, vlog2e, vmagic_bias);
138     const __m256 vs = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn), 23));
139     vn = _mm256_sub_ps(vn, vmagic_bias);
140 
141     __m256 vt = _mm256_fmadd_ps(vn, vminus_ln2, vz);
142 
143     const __m256 vp = _mm256_fmadd_ps(vc2, vt, vc1);
144     vt = _mm256_mul_ps(vt, vs);
145     const __m256 ve = _mm256_fmadd_ps(vt, vp, vs);
146 
147     const __m256 vd = _mm256_add_ps(ve, vone);
148     const __m256 vr = _mm256_rcp_ps(vd);
149     __m256 vf = _mm256_mul_ps(ve, vr);
150 
151     vf = _mm256_andnot_ps(_mm256_cmp_ps(vz, vdenorm_cutoff, _CMP_LT_OS), vf);
152     vf = _mm256_blendv_ps(_mm256_sub_ps(vone, vf), vf, vx);
153 
154     _mm_storeu_si128((__m128i*) o, _mm256_cvtps_ph(vf, _MM_FROUND_NO_EXC));
155     o += 8;
156   }
157   if XNN_UNLIKELY(batch != 0) {
158     assert(batch >= 1 * sizeof(uint16_t));
159     assert(batch <= 7 * sizeof(uint16_t));
160     const __m256 vx = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) i));
161 
162     const __m256 vz = _mm256_or_ps(vx, vsign_mask);
163 
164     __m256 vn = _mm256_fmadd_ps(vz, vlog2e, vmagic_bias);
165     const __m256 vs = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn), 23));
166     vn = _mm256_sub_ps(vn, vmagic_bias);
167 
168     __m256 vt = _mm256_fmadd_ps(vn, vminus_ln2, vz);
169 
170     const __m256 vp = _mm256_fmadd_ps(vc2, vt, vc1);
171     vt = _mm256_mul_ps(vt, vs);
172     const __m256 ve = _mm256_fmadd_ps(vt, vp, vs);
173 
174     const __m256 vd = _mm256_add_ps(ve, vone);
175     const __m256 vr = _mm256_rcp_ps(vd);
176     __m256 vf = _mm256_mul_ps(ve, vr);
177 
178     vf = _mm256_andnot_ps(_mm256_cmp_ps(vz, vdenorm_cutoff, _CMP_LT_OS), vf);
179     vf = _mm256_blendv_ps(_mm256_sub_ps(vone, vf), vf, vx);
180 
181     __m128i vh = _mm256_cvtps_ph(vf, _MM_FROUND_NO_EXC);
182     if (batch & (4 * sizeof(uint16_t))) {
183       _mm_storel_epi64((__m128i*) o, vh);
184       vh = _mm_unpackhi_epi64(vh, vh);
185       o += 4;
186     }
187     if (batch & (2 * sizeof(uint16_t))) {
188       _mm_storeu_si32(o, vh);
189       vh = _mm_srli_epi64(vh, 32);
190       o += 2;
191     }
192     if (batch & (1 * sizeof(uint16_t))) {
193       *o = (uint16_t) _mm_extract_epi16(vh, 0);
194     }
195   }
196 }
197