1 // Auto-generated file. Do not edit!
2 // Template: src/f16-vsigmoid/avx2.c.in
3 // Generator: tools/xngen
4 //
5 // Copyright 2022 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9
10 #include <assert.h>
11
12 #include <immintrin.h>
13
14 #include <xnnpack/common.h>
15 #include <xnnpack/intrinsics-polyfill.h>
16 #include <xnnpack/vunary.h>
17
18
xnn_f16_vsigmoid_ukernel__avx2_rr1_p2_rcp_x32(size_t batch,const void * input,void * output,const union xnn_f16_sigmoid_params params[restrict XNN_MIN_ELEMENTS (1)])19 void xnn_f16_vsigmoid_ukernel__avx2_rr1_p2_rcp_x32(
20 size_t batch,
21 const void* input,
22 void* output,
23 const union xnn_f16_sigmoid_params params[restrict XNN_MIN_ELEMENTS(1)])
24 {
25 assert(batch % sizeof(uint16_t) == 0);
26
27 const __m256 vsign_mask = _mm256_load_ps(params->avx2_rr1_p2.sign_mask);
28 const __m256 vmagic_bias = _mm256_load_ps(params->avx2_rr1_p2.magic_bias);
29 const __m256 vlog2e = _mm256_load_ps(params->avx2_rr1_p2.log2e);
30 const __m256 vminus_ln2 = _mm256_load_ps(params->avx2_rr1_p2.minus_ln2);
31 const __m256 vc2 = _mm256_load_ps(params->avx2_rr1_p2.c2);
32 const __m256 vc1 = _mm256_load_ps(params->avx2_rr1_p2.c1);
33 const __m256 vone = _mm256_load_ps(params->avx2_rr1_p2.one);
34 const __m256 vdenorm_cutoff = _mm256_load_ps(params->avx2_rr1_p2.denorm_cutoff);
35
36 const uint16_t* i = (const uint16_t*) input;
37 uint16_t* o = (uint16_t*) output;
38 for (; batch >= 32 * sizeof(uint16_t); batch -= 32 * sizeof(uint16_t)) {
39 const __m256 vx0 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) i));
40 const __m256 vx1 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) (i + 8)));
41 const __m256 vx2 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) (i + 16)));
42 const __m256 vx3 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) (i + 24)));
43 i += 32;
44
45 const __m256 vz0 = _mm256_or_ps(vx0, vsign_mask);
46 const __m256 vz1 = _mm256_or_ps(vx1, vsign_mask);
47 const __m256 vz2 = _mm256_or_ps(vx2, vsign_mask);
48 const __m256 vz3 = _mm256_or_ps(vx3, vsign_mask);
49
50 __m256 vn0 = _mm256_fmadd_ps(vz0, vlog2e, vmagic_bias);
51 __m256 vn1 = _mm256_fmadd_ps(vz1, vlog2e, vmagic_bias);
52 __m256 vn2 = _mm256_fmadd_ps(vz2, vlog2e, vmagic_bias);
53 __m256 vn3 = _mm256_fmadd_ps(vz3, vlog2e, vmagic_bias);
54
55 const __m256 vs0 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn0), 23));
56 const __m256 vs1 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn1), 23));
57 const __m256 vs2 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn2), 23));
58 const __m256 vs3 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn3), 23));
59
60 vn0 = _mm256_sub_ps(vn0, vmagic_bias);
61 vn1 = _mm256_sub_ps(vn1, vmagic_bias);
62 vn2 = _mm256_sub_ps(vn2, vmagic_bias);
63 vn3 = _mm256_sub_ps(vn3, vmagic_bias);
64
65 __m256 vt0 = _mm256_fmadd_ps(vn0, vminus_ln2, vz0);
66 __m256 vt1 = _mm256_fmadd_ps(vn1, vminus_ln2, vz1);
67 __m256 vt2 = _mm256_fmadd_ps(vn2, vminus_ln2, vz2);
68 __m256 vt3 = _mm256_fmadd_ps(vn3, vminus_ln2, vz3);
69
70 const __m256 vp0 = _mm256_fmadd_ps(vc2, vt0, vc1);
71 const __m256 vp1 = _mm256_fmadd_ps(vc2, vt1, vc1);
72 const __m256 vp2 = _mm256_fmadd_ps(vc2, vt2, vc1);
73 const __m256 vp3 = _mm256_fmadd_ps(vc2, vt3, vc1);
74
75 vt0 = _mm256_mul_ps(vt0, vs0);
76 vt1 = _mm256_mul_ps(vt1, vs1);
77 vt2 = _mm256_mul_ps(vt2, vs2);
78 vt3 = _mm256_mul_ps(vt3, vs3);
79
80 const __m256 ve0 = _mm256_fmadd_ps(vt0, vp0, vs0);
81 const __m256 ve1 = _mm256_fmadd_ps(vt1, vp1, vs1);
82 const __m256 ve2 = _mm256_fmadd_ps(vt2, vp2, vs2);
83 const __m256 ve3 = _mm256_fmadd_ps(vt3, vp3, vs3);
84
85 const __m256 vd0 = _mm256_add_ps(ve0, vone);
86 const __m256 vd1 = _mm256_add_ps(ve1, vone);
87 const __m256 vd2 = _mm256_add_ps(ve2, vone);
88 const __m256 vd3 = _mm256_add_ps(ve3, vone);
89
90 const __m256 vr0 = _mm256_rcp_ps(vd0);
91 const __m256 vr1 = _mm256_rcp_ps(vd1);
92 const __m256 vr2 = _mm256_rcp_ps(vd2);
93 const __m256 vr3 = _mm256_rcp_ps(vd3);
94
95 __m256 vf0 = _mm256_mul_ps(ve0, vr0);
96 __m256 vf1 = _mm256_mul_ps(ve1, vr1);
97 __m256 vf2 = _mm256_mul_ps(ve2, vr2);
98 __m256 vf3 = _mm256_mul_ps(ve3, vr3);
99
100 vf0 = _mm256_andnot_ps(_mm256_cmp_ps(vz0, vdenorm_cutoff, _CMP_LT_OS), vf0);
101 vf1 = _mm256_andnot_ps(_mm256_cmp_ps(vz1, vdenorm_cutoff, _CMP_LT_OS), vf1);
102 vf2 = _mm256_andnot_ps(_mm256_cmp_ps(vz2, vdenorm_cutoff, _CMP_LT_OS), vf2);
103 vf3 = _mm256_andnot_ps(_mm256_cmp_ps(vz3, vdenorm_cutoff, _CMP_LT_OS), vf3);
104
105 vf0 = _mm256_blendv_ps(_mm256_sub_ps(vone, vf0), vf0, vx0);
106 vf1 = _mm256_blendv_ps(_mm256_sub_ps(vone, vf1), vf1, vx1);
107 vf2 = _mm256_blendv_ps(_mm256_sub_ps(vone, vf2), vf2, vx2);
108 vf3 = _mm256_blendv_ps(_mm256_sub_ps(vone, vf3), vf3, vx3);
109
110 _mm_storeu_si128((__m128i*) o, _mm256_cvtps_ph(vf0, _MM_FROUND_NO_EXC));
111 _mm_storeu_si128((__m128i*) (o + 8), _mm256_cvtps_ph(vf1, _MM_FROUND_NO_EXC));
112 _mm_storeu_si128((__m128i*) (o + 16), _mm256_cvtps_ph(vf2, _MM_FROUND_NO_EXC));
113 _mm_storeu_si128((__m128i*) (o + 24), _mm256_cvtps_ph(vf3, _MM_FROUND_NO_EXC));
114 o += 32;
115 }
116 for (; batch >= 8 * sizeof(uint16_t); batch -= 8 * sizeof(uint16_t)) {
117 const __m256 vx = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) i));
118 i += 8;
119
120 const __m256 vz = _mm256_or_ps(vx, vsign_mask);
121
122 __m256 vn = _mm256_fmadd_ps(vz, vlog2e, vmagic_bias);
123 const __m256 vs = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn), 23));
124 vn = _mm256_sub_ps(vn, vmagic_bias);
125
126 __m256 vt = _mm256_fmadd_ps(vn, vminus_ln2, vz);
127
128 const __m256 vp = _mm256_fmadd_ps(vc2, vt, vc1);
129 vt = _mm256_mul_ps(vt, vs);
130 const __m256 ve = _mm256_fmadd_ps(vt, vp, vs);
131
132 const __m256 vd = _mm256_add_ps(ve, vone);
133 const __m256 vr = _mm256_rcp_ps(vd);
134 __m256 vf = _mm256_mul_ps(ve, vr);
135
136 vf = _mm256_andnot_ps(_mm256_cmp_ps(vz, vdenorm_cutoff, _CMP_LT_OS), vf);
137 vf = _mm256_blendv_ps(_mm256_sub_ps(vone, vf), vf, vx);
138
139 _mm_storeu_si128((__m128i*) o, _mm256_cvtps_ph(vf, _MM_FROUND_NO_EXC));
140 o += 8;
141 }
142 if XNN_UNLIKELY(batch != 0) {
143 assert(batch >= 1 * sizeof(uint16_t));
144 assert(batch <= 7 * sizeof(uint16_t));
145 const __m256 vx = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) i));
146
147 const __m256 vz = _mm256_or_ps(vx, vsign_mask);
148
149 __m256 vn = _mm256_fmadd_ps(vz, vlog2e, vmagic_bias);
150 const __m256 vs = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn), 23));
151 vn = _mm256_sub_ps(vn, vmagic_bias);
152
153 __m256 vt = _mm256_fmadd_ps(vn, vminus_ln2, vz);
154
155 const __m256 vp = _mm256_fmadd_ps(vc2, vt, vc1);
156 vt = _mm256_mul_ps(vt, vs);
157 const __m256 ve = _mm256_fmadd_ps(vt, vp, vs);
158
159 const __m256 vd = _mm256_add_ps(ve, vone);
160 const __m256 vr = _mm256_rcp_ps(vd);
161 __m256 vf = _mm256_mul_ps(ve, vr);
162
163 vf = _mm256_andnot_ps(_mm256_cmp_ps(vz, vdenorm_cutoff, _CMP_LT_OS), vf);
164 vf = _mm256_blendv_ps(_mm256_sub_ps(vone, vf), vf, vx);
165
166 __m128i vh = _mm256_cvtps_ph(vf, _MM_FROUND_NO_EXC);
167 if (batch & (4 * sizeof(uint16_t))) {
168 _mm_storel_epi64((__m128i*) o, vh);
169 vh = _mm_unpackhi_epi64(vh, vh);
170 o += 4;
171 }
172 if (batch & (2 * sizeof(uint16_t))) {
173 _mm_storeu_si32(o, vh);
174 vh = _mm_srli_epi64(vh, 32);
175 o += 2;
176 }
177 if (batch & (1 * sizeof(uint16_t))) {
178 *o = (uint16_t) _mm_extract_epi16(vh, 0);
179 }
180 }
181 }
182