xref: /aosp_15_r20/external/XNNPACK/src/f16-vrnd/neonfp16arith.c.in (revision 4bdc94577ba0e567308109d787f7fec7b531ce36)
1// Copyright 2022 Google LLC
2//
3// This source code is licensed under the BSD-style license found in the
4// LICENSE file in the root directory of this source tree.
5
6$assert BATCH_TILE % 8 == 0
7$assert BATCH_TILE >= 8
8$SIMD_TILE = BATCH_TILE // 8
9$ABC = "0123456789ABCDEFGHIJKLMNOPQRSTUVWXYZ"
10$assert OP in ["RNDNE", "RNDZ", "RNDU", "RNDD"]
11#include <assert.h>
12
13#include <arm_neon.h>
14
15#include <xnnpack/common.h>
16#include <xnnpack/math.h>
17#include <xnnpack/vunary.h>
18
19
20$VRNDQ_F16 = {
21$  "RNDNE": "vrndnq_f16",
22$  "RNDZ": "vrndq_f16",
23$  "RNDU": "vrndpq_f16",
24$  "RNDD": "vrndmq_f16",
25$}[OP]
26void xnn_f16_v${OP.lower()}_ukernel__neonfp16arith_x${BATCH_TILE}(
27    size_t n,
28    const void* input,
29    void* output,
30    const union xnn_f16_rnd_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
31{
32  assert(n != 0);
33  assert(n % sizeof(__fp16) == 0);
34
35  const __fp16* i = (const __fp16*) input;
36  __fp16* o = (__fp16*) output;
37  $if BATCH_TILE > 8:
38    for (; n >= ${BATCH_TILE} * sizeof(__fp16); n -= ${BATCH_TILE} * sizeof(__fp16)) {
39      $for N in range(SIMD_TILE):
40        float16x8_t vacc${ABC[N]} = vld1q_f16(i); i += 8;
41
42      $for N in range(SIMD_TILE):
43        vacc${ABC[N]} = ${VRNDQ_F16}(vacc${ABC[N]});
44
45      $for N in range(SIMD_TILE):
46        vst1q_f16(o, vacc${ABC[N]}); o += 8;
47    }
48  for (; n >= 8 * sizeof(__fp16); n -= 8 * sizeof(__fp16)) {
49    float16x8_t vacc = vld1q_f16(i); i += 8;
50    vacc = ${VRNDQ_F16}(vacc);
51    vst1q_f16(o, vacc); o += 8;
52  }
53  if XNN_UNLIKELY(n != 0) {
54    float16x8_t vacc = vld1q_f16(i);
55    vacc = ${VRNDQ_F16}(vacc);
56    float16x4_t vacc_lo = vget_low_f16(vacc);
57    if (n & (4 * sizeof(__fp16))) {
58      vst1_f16(o, vacc_lo); o += 4;
59      vacc_lo = vget_high_f16(vacc);
60    }
61    if (n & (2 * sizeof(__fp16))) {
62      vst1_lane_u32((void*) o, vreinterpret_u32_f16(vacc_lo), 0); o += 2;
63      vacc_lo = vext_f16(vacc_lo, vacc_lo, 2);
64    }
65    if (n & (1 * sizeof(__fp16))) {
66      vst1_lane_f16(o, vacc_lo, 0);
67    }
68  }
69}
70